LM1525A | DigiCamel IC Datasheet

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; = National Fa j & Semiconductor = r LM1525A/LM3525A/LM1527A/LM3527A a Pulse Width Modulator > re General Description s The LM1525A/1527A series of pulse-width-modulator in- _ tegrated circuits is the latch following the comparator (thus 8 tegrated circuits are designed to offer improved perform- _ preventing double-pulsing). Once a PWM pulse has been Ay ance and lowered external parts count when used to imple- _ terminated for any reason, the outputs will remain OFF for | ment all types of switching power supplies. The on-chip the duration of that period. The latch is reset with each £ +5.1V reference is trimmed to +1% initial accuracy, and —_ clock pulse. The output stages are totem-pole designs ca- | > the input common mode range of the error amplifier in- | pable of sourcing or sinking more than 200 mA. The 8 cludes the reference voltage, eliminating extemal potenti- © _LM1525A output stage features NOR fogic, resulting in | Ni ometers and dividers. A Sync input to the oscillator permits LOW outputs for an OFF stage. The LM1527A uses OR | > multiple devices to be slaved together, or a single device to —_ logic which results in HIGH outputs when OFF. be synchronized to an external system clock. A single resis- tor between the Cy pin and the Discharge pin providesa Features wide range of deadtime adjustment. These devices also fea-@ g to 35V operation ture built-in soft-start circuitry with only a timing capacitor q + required externally. A Shutdown pin controls both the sott- : One wren #1% start circuitry and the output stages, providing instanta- ‘0 4 z oscillator range neous turn-off with soft-start recycle for slow turn-on. These Separate oscillator sync terminal functions are also controlled by an undervoltage lockout ™ Adjustable deadtime control which keeps the outputs off and the soft-start capacitor dis- © ™ Internal soft-start charged for input voltages less than that required for normal Input undervoltage lockout with hysteresis operation. The undervoltage lockout Circuitry features ap- ™ Latching P.W.M. to prevent multiple pulses proximately 200 mV of hysteresis to prevent threshold oscil Dual source/sink output drivers lations. Another unique feature of these improved PWM in- Block & Connection Diagrams mama) | SY ' : W® eat (ast) | 4 : cao @ crourer ios H sne.@ = Dy +@omrs : n® @ ox ovr 7 : Iv. NPUT 1 16 Var or Cecuin : NLINPUT 42 15% De @aumrs cfs W527 12h crown tL Ll i : ts (ol 11 OurPUTA = H A DISCHARGE 47 10} SHUTDOWN oO > ee: +} sore-start fe af courevssnon Ee tuns2sa ourrur | mw 2 ‘ 3d runone-2 mw “tason {wats curt | Top View sors Oe te Order Number LM1525AJ, Com. > ' ® : LM3525AJ, LM1527AJ, LM3527AJ, swumown @) ‘ ‘ LM3525AN or LM3527AN or ss ‘ See NS Package Number sox " =D, +Dovrrr 4 J16A or N16A ) QD ours teneeeesFEet Tumors 241

i §& | Absolute Maximum Ratings (note 7) £ If Military/Aerospace specified devices are required, Storage Temperature ~65°C to + 150°C || please contact the National Semiconductor Sales Operating Temperature Range (Trin < Tj < Tmex) 2 Oftice/Distributors for availability and specifications. LM1525A, LM1527A, ~55°C to + 150°C 8 Input Voltage (Pins 13, and 15) —0.3V to +40V LM3525A, LM3527A O°C to + 150°C

8 Reference Output Current (Pin 16) 50 mA DC Lead Temperature (Soldering, 4 Seconds)

= Reference Output Short Circuit 5 Seconds J Package +300°C & |_ Ouout curront Pins 11, 14) +200 mA NPackage + 260°C SS | | Osciator Currant (ins 6,6, 7) (Note 8) 6 mADC Power cissipation (Note 9) 1 Watt ‘olerance wo Op Amp Inputs: Vom —0.3V to + Vin = = 5 (Pins 1,2) Vowe ey Czap = 100 pF, Rzap = 1.5k 2000V = Logic Inputs —0.3V to +5.5V | Electrical Characteristics | Vin = 20 Vac, Boldface limits apply from Tin to Taax (Note 1), all other limits T; = 25°C unless otherwise noted

5 LM3525A

Parameter Tested | Design Design Units Typical} Limit Limit | Typical Limit (Note 2) | (Note 3) (Note 3) REFERENCE SECTION Reference Voltage Output | Tj = 25°C 5.05 Vin

5.15 Vmax

Temperature stabiity [To TT 80 | | 80 | eV Reference Voltage Output | +8.0V < Vi, < +35V 5.20 5.25 Vmax OmA< IL < 20mA 5.00 4.95 Venin ‘And Over Operating Temp. Output Noise Voltage 10Hz << 10kHz BV ims Tj = 25°C max OSCILLATOR SECTION (Note 4) Unless otherwise specified Minimum Frequency Rr = 300k0,Cr =0.1pF,| 70 70 Hz max Rp = 0 (Note 5) Maximum Frequency Ry = 2.0k0, Cy = 1 nF, 450 kHz min Rp =0 Current Mirror Ipin 5 IRT = 2.0mA MAmin mAmax Clock Width Tj = 25°C ws max Bs min Sync Threshold (Note 6) Vimin Vmax 2-42

Electrical Characteristics = Vin = 20 Vgc, Boldface limits apply from Twin to Tax (Note 1), all other limits T; = 25°C unless otherwise noted (Continued) 8 [oe | se le LM3527A & Typical Limit | Typical Limit 8S (Note 3) {Note 3) > ERROR AMPLIFIER SECTION Vow = 5.1V, Unless otherwise noted & Input Offset Volage Po os Ts Te 7 J t0 Yona | Input Bias Current Po to t0 tne | Input Offset Curent Oe en DC Open Loop Gain [uztome Teo [ee [fo | ce | co fasmin| & wero foe TT Cs 30pF > Output Low Level po oe Fos [2 [oe [08 | Vin Supply Votage Rejection [vw=eviossv [a0 | eo | | oo | e¢ | 60 [asmin P.W.M. COMPARATOR | pout Threshotd [zemouycyee [09 [oe | [oo | 070 | 06 | Vain || input Threshotd [Max ouyoyis | aa [ae | [sa | a6 | 36 | Vw | pet bias Caron a SOFT-START SECTION [eee ee Tat TTS Tere j 25 36 25 | Amin |_| SettStart Vonage [vswwtoowm=20v [os [oe | | oas | os | 06 | vn | | OUTPUT DRIVERS (Each Output) Vc = 20V, Unless otherwise noted | | Underage Leckouttivstoess] | oz | | dT oz | | dv ~ Foxtout Low Level lim =20ma_ | o2 | om | | o2 | os | om | Vom | lismc=tooma | 40 | ao [| 0 | 19 | 20 | Vinx 2 | a oc

6.3 Vinin

a ty coat | Electrical Characteristics 2 Vin = 20 Vdc, Boldface limits apply from Twin to Tmax (Note 1), all other limits Tj = 25°C unless otherwise noted (Continued) Ss LM1525A LMa525A 3s LM1527A LM3527A NN Py Parameter Conditions Tested Design Tested Design Units = Typical Limit Limit Limit Limit 2 (Note 2) (Note 3) (Note 2) | (Note 3)

5 Shutdown Delay Vsp = 3V,C_ = 9, ns max

6 Tj = 26°C

& |_TOTAL STANDBY CURRENT %|_swvowen [vw=ev [| [| ve [ | 1 | ws [ 20 | m 4% | T Note 1: Untess otherwise noted these specifications apply: ~S5°C < 1; < +125°C for LM1525A and LM1527A, OC < Tj < + 125°C for LM3S25A and LM3527A $2 | Note 2: Tested limits are guaranteed and 100% tested in production. = Note 3: Design limits are guaranteed (but not 100% production tested) over the indicated temperature and supply ranges. Note 4: Tested at Foge = 40 kHz (Rt = 3.6k, Ct = 0.01 nF, Rd = 0). Note 5: These specifications are also guaranteed with Rt = 150k, Ct = 0.2 pF, Ad = 0. Note 6: Tested with a pulse of width 500 ns and amplitudes of 1.2 and 2.8V at 50 kHz. Note 7: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating the device beyond its rated operating conditions. See Note 1 and conditions. Note 8: Do not ground pin 6. Note 9: For operation at elevated temperatures, devices in the J package must be derated based on thermal resistance of 90°C/W (junction to ambient), or 85°C/W in the N package. ‘SHUTDOWN OPTIONS (See Block Diagram) Holding pin 10 high for a long time will ultimately discharge 4. Since both the compensation and soft-start terminals the soft-start capacitor, thus recycling slow turn on upon (pins 9 and 8) have current source pull-ups, either can release, This method of shutdown is the fastest shutdown readily accept a pull-down signal which only has to sink a possible. maximum of 100 A to tum off the outputs. This is sub- SYNCHRONIZATION PROCEDURE ject to the added requirement of discharging whatever A a " ‘ The device may be synchronized to an extemal clock; how- external capacitance may be attached to these pins. ever the following points have to be observed: a) The fre- 2. An alternative approach is the use of the shutdown cir- quency of the free-running oscillator of the device must be cuitry of pin 10. Activating this circuit by applying a posi- set at least 10% less than the frequency of the external tive-going pulse at pin 10 will result in the output of the clock. b) The external clock pulse must be at least 300 ns comparator going high, and thus turning off the outputs. wide but must not exceed the free-running pulse width (pin The pulse will start the fast discharge of the soft-start 4) by more than 200 ns. c) The amplitude of the external capacitor. If the shutdown command is short, the PWM pulse must be between 2 and SV. A signal is terminated without significant discharge of the Multiple devices may be synchronized together by connect- soft-start capacitor, thus allowing, for example, a conve- ing all pin 4’s together and all pin 5's together; pins 6 and 7 nient implementation of pulse-by-pulse current limiting. of slave oscillator must be left open. 2-44

LM1525A Comparator = VRer 8 a z Cc soa) QD) Ds «Doom = an S ono ot = AMP OUT OSCILLATOR Cc ro Fa | ft nen B Le G z S Sia 3 CLOCK Oca = 8 OSCILLATOR n N GND Veer Orn ato (8) SOFT=START 10k : z (10) SHUTDOWN PIN TUH/9112-3 LM1525A Output Section VRer Ym Ye Om OO rn | Ri Ba ° on y Af 7 PWM O Ouy osc *Qg omitted in LM1527A. LaTeH TUH/9112-8 Qy replaced by a 2K resistor in LM1527A. 2-45

2 « w a 3 ‘S SS

3 CO) -————)

= «® wow s = hy a w Py as @) @ cock = syvc G) wv Ce gs a Spr x 250 23K DISCHARGE (7) LD a3 =e aes ° cnn (12) = TL/H/9112-5 LM1525A Error Amplifier On Ore : INV. weut Je mM () cowr. NA. S| | weut @) 200 = TU/H/9112-4 2-46

5 LM1525A Typical Timing Diagram

8 «ERROR AMP, .

2 RAMP

N Py By ELIMINATED DUE TO LATCH (NOISE IMMUNITY) 5 coMP. te Ha) I | | f | J | H a ta ted S a FLOP-FLOP 5 a a ee z OUTPUT (A); = Py wR oe rt = ‘CLOCK, . = AND COMP’ a Ls Lt s UMt5254 FLOP=FLOP a NOR OF Q, Lock, AND COMP. TUH0112-7 Typical Applications

5 Watt Single Ended Step Down Converter

47k ‘w U an 8A Lt 7 + Yn 0.01 uF oY src ourput 8 f+ I 13 1500 o—4 osc our Ve Yo=S.1V LM1525A ® v0e 5 12 Dt Ca £it 2 Id 15ko. hs = | Ry OUTPUT A DscH. sHuToown P= Sut sx 0.01 uF ao 5) SOFT=START COMPENSATION > K_ = a Vin = 28V Q = D45CI1-12 TLH/9112-8 Vout = 5.1V D = IN5821 L = 150 pH Go = 500 wF 2-48

Typical Applications (continue) = Bipolar Drive for Push-Pull Converters 3 MOSFET Drive for Push-Pull Converters z= *Vsuppy © *¥suppLy = a G3) G3 e BA ar Q, FA Is 1 Ns fi 1 a ‘7° F vali 8 LM1525A | U15254 ~ | £ oy n GND $ GND = ¢) (2) RETURN © RETURN © Direct Drive for Transformer *Ysuppty © ® a, he cy APO, R h LM1525A % 8r@ z Re GND % b RETURN © 2-49

Ld . = 2 S| Typical Applications (continued) PS

5 LM1525A/1527A Lab Test Fixture

a © Vee inane

4 REFERENCE lan

S CLOCK ‘ ' Ss = FLIP, =A Py (- [7] i-O) = sync 7 . $ aK = 9 ‘ : mi a PWM (9 (3) ° i= s pd» S 10K ba H s x 4 aN 2 = °o H c BD i}p—-OC)—o = ' ' - 1.5K 3.8K oO t ‘ o— ! : tL : DEADTIME 5 tow 1° ono; + A $e te {5} k f ‘ ° 0.001 ’ = A) = own ; ure = 10K So H i} = 504A GND te OM ae 320) {> sortstart =k) Oo 5 1 + po Q, Zz 3k ‘ ee =p ot do a iL © ict L | = Q.. a o a meee A ; 7 ©) Ww Q ' ‘ wo” ell H = sos $ $2x 7 ° 3 H ' Rer 3 0 \\ ' a t ‘ Dw. ar ° ee TUHs91t2-12 2-50

Product Information

LM1525A specifications and overview.

Summary

PULSE WIDTH MODULATOR

Description

PULSE WIDTH MODULATOR

Source title LM1525A Datasheet(PDF) - National Semiconductor (TI)

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