MC1445 MOTOROLA | Alldatasheet

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Gate Controlled Two Channel . segs GATE CONTROLLED Input Wideband Amplifier TWO CHANNEL INPUT The MC 1445/1545 was designed for use as a general purpose gated wideband WIDEBAND AMPLIFIER fier, h, litier, multiplexer, modulator, FSK circuit, ari, video at Sense ample, multplexer, modulator, FSK eeu SILICON MONOLITHIC * Large Bandwidth; 50 MHz Typical INTEGRATED CIRCUIT © Channel Select Time of 20 ns Typical — © Differential Inputs and Differential Output | Typical Applications | Video Switch or Multiplex or FSK “ | Differentiat Amplifier with AGC 1 | Voor p Mee Voce 9 vee ot L SUFFIX | Sto Channel | CERAMIC PACKAGE | Bout top £ ot CASE 632 Ra | as |

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= oe + hae soe | Amplitude Modulator Pulse Width Modulator PIN CONNECTIONS Voc Vee PE afm Veco Vee | put pal Output [7} [7 we | = at “ i Gate (2) [ia] ne | gut oe p> [3 nc | Input BL — | L (-* Audio tw =| g— fl ne | 7 = ° Noninv. 70) NC Moditon Ast YE) ' { son = oven man, ics 3) Voc ose aver | Balanced Modulator Analog Switch (Top View) | Voc Vee Vou Vee 4 | iS cane | cout mS > fot tog = —o- —o ORDERING INFORMATION pe sy or O10+75° | Gerame DP ‘LM1545L 55° to +125°C Ceramic DIP MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA 2-95

MC1445, MC1545 MAXIMUM RATINGS (Ta = +25°C, unless otherwise noted.) Vee -12 ip ioral olan ras Power Dissipation (Package Limitation) Pp Ceramic Dual In-Line Package 625 mw Derate above Ta = +25°C 50 | mwrc Operating Ambient Temperature Range MC1445| Ta O75 |S MC1545 -5510+125 | Storage Temperature Range Tsig_ | 65t0+150 | °C ELECTRICAL CHARACTERISTICS (Vcc = +5.0 Vdc, Vee = ~5.0 Vdc, @ Ta = +25°C, specitications apply to both input channels, unless otherwise noted.) EO Input impedance wo | = fr) (t= 50 kHz) | ‘Output Impedance 2) — (t= 50 kHz) ‘Output Differential Voltage Range 4,13 | Voor 15 | 25 Vp-p (RL = 1.0 kQ, f= 50 kHz) Tt Ot ae ce a isco Ovput setae ee ee Output de Level Change 7 Avo) #15 = [45] = mv (Gate Input Voltage Change: +5.0 V to 0 V) | ‘Common Mode Rejection MR a | — | o® (t= 50 kHz) | [ip conmen ase votpfarge =| 18 | ven f= es = |= es) = | Gate Characteristics | 7 Vide Gate Input Voltage — Low Logic State (Note 1) Vi“) 0.70 oz 04 | — | Gate Input Voltage — High Logic State (Note 2) Vii) 15 — | 13 | 30 Gate Input Current - Low Logic State LG) mA (Vit(@) = 0) Gate Input Current — High Logic State 18 Iii) 20 | — (ViH(G) = #5.0 V) _ ‘Step Response tPLH 65 — Test — ns tTLH 65 - 65) - | tHE 70 -— |70}- | Wideband Input Noise uv(rms) (6.0 Hz ~ 10 MHz, Rg = 50.)

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NOTES: 1. ViL(G)/s the gate voltage which results in channel A gain of unity or less and channel B gain of 16 dB or greater. 2. ViH(G) is the gate voltage which results in channel B gain of unity or less and channel A gain of 16 dB or greater. MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA 2-96

Figure 1. Single-Ended Voltage Gain Figure 2. Single-Ended Voltage Gain Figure 3. Voltage Gain versus Figure 4. Output Voltage Swing Figure 5. aise chenele) Frequency Figure 6. Output Impedance versus Frequency

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Figure 7. Channel Separation versus Frequency Figure 8. Gate Characteristics

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Figure 9. Common Mode Rejection Ratio Figure 10. Input Wideband Noise Figure 12. Single-Ended Voltage Gain Figure 11. Circuit Schematic and Bandwidth Test Circuit

Figure 13. Output Voltage Swing Test Circuit Figure 14. input Impedance Test Circult

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Figure 16. Input Blas Current and Input Figure 15. Output impedance Test Circuit Offset Current Test Circult Figure 18. Gate Current (High and Low), Figure 17. Input Offset Voltage and Quiescent Common Mode Rejection and

Figure 19. Propagation Delay, Rise Figure 20. Power Dissipation and Wideband