LIS3L02AQ STMICROELECTRONICS | Alldatasheet

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Technical content

1 FEATURES

duce inertial sensors and actuators in silicon. match the sensing element characteristics. Figure 2. Block Diagram Figure 1. Package Table 1. Order Codes

Table 2. Pin Description Figure 3. Pin Connection (Top view)

4 GND 0V supply

5 Vdd Power supply

6 Vouty Output Voltage

7 ST Self Test (Logic 0: normal mode; Logic 1: Self-test)

8 Voutx Output Voltage

14 PD Power Down (Logic 0: normal mode; Logic 1: Power-Down mode)

15 Voutz Output Voltage

16 FS Full Scale selection (Logic 0: 2g Full-scale; Logic 1: 6g Full-scale)

19 NC Internally not connected

20 Reserved Leave unconnected

21 NC Internally not connected

26 Reserved Connect to Vdd or GND

27 Reserved Leave unconnected or connect to Vdd

28 Reserved Leave unconnected or connect to GND

Table 3. Electrical Characteristics

  1. Offset and sensitivity are essentially ratiometric to supply voltage
  2. Guaranteed by wafer level test and measurement of initial offset and sensitivity
  3. Guaranteed by design through measurements done up to 1g
  4. Contribution to the measuring output of the inclination/acceleration along the perpendicular axis
  5. Self test “output voltage delta change” is defined as Vout
  6. Self test “output voltage delta change” varies cubically with supply voltage
  7. When full-scale is set to 6g, self-test “output delta change” is one third of the specified value

maximum rating conditions for extended periods may affect device reliability. Table 4. Absolute Maximum Rating Table 3. Electrical Characteristics (continued)

3 FUNCTIONALITY

sensing element and to provide an analog signal to the external world.

3.1 Sensing element

balance is measured using charge integration in response to a voltage pulse applied to the sense capacitor. Figure 4. Equivalent electrical circuit

The nominal value of the capacitors, at steady state, is few pF and when an acceleration is applied the maximum variation of the capacitive load is few hundredths of pF.

3.2 IC Interface

The complete signal processing uses a fully differential structure, while the final stage converts the differential signal into a single-ended one to be compatible with the external world. The first stage is a low-noise capacitive amplifier that implements a Correlated Double Sampling (CDS) at its output to cancel the offset and the 1/f noise. The produced signal is then sent to three different S&Hs, one for each channel, and made available to the outside. The low noise input amplifier operates at 200 kHz while the three S&Hs operate at a sampling frequency of 66 kHz. This allows a large oversampling ratio, which leads to in-band noise reduction and to an accurate output waveform. All the analog parameters (output offset voltage and sensitivity) are ratiometric to the voltage supply. Increasing or decreasing the voltage supply, the sensitivity and the offset will increase or decrease linearly. The feature provides the cancellation of the error related to the voltage supply along an analog to digital conversion chain.

3.3 Factory calibration

The IC interface is factory calibrated to provide to the final user a device ready to operate. The trimming values are stored inside the device by a non volatile structure. Any time the device is turned on, the trimming parameters are downloaded into the regist ers to be employed during the normal operation thus allowing the final user to employ the device without any need for further calibration.

4 PACKAGE INFORMATION

Figure 5. QFN-44 Mechanical Data & Package Dimensions

Table 5. Revision History November 2004 3 Modified/added some values in the table 2 Electrical characteristics. November 2004 4 Corrected few typo errors.

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of ST Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners © 2004 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America LIS3L02AQ