LH4161A

LH4161A NSC | Alldatasheet

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oS . s A National PRELIMINARY = rt a Semiconductor o = | LH4161A/LH4161/LH4161C =| High Speed Operational Amplifier © ae = | General Description Features = The LH4161 high-speed amplifier exhibits an excellent @ High slew rate 300 V/ps speed-power product in delivering 300 V/ys and 50 MHz —_™ High unity gain freq 50 MHz unity gain stability with only 5 mA of supply current. Further m Low supply current 5 mA power savings and application convenience are possible by Fast settling 120 ns to 0.1% taking advantage of the wide dynamic range in operating | ow differential gain <0.1% supply voltage which extends all the way down to +5V. = Low differential phase ote These amplifiers are built with National's new VIPT™ (Verti- @ Wide supply range 4.75V to 32V cally Integrated PNP) process which provides fast PNP tran- ° sistors that are true complements to the already fast NPN. woe with unlimited capacitive load devices. This advanced junction-isolated process delivers ™ Well behaved, easy to apply high-speed performance without the need for complex and Low offset voltage £1 mV expensive dielectric isolation ™ Pin compatible with LM6161 In addition, they are precision laser trimmed to guarantee . . low offset voltage. Applications & Low differential gain and phase amplifier m Fast pulse amplifier @ High frequency filters and oscillators oe SSSSSSSSsSSSSSSSSSSSSSSSSSSe ee eee Connection Diagrams N/c 1 8 (in n/c n/c n/c N/C +INPUT: 3 6 OUTPUT ~ INPUT (2) (8) V+ y-—4 5 n/c => TLK/9767-2 +input @) (7) output Top View (a) 6 Order Number LH4161AJ, LH4161J or LH4161CJ | n/c © N/c See NS Package Number JO8A ve TUK/9767=1 Top View Order Number LH4161AH, LH4161H or LH4161CH See NS Package Number H10F 3-208

r . . x Absolute Maximum Ratings = If Military/Aerospace specified devices are required, Lead Temperature (Soldering, 10 sec.) 260°C Q please contact the National Semiconductor Sales Storage Temperature Range esto +10 | & Office/Distributors for availability and specifications. Operating Temperature Range (Note 2) ps Supply Voltage (V+ — V-) 36V LH4161A/LH4161 -58Cto+125C | & Differential Input Voltage (Note 8) +8V LH4161C -25°Cto +856 | H CM Voltage (V+ — 0.7V)to(V- — 7V) Max. Junction Temperature oc | = Output Short Circuit to GND ESD Tolerance (Notes 8 and 9) +7ov | & (Note 1) Continuous Operating Supply Voltage Range 4.75Vto32v | & LH4161A LH4161 LH4161C Tested | Design | Tested | Design | Tested | Design Parameter TYP | Limit | Limit | Limit | Limit | timit | Limit | Units (Note 4) | (Note 5) | (Note 4) | (Note 5) | (Note 4) | (Note 5) Input Offset Voltage 4 mV Max Input Offset Voltage ” Average Drift BV Input Bias Current BA Max Input Offset Current 350 350 4500 nA 800 800 Max Input Offset Current 10 Large Signal Vout = £10V, RL = 2k2| 755 viv Voltage Gain {Note 11) Min AL = 10k0 [asof of Input Common-Mode | Supply = +15V +13.9 +13.9 Vv Voltage Range +140) 43.8 $13.8 #138 | 443-7) in _ 12.9 _ Vv Fea] [ae] [oe [oe Supply = +5V 3.9 v (Note 6) 3.8 Min v pete] [ae [f= [es fie ‘Common-Mode —40V < Vom < + 10V 2 dB Rejection Ratio Min Power Supply 410V < VE < £16V 80 72 dB Rejection Ratio 74 Min Output Voltage Supply = +15V +135 +135 Vv 3 | Swing and Ry = 2k +142) agg +13.3 4134 | 413-3) vin 3 =13.0 13.0 v Supply = +5V 34 v and Ry = 2k0 : Min (Note 6) 17 17 Vv Output Short Source 30 mA Circuit Current Min Sink mA ‘Supply Current 65 65 mA 6.8 6.8 Max 3-299

o bt . | AC Electrical Characteristics (notes3 a7) x 5 | tnarera [twats | tnaterc | = Tested | Design | Tested | Design | Tested | Design © Parameter Conditions Typ Limit Limit Limit Limit Limit Limit Units: = {Note 4) | (Note 5) | (Note 4) | (Note 5) | (Note 4) | (Note 5) S| Gansancwean [er=zomnz | so | o | a [| as | | we reat = =+ Min B supy= sev | a5 | | TT | Slew Rate Ay = +1 (Note 10) V/s | Min suppy= sv | of fT PowerBandwiath | Vour=20vee | 4s | | | TTT Mz Settling Time 10V Step to 0.1% ns Ay = -1,RL = 2ko Prasomarn [Pw PT eg DitteentalGan [nrscay= +4 | <or] | | TT DitteentalPhaso [wrscay=+4 [or] | | | TTT eg Input Noise Votage | f = 10 kHz es Input Noise Curent | f = 10 kHz Ss Note 1: Continuous short-circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C. Note 2: The typical junction-to-ambient thermal resistance of the cerdip (J) package is 125°C/W, and the TO-S (H) package is 155°C/W. All numbers apply for packages soldered directly into a printed circuit board. Note 3: Unless otherwise specified, al limits guaranteed for T, = Ty = 25°C with supply voltage = +15V, Vow = OV, and Ry > 100 kf. Boldface limits apply ‘over the range listed under “Operating Temperature Range” with T, = Ty in the “Absolute Maximum Ratings” section. Note 4: Guaranteed and 100% production tested. These limits are used to calculate outgoing AQL levels. Note 5: Guaranteed but not 100% production tested. These limits are not used to calculate oulgoing AQL levels. Note 6: For single supply operation, the following conditions apply: V+ = 5V, V~ = OV, Vow = 2.5V, Vour = 2.5V. Note 7: C, < 5 pF. Note 8: In order to achiove optimum AC performance, the input stage was designed without protective clamps. Exceeding the maximum differential input voltage results in reverse breakdown of the base-emitter junction of one of the input transistors and probable degradation of the input parameters (especially Vos, los and | Noise). i Note 8: The average voltage that the weakest pin combinations (those involving Pin 2 or Pin 3) can withstand and stilt conform to the datasheet limits. The test ' Circuit used consists of the human body model of 100 pF in series with 15000. | Note 10: Viv ~ 8V step. For supply = +5V, Vin = SV step. | Note 11: Voltage Gain is the total output swing (20V) divided by the input signal required to produce that swing. 3-300

é Typical Performance Characteristics A, = 10k and T, = 25°C unless otherwise specified = oa Power Dissipation Curve Input Current Noise Power Bandwidth 5 ee ttt ot = cite Oe Hecho eee & = 100 = _ patie Sg Paes 5 B onl tea tN z 5 ttre £ & FF AMBIENT “KIT Y| = 10 = xiii ir 2 attesewemn Tg 2 ae — 2 gulf pou 2 ae att 2

5 Phidec cc ta TT g ' FF ot <a °

ee | SS eCLOT TT rrr on $tooco hn t 1 wD N OTe we MNNTMD 11010010 kt 2 » ~ ‘TEMPERATURE (°C) FREQUENCY (Hz) FREQUENCY (MHz) Bias Current vs Common-Mode Voltage Input Offset Current input Offset Voltage “SH Co] a _ WN ~ Me | | 5 3 ul = ecto 3 — 12 a POLL Ps 3 +} a Mo EN Ee | i 5 os - pero ey a § iLL © LETTE TI aa “CELT {ss 5 0S os saat 8 OF 45 6S OS (05 25 SsbB ws OS 1S COMMON-MODE YOLTAGE (¥) TEMPERATURE (°C) TEMPERATURE (°C) ‘Common-Mode Input Saturation Voltage Output Saturation Voltage Output Resistance | TTT) Os) . e==A 5 ---— gp ¢ — +4 3 : z : 8 ee eit) f do ob ees ' 5 s Eta | PTT § OT REET +/= SUPPLY VOLTAGE (V) +/= SUPPLY VOLTAGE (V) FREQUENCY (Hz) Voltage Gain vs 3 | Gain vs Supply Voltage Load Resistance Positive Slew Rate ' = Pasar a LO an “ ‘levee SelboRecc) § ee pee

3 RL 8 LUA Ll 2 LA

ca oe 2 oo A aes 46> 48 = of | 5 ATT = mi ey 7 | | a Wee ey a 2 GRAAL ro {x an EP := isaaeee oe Pie ° ot LMT Tiliivs=# 54] 10 +/= SUPPLY VOLTAGE (¥) LOAD RESISTANCE (kf) ‘SUPPLY VOLTAGE (+/-V) 3-301

=~ . . . ©| Typical Performance Characteristics (continues) a = Input Noise Voitage Negative Slew Rate 100k 30 = ef 790 |_P

3 Ete z | | | Cer

2 : | | § ol 5 8 N e/a enn g 10 ‘ | 25°C? | 3 ml Bet A | | TT N +4 EEE 10 == wolL_Lt 1 | 1 10 100) 1k 10k 100k 1M 2 4 6 8 10 12 14 16 18 FREQUENCY (Hz) ‘SUPPLY VOLTAGE (#/=V) TUK/9767-4 TUK/9767-6 Typical AC Characteristics Step Response; Ay = +1 Gain & Phase; Ay = +100 ~ oJ J au au ‘Sans TUKI9767-7 os cos coy on TUK/9767-8 Application Hints The LH4161 has been compensated for unity-gain opera- 0.1 uF ceramic capacitors should be used (from each sup- tion. Since this compensation involved adding emitter-de- ply “rail” to ground); if the device is far away from its power generation resistors in the op amp's input stage, the open- supply source, an additional 2.2 to 10 nF of tantalum may loop gain was reduced as the stability increased. Gain error be required for extra noise reduction. due to reduced Ayo, is most apparent at high gains. Keep ail leads short to reduce stray capacitance and lead The LH4161 is unusually tolerant of capacitive loads. Most inductance, and make sure ground paths are low-imped- op amps tend to oscillate when their load capacitance is ance, especially where heavier currents will be flowing. greater than about 200 pF (especially in low-gain circuits). Stray capacitance in the circuit layout can cause signal cou- However, load capacitance on the LH4161 effectively in- pling from one pin, input or lead to another, and can cause creases its compensation capacitance, thus slowing the op circuit gain to unintentionally vary with frequency. amp’s response and reducing its bandwidth. Breadboarded circuits will work best if they are built using Power supply bypassing is not as critical for the LH4161 as generic PC boards with a good ground plane. If the op amps it is for other op amps in its speed class. However, bypass- are used with sockets, as opposed to being soldered into ing will improve the stability and transient response of the the circuit, the additional input capacitance may degrade LH4161, and is recommended for every design. 0.01 .F to circuit performance. 3-302

Typical Applications = a

1 MHz Low-Pass Filter >

fe = Yar WR 1R2C1Co) c ‘soe fs X__| 3 ct Vout S Vw £ 1.01 ka! 19 Kat i 150 pF* 10ka 7 T° 3 _— _— aQ + 1% tolerance 7 ~ ‘TL/K/9767-9 ‘Matching determines fter precision Modulator with Differential-to-Single-Ended Converter +12V +120 0.1 pF 1k 2k rm) 3.9k canrier—| 8 6 LM1496 OUTPUT 0.01 pF 10 5 10k St 9.1k { 7-12 7 TLK/9767—10 3-303