LH4010CN

LH4010 NSC | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 8

Technical content

= :

3 A National

= P a Semiconductor os = | LH4010/LH4010C Fast FET Buffer i General Description Features The LH4010/LH4010C is a high speed, FET input, voltage ™ Slew rate 2500 V/ps follower/buffer designed to provide high current drive at fre-__™ Wide range single or dual supply operation quencies from DC to over 100 MHz. LH4010 will provide m Power bandwidth DC to 20 MHz +100 mA into 50 loads (+250 mA peak) at slew rates of High output drive +10V with 100f load 2500 V/s. in addition, both exhibit excellent phase linearity Low phase non-linearity 2 up to 20 MHz. & Fast rise times 2ns The LH4010 is intended to fulfill a wide range of butfer appli High current gain 120 dB cations such as high speed line drivers, video impedance Ligh input resistance toton transformation, nuclear instrumentation amplifiers, op amp Pe pi tible with LH00a8 isolation buffer for driving reactive loads and high imped- ™ Pin compatible ance input buffers for high speed ADCs and comparators. These devices are constructed using specially selected Applications . junction FETs and active laser trimming to achieve guaran. _™ High speed cable driver teed performance specifications. The LH4010 is specified ™ !solation buffer for operation from —55°C to +125°C; whereas, the ™ ADC input buffer LH4010C is specified from — 25°C to + 85°C. The LH4010/ m Op amp current booster LH4010C is available in a 1.5W metal TO-8 package or a 16 lead dual-in-line package, N16A. Schematic and Connection Diagram LH4010/LH4010C Top View lof \\ no HE nc 5 vt N5 nc INPUT OD] Qt ) NORMALLY 3 14 ‘SHORTED NC: NC

1 Z input —+ 13 Vor

% nares OFFSET ADJUST 42 output orrset preset —§ Aine ra v4 12 ne -3 9 R3 Ve NC tt TUK/9349-24 O OUTPUT Order Number LH4010CN sO See NS Package Number N16A Ly Metal Can Package (TO-8) NC Q6 NC Vor 4 oo uw /OOORy gN 0) ® NORMALLY 7 a 1 saorteD INPUT >a UTPUT Soyo 7 © @ 7 6 vr OFFSET v OFFSET 9 OFFSET PRESET @ ® © ADJUST * __ ” PRESET NORMALLY oFfseT NC Yer SHORTED ADJUST TUK/9949—1 TUNISSAS-16 Ca seat et 0. Pin numbers shown for TO-8 ("G”) package. Order Number Le 0. ‘eG orLi¥ 401000 See NS Package Number H12B 4-62

. = Absolute Maximum Ratings 3s If Milltary/Aerospace specified devices are required, Output Current, Continuous +100m |S Please contact the National Semiconductor Sales Pulsed +250 mA r Office/Distributors for availability and specifications. Operating Temperature Range =x Supply Voltage (V+ — V-) 40V LH4010C -asctotesc |S Maximim Power Dissipation LH4010 —S5°Cto +125C | oS (See Curves) 1.5W Storage Temperature Range -65°Cto+150C | O Maximum Junction Temperature 175°C Lead Temperature Input Voltage Equal to Supplies (Soldering, 10 seconds) 300°C Vs = £15V, Vin = OV, RL = 1k, Ta = 25°C unless otherwise noted (Note 1) tao ats Symbol Conditions Tested Design (Max Unless Typical Limit Limit ‘Otherwise Noted) (Note 2) (Note 3) Vos Output Offset Vin = OV, Ta = Ty = 25°C 10 mV Voltage (Note 4) Vo Output Voltage Swing | Vin = + 14V (Note 1) [sf ste [| tae | V (Min) vin= #105. = 1000 | | se | [vin Fw Te 2cvw= sv | oo | || a Rout Output Impedance Vin = Voc. a ARL = 1002 to 2 v= s10v.A,= toon | | os | o0o | wviwin 4-63

s| DC Electrical Characteristics vg = +15v, vin = ov, RL = 1k, Ta = 25°C otherwise noted (Note 1) zs x a a Units co | Symbol Tested (Max Unless. o Limit Otherwise Noted) | = (Note 2) | AN Vos [input ofset Vw=ov.ta=ty=2ec | 5 | oo || mV | a 4 ps 's InputBies Current | Ty = 25°C |_200 | so [| pA soe 4 [en Vo Output Voltage Swing | Vin = +14V [ese Vv (Min) The 25 +9 V (Min) Rin Input Impedance Ty = 25°C, 0 Vin = £1V is suppyourent | |e | | mA Rout Output Impedance Vin = £Vpc (Note 4) a AR = 1002 to Ay Voltage Gain [vw=eov [Toor | vying vive ztov.ac= soon | | ez | | wvain LH4010/LH40106 Units Symbol Conditions Tested Design (Max Uniess Typical | Limit Limit | Otherwise Noted) (Note 2) | (Note 3) t ‘Small Signal Rise AVin = 0.8V [as [| | ns tp Propagation Delay _ (Note 5) AVin = 0.5V ns Bw | SmaliSignatBendwatn {| zoo || ; Note 7) MHz (Min) ‘ [meso | | to SA | StewRatoinotes) | vw= sev | 2500 | 2000 [| __v/us in 1 Note 1: Boldface limits are guaranteed over full temperature range. Operating ambient temperature range of LH4010C is —25°C to + 85°C, and LH4010 is 55°C to +125°C. Note 2: Tested limits are guaranteed and 100% production tested. Note 3; Design limits are guaranteed (but not production tested) over the indicated temperature or temperature range. ‘These limits are not used to calculate outgoing quality level, Note 4: Specifications are at 25°C junction temperature due to requirements of high speed automatic testing. Actual values at operating temperature will exceed ny value at Ty = 25°C. | Note 5: See AC Test Circuit. | Note 6: Slew rate is measured between + 2.5V and —2.5V. See AC Test Circuit. ‘ Note 7: Bandwidth is calculated from rise time with f = t/7. 4-64

Maximum Power Maximum Power o Dissipation for TO-8 Dissipation for re (“G") Package N16A Package Gain vs Input Voltage F3

25 Ex)

Ly TTT Tt) (TTTT TT IT TTT) woe w ttt tt | vo Coogee OT 3 ae iS E SQnnee aa | z sfc IN [1] zsh Sacco . “CONE ROCT] | eberen || — Coo Ss ‘0 N 3 Coe ua ey= ioc [STINT I LT TNE] TTT TTT Tit TTT) § os TIN F 0s N TTT TT TTT tT Try ee Baa TTT TTT tte ry yy FO ° oCLLCEA Er}

0 O78 100 12s 180 07S TOO as 180 ts so 5 08

TEMPERATURE (°C) ‘TEMPERATURE (°C) INPUT VOLTAGE (¥) ‘Small Signal Pulee Large Signal Pulse Frequency Response oo Pe cco FCT = (Coo Ss SoCo oe | 3 2. 3 LUA

2 CrP aan ean 9 A a

oer TT E oft ft Aor TTT g COMI TOTIN TT, i E Coo aLCWgpa eo 8 SCOTS TI 3 -o LY 2 SOOZ SCO TTI, == Aer ~~ ae 2 OT ST E co) sca BFPO riee oe) COC sss COC ETT Pessoa Coo on ° 2 4 6 8 10 o 2 4 6 8 10 1 10 100 1000 ‘TE (ns) TWE (ne) FREQUENCY (MHz) Output Voltage vs Output Resistance vs e ‘Supply Voltage 0 Output Current * Input Blas vs Temperature ‘s fae Le Fetter ees gee EEE Og we got TTA g OSS Ob wie HA EERE P| 8 “BESgeS Pere EArt ee 2 ot (Zee i a Seseaeaascae 74 op LLi ttt 7 »;CCECTTT Terr) see aM wD 0 OC! nw 8 10 i= : SUPPLY VOLTAGE (¥) (OUTPUT CURRENT (mA) TEMPERATURE (°C} Offset Voltage vs Supply Current vs Supply Voltage » Supply Voltage Cee) TC fo a LTT tate 4 | @ oye @ | (are y “Hoe e? Ca eer /ce-anc ie Mnapeeeiaan a E oA LTT sa) ausuus ee SOSRRERLE dC LTT TTT] 0 rn 7» 0 1 FA ‘SUPPLY VOLTAGE (#¥) ‘SUPPLY VOLTAGE (8) TuK/eo4s-3 4-65

So . : S| AC Test Circuit s =z vw a 4.7 pF S $ ae S 3 0.01 pF = 5 al a 510 f = ; Se }OX FET PROBE 0 1 e LF (4 0.01 uF pc. 70 510 = 47S v = TUK/e349-2 Application Hints Recommended Layout Precautions: RF/video printed cir- where: cuit board layout rules should be followed when using the Ay = No load voltage gain, typically 0.99 LHaor 0 and LHA010C since they vil provide power gain to v+ = Positive supply voltage irequencies over iz. Ground planes are recommen — = a ed and power supplies should be decoupled at each device V™ = Negative supply voltage with low inductance capacitors. In addition, ground plane For the above example, AVo would be —35 mV. This may shielding may be extended to the metal case of the device be adjusted to zero as discussed above. For AC coupled since it is electrically isolated from internal circuitry. Alterna- applications, no additional offset occurs if the DC input is tively the case should be connected to the output to mini- Properly biased as illustrated in the “typical applications’ mize input capacitance. section. Offset Voltage Adjustment: Both the LH4010 and Short Circuit Protection: In order to optimize transient re- LH4010C offset voltages have been actively trimmed by la- sponse and output swing, output current limit has been ser to meet guaranteed specifications when the offaet pre- omitted from the LH4010 and LH4010C. Short circuit pro- set pin is shorted to the offset adjust pin. This pre-calibra- tection may be added by inserting appropriate value resis- tion allows the devices to be used in most DC or AC applica- tors between V+ and Vc* pins and V~ and Vc" pins as tions without individually offset nulling each device. If offset illustrated in Figure 2. Resistor values may be predicted by: null is desirable, it is simply obtained by leaving the offset Ay =e preset pin open and connecting a trim pot of 1000 um "isc Isc between the offset adjust pin and V~ as illustrated in Fig- where: ure 1. " Isc < 100 mA q O+ 15V The inclusion of limiting resistors in the collactors of the i INPUT O= Ad output transitors reduces output voltage swing. Decoupling ' orrset Vc* and Vo™ pins with capacitors to ground will retain full PRESET O—& So output ‘output swing for transient pulses. An alternate active current i (OPEN) (4 limit technique that retains full DC output swing is shown in : 7 Figure 3. OFFSET ADJUST | 1000, i TUK/0349-13 Rum = 100 | FIGURE 1. Oftset Zero Adjust for LH4010 Operation from Single or Asymmetrical Power Supplies: C= 0.1 uF f Both device types may be readily used in application where L j symmetrical supplies are unavailable or not desirable. A typ- = ical application might be an interface to a MOS shift register INpuUTO— 1 OouTPUT where V+ = +5V and V- = —12V. In this case, an appar- 9 ent output offset occurs due to the device’s voltage gain of j less than unity. This additional output offset error may be «| Rip=too roto AF predicted by: “M LT + yo = TUK/e349-14 FIGURE 2 466

02 Pkg =

FIGURE 3. LH4010 Current Limiting nae a Using Current Sources the circuit and may be connected to system chassis. : Thus: will help in troublesome instances.

8 Typical Applications (continued)

bas] Coaxial Cable Driver s y = 9 z a Cy 100 INPUTO wn jt is | awn % 9 FAW, 4 é ‘s 100 50 TUK/9940-19 *Select C; for optimum pulse response. Instrumentation Shield/Line Driver Single Supply AC Amplifier ra vat v Ne’ 1M: 100 q CASE 0.001 uF CASE weuto——| OoUTPUT $15 ° u INPUT > 4 | 1M. é| 100 TUK/a349-20 4-68

Typical Applications (continuea) 5

4.5 MHz Notch Filter iJ

150pF 150 pF ? 3 ~~ 8 ro 110 5 1 Vout Vy © o b-—1 2: é| °” Be AICI S00pF - Ai = 2R2 RI RI 4 a-> 0 70 v TL/K/9349-22 High Speed Sample and Hold v ve KG 100 A ANALOG - 5] im (00 5 11s ourpur c og 3.0V 10. **Polycarbonate or Teflon™ io + —-——--4 ‘yea Locic INPUT D 0 | v/apuooss | bl+—--—-7,4 TE = vy = TLK/9949-29 “Pin numbers shown for TO-8 ("G") package. 4-69