LH2101A NSC | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 3

Technical content

. x= National 2 o ry < Semiconductor > z E nN LH2101A/LH2201A/LH2301A 8 Dual High Performance Operational Amplifiers > e wae x= General Description bg The LH2101A series of dual operational amplifiers are two range. The LH2301A is specified for operation over the 0°C ° LM101A type op amps in a single hermetic package. Featur- to +70°C temperature range. > ing all the same performance characteristics of the single, these duals offer in addition closer thermal tracking, lower Features weight, reduced insertion cost, and smaller size than two w Low offset voltage singles. For additional information, see the LM101A data Pa fiset sheet and National's Linear Application Handbook. : Gonrontos Sarit naracte vistios The LH2101A is specified for operation over the —55°C to te - + 125°C military temperature range. The LH2201A is speci | ™ Oi vole anne over entire common mode and sup: fied for operation over the —25°C to +85°C temperature Slew rate of 10 V/us as a summing amplifier Si ng as 8 Summing amplicon Connection Diagram toy 14 © BALANCE 4 2 6 oureur INV. INPUT © 16 | COMPENSATION 5 50 OUTPUT NON-INV. INPUT © FO BAL/COMPENSATION ov © BALANCE 12 40, output INV. INPUT O 8 _ COMPENSATION

13 Tro OUTPUT

NONINY. INPUT © © BAL/COMPENSATION ov TUKs10118-1 Order Number LH2101AD, LH2201AD or LH2301AD See NS Package Number D16C 3-243

= . . $| Absolute Maximum Ratings S| _ It Military/Aerospace specified devices are required, Output Short-Circuit Duration Continuous a please contact the National Semiconductor Sales Operating Temperature Range | __Office/Distributors for availability and specifications. LH2101A 58°C to + 125°C S| Supply Voltage +22V LH2201A =25°C to + 85°C SX | Power Dissipation (Note 1) 500 mw LH2301A O°C to + 70°C = Differential Input Voltage +30V Storage Temperature Range —65°C to + 150°C Pd Input Voltage (Note 2) +15V Lead Temperature = (Soldering, 10 Sec.) 300°C o &|_ Electrical Characteristics Each side (Note 3) 4 | kimits Parameter Conditions Units unaiosa_| LHz201a_ | LH2a018_| Input Ofset Voltage Ta=25C.Agssone | 20 | 20 | 7s | mv Max Input Offset Gurent Ta = 250 ee Input Bias Current Ta = 25°0 [7s fs | a50 | Max Input Resistance Ta = 256 Pos | is | os | amin Supply Current Ta = 25°C, Vg #20 ps0 | aa | 0m Max Large Signal Voltage Gain Ta = 25°C, Vg + 18V : 1mnV Mi Vour = +10V, RL > 2ka 50 Vimy Min Input Offset Voltage Ag < 50ke | 30 | ao | tiv Ma Average Temperature Coefficient of Input 15 15 BV/C Max Offset Voltage Input Offset Current Po tn Mx Average Temperature 25°C < Ta < 125°C , Coefficient of Input 55°C < Ta < 25°C nar’ Max Offset Current Input Bias Current PO t00 fT t00 500 Mae Supply Curent Ta=+15CVe= sev | 25 | 26 [| maAMax Large Signal Voltage Gain Vg = +15V, Vout = +10V : Re > 2kn 25 v/mV Min Output Voltage Swing Vg = £15V, RL = 10k 412 #12 £12 vin R= 2k0 +10 +10 +10 Input Voltage Range Vs = 220V v Min Common Mode Rg < 50k 70 dB Min Rejection Ratio Supply Voltage Rs < 50k2. 70 dB Min Rejection Ratio ‘Note 1: The maximum junction temperature of the LH2101A is 150°C, while that of the LH2201A is 100°C. For operating temperatures of devices in the flat package, the derating is based on a thermal resistance of 185°C/W when mounted on a Y¢-inch-thick epoxy glass board with 0.03-inch-wide, 2-ounce copper conductors. The thermal resistance of the dual-in-line package is 100°C/W, junction to ambient. Note 2: For supply voltages less than + 15V, the absolute maximum input voltage is equal to the supply voltage. Note 3: These specifications apply for +5V < Vg < +20V and —55°C < Ta < + 125°C, unless otherwise specified. With the LH2201A, however, all temperature ‘specifications are limited to 25°C < Ta < +85°C. For the LH2301A these specifications apply for 0°C < Ta < +70°C, and +5V < Vs < +15V. Supply current and input voltage range are specified as Vg — + 15V for the LH2301A. Cy = 30 pF unless otherwise specified. 3-244

Auxiliary Circuits } z inverting Amplifier with Balancing Alternate Balancing Circult Single Pole Compensation ce Circuit Fd

4 A2 bi x

m1 Ra 16,8 £ INPUT Rt 5.13 14,7 “Yi z 2 RS 4.12 Your i Regt 4,12 OUTPUT 3.11] 10 Vn 2,10 Fo x 14,7 Re . aie 8 = S12, 5.1M 3M = = 10 ci > R3 a 30 pF Su = RY R2 TUK/10116-4 10K 5.1M Ris cr cy2 es 30 pF r Ay + Re TUK/10118-2 R3 Cs = 30 pF ‘tMay be zero or equal to parallel combination of - 20K 1 and R2 for minimum offset. TwK/10118-3 Two Pole Compensation Feedforward Compensation R2 c2 aren “Yin RS 412 Vout Vu RI 51303 14 cz Yw fa] y ‘OUT 16,8 a Re es 3a o> es. 10K R3 Ry + Re i Cg = 30 pF = 1 = ct c2 = 101 TUK/10118-5 C2 = otha = 150 pF ! fo = 3 MHz TL/K/10118-6 3-245