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5 A National Operational Amplifiers/Buffers

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5 LH2011/LH2011B/LH2011C Dual Operational Amplifiers

Jj | General Description = | TheLH2011 series of dual operational amplifierscontaina The LH2011 is internally compensated, but external com: pair of LM11 op amps ina single hermetic package, com- _ pensation may be added for improved frequency stability, bining the best features of existing bipolar and FET op particularly with capacitive loads. Offset voltage bal- = amps. The LH2011 is similar to the LH2108A, except that ancingis also provided, with the balance range determined J input currents have been reduced by more thanafactorof by a low-resistance potentiometer. ten. Offset voltage end drift have also been Improved. Otherwise, the device is the electrical equivalent of the LH2108, except that the negative common-mode limit is Compared to FETs, the device provides inherently lower 0.6V less, performance is specified down to +2.5V offset voltage and offset voitage drift. along with at least and the guaranteed output drive has been increased to an order of magnitude better long-term stability. Low fre- + 2 mA. The input noise is somewhat higher, but amplifier ‘quency noise is also somewhat reduced. Bias current is _noise is obscured by resistor noise with higher source significantly lower even under laboratory conditions, and _—resistances. the low arift makes compensation practical, Offset Cur The L42011 has applications as electrometer amplifiers, fer t doce have a much 0 . ‘oug) er a This k 'S_charge integrators, analog memories, iow frequency ac- 8. it does have a much lower power drain. Ths 1OW we ters of for requency shaping in slow servo loops. dissipation as te a eat vantage of eliminatingwarm — can be substituted for existing circuits to provide im- up time in critical applications. proved performance or eliminate trimming operations. Typical characteristics for 25°C ( — §5°C to 125°C) are: The greater precision can also be used to extend the * Offset voltage: 100 wV (200 »V) dynamic range of logarithmic amplifiers, light meters and * Bias current: 25 pA(65 pA) solid-state particle detectors. © Offset current: 0.5 pA(3 pA) The LH2011 is manufactured with standard bipolar proc- © Temperature drift: 1 .V/°C essing using super-gain transistors. * Long-term stability: 10 «V/year Connection Diagrams Dual-In-Line Package Flat Package come avr 1, ny input S [> ‘ vO [ve] ourrur vO (v6) ovrrur ourmur ie [is] come comp sonnet 2 aance muvee |G io

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same a E = 5 fi v GH ia G a sever 2 ; om [7] fa) ow << | an wv owt ovreur [a] ag caurur[a} at COMP mmm zy ‘TOP VIEW TOP view ‘Order Number LH2011D, LH2011BD, ‘Order Number LH2011F or LH2011CD or LH2011BF ‘See Package D16C ‘See Package F16B 3384

Absolute Maximum Ratings x Vs Total Supply Voltage 40V 8 ‘iy Input Current (Note 1) +10mA —_ Po Power Dissipation at 25°C 500mW r Derate Linearly above 100°C at 100°C/W I Is¢ Output Short-Circuit Duration (Note 2) Indefinite Ty — Junction Temperature 150°C 8 Tag Storage Temperature Range 65°C to + 150°C =a Ta Operating Temperature Range wa LH2011CD — 25°C to +85°C = LH2011D, LH2011F ~55°Cto + 125°C Fr LH2011BD, LH2011BF — 55°C to +125°C. i Lead Temperature (Soldering, 10 seconds) 300°C 8 (?) Electrical Characteristics v, = + 15v, twin Ts Twax unless noted. Pre | cottons Fe [maw | aw wy OM os nput ote [usw | [or fos! [oz los] Tosti], Voltage a ee los __‘Input Oftset [usec [Pos To [fs fw | Petal, Current a a Input Bias [nee T [a [oo | fo Too [To [eo], Current ee ee Sd WoslaT Offset Vortage +] 3 2 3 wre rift Alos/AT Offset Current far Dit Ay Large Signal [Vs = = 15V T=25°C Voltage Gain |ig= + 2mA Vos #12V Ngee sy a ers Teese riooma Lyesay | [ae] [a [ool [fo] | Vo= = 15V pol pep yet yp CMAR Common-Mode ewe 0 oe ett st pet “6 Pejection A PSAR Power Supply [usc [00 |e [| oo Te TT ee [100 | 48 Rejection Ratio pet oy fet yey 1g Supply Gurrent pease ee ee mA a Oe | _ Isc Output Short iT; = Tax mA Circuit Current . Note 1: Tha inputs are shunted with back to-backdodes for oervollageprolectaf. Terelore, excessive curent wil Yow a dilerenalinou voltage inex mete Ae a tte between the Inpels snags some imiting resistence inuved, in adalvon, a2 Kd mimum reslatence in each input ded 1 mod possible ale inated by supply veversats Note 2; Curent ating protecte tn output wnen iis shorted to ground or any voltage less than the sues. With continuous overloads. package issipa Noted, Theve specications apply trtestat Vg~ = 15V and Voy =12.5V(~12V a125°0. 14V.Vg= = 20Vand Vow =OV:inadtion, Vos sas tesed at ge 2250 ond Vou + | eceas vit parameters ae sample esledto5% LTPD atthe same conditions as Noted The values are average-calculaleg rom measuremris a125°C and tere 3-385

2 Typical Characteristics (tor singie a

He mie} sl Input Offset Current . 77; = Input Blas Current _ ft a = ; y a) Fea EE seer ee =27/, E Oo i a & N 5 [[ ¥ | :! y RSS | EEE eo | PSS Peer Ea ZA Z| b-RSSS : REY i: : = 3 rr 4 : ASS a. : = = : | oe >. = o ™ ‘SOURCE RESISTANCE (52) ~ so sivalent Input Noise \\e . _ A Drift: Single Source equ = : Resistor (Unbalanced) . m 3 sf “(Seg Pt i Seeseees 3 a |~ 4 : : (7 acer =] a: Lspagil a BATE i” ) | sane : . s _ e TIME (3), , : te , — a S . . acoueey ons " SOURCE RESISTANCE (52) __. ‘Common-Mode Rejection i = Limits Input Common-Mode —— 4 ” : rr ‘OEE , oN meee | ary tog Eaapniee | . can ™ “ ° sumer vounocen / z = ° 10 1000 tk 10k ‘ — “ ' FREQUENCY (Hz) , | " Current (Each ° TEMPERATURE (°C) wos Ma = cL ° Een = i “RL - oo : act) (a F PAS | i item Ee rf = Kit] :™ Ar ani ea : ESS ! eae

2 Shon a TT Ba NS - iret

ieee CANS HALE | aces 2ecseeeeeena Ho PEE at ~ L th «10k 100k 1M 10M sumy : ‘ _m FREQUENCY (Hz), ° (LOAD CURRENT (#mA) _

r Typical Characteristics (continued) (for single device) a Open Loop Response Follower Settling Time Inverter Settling Time Ps ww We es 100 pee Se = 2 SSS » SQ" FS postrve ser: rom REE rasrive ster 70.0 = _ ESS a = RE teeanve ste . NEGATIVE STEP. 80s Fy is 3 aVour™ 3 + avpyr = 20 a ee Ne ee E oeses oft i Nimes] 2 2” RSS 3° ERS ao =

3 BAS aiem F Sc 3 so os es es oe es ee | w

3 Ss = 3 ,iM coeeeen s CONT

a es Nese eee 2 ft Nepe sy bey tet | c 9 eae FESS R Ar Baa oy FE TN » CONT » LOOT NTT art we to to 0m . 0 ew ce ew a ReQUENcY oe) re us me ro) ‘Stability with Over- Closed Loop Output ‘Slew Rate Compensation Impedance Seti -sett aati PAS 7-T-

7 Se eS CTA 3) pm

: RS B tet] bg 4 / | | 3 = 6 35 = 4 Fel NUE vot ae cue * >" 2, Se LAAN Bape rt ei ul & & 5 i Ha 2 ek 12 Balt oo LENG wifi] ry 100 te 10k 10 yo ww ao? e® oS 10 100 tk 10k 100k 1M TO Application Hints When working with circuitry capable of resolving pico- couples are the junction of the IC package and the printed ampere level signals, leakage currents in circuitry external circuit board (35 »V/°C for ‘copper-kovar) and internal to the op amp can significantly degrade performance. resistor connections. Problems can be avoided by keeping High quality insulation is a must (Kel-F and Teflon rate low level circuitry away from heat generating elements. high). Proper cleaning of all insulating surfaces to remove Mounting the IC directly to the PC board while keeping fluxes and other residues is also required. This includes package leads short and the input leads close together the IC package as well as sockets and printed circuit can also help. boards. When operating in high humidity environments or wi 7 oy 7 fith the LH2011 there is a temptation to remove the bias- near °C, some form ofeutace coating may enecessery ——_rrentcompensation resister normaly used onthe non 10 provide a moisture barrier. inverting input of a summing amplifier. Direct connection The effects of board leakage can be minimized by encir- of the inputs to ground or a low-impedance voltage source cling the input circuitry with a conductive guard ring is not recommended with supply voltages greater than operated at a potential close to that of the inputs. For about 3V. The potential problem involves the loss of one critical applications, the floating metal tid is best con- ‘supply which can cause excessive current in the second nected to the guard. This might be accomplished with a supply. Destruction of the IC could result if the current to dab of conductive paint connecting the metal lid to the the input of the device is not limited to less than 100 mA or “no-connection” pin 14. if there is much more than 1 xF bypass on the supply buss. Electrostatic shielding of high impedance circuitry is Although these difficulties can be largely avoided by in- advisable, stalling clamp diodes across the supply tines on every PC Error voltages can also be generated in the external cir- board, a conservative design would include enough resist- " ance in the input lead to limit current to 10 mA if the input cuitry. Thermocouples formed between dissimilar metals i lead is pulled to either supply by internal currents. This can cause hundreds of microvolts of error in the presence recaution is by no means limited to the LH2011. of temperature gradients. The most troublesome thermo- La y . 3387

= | input Guarding Input Protection 8 Input guarding can drastically reduce surface leakage. Current is limited by R2 even when input is connected to Layout for the LH2011 is shown here. Guarding both sides. voltage source outside common-mode range. tone supply T | ot board is required. Bulk leakage reduction is less and reverses, current is limited by Ri. These resistors do not 2 | depends on guard ring width, affect normal operation, a J cuano 2 nro = avreur cour wo = oureur "oe M "owe Rg x= + bar oa i i i i A va Y= cour outrur valine Input resistor limits current when input exceeds supply euaro voltages, when power for op amp is turned off or when out put is shorted. Guard ring is connected to low impedance point at same potential as sensitive input leads. Connections for various op amp configurations are shown here a fe Fa ovrrur wre m Len | “ ourrur I Balancing and Over-Compensation Over-compensation will improve stability with capacitive a loading (see curves). Offset voltage adjustment range is determined by balance potentiometer resistance as indi cated in the table. v ourrur 4. Ae inns 8 m te ™ 2 a + win aay Range ® tT e s5mv—100%0 22 10k our 2 me sl 208 2K toe stabinty with “ © 204 * over compensation cuve 3388

r Resistance Multiplication x Equivalent feedback resistance is 10 GQ, but only stand- A high-input-impedance ac amplifier for a piezoelectric 8 ard resistors are used. Even though the offset voltage is transducer. Input resistance of 880 M@ and gain of 10 is multiplied by 100, output offset is actually reduced obtained. a because error is dependent on offset current rather than | om bias current. Voltage on summing junction is less than =x Smv. ; 3 15, - m2 me over | Og “= on | 3 3 = i c LN | a = = iy ‘w ” 8 - Your % (1 = ry 4 ung i a #3) $faw —es arate (1082) $9 8 1 aos RO RA ft pment (082) aateenoere * gain trim = v " RS, R2+R9 cate Bootseneing Bootstrapping input shield for a follower reduces cable capacitance, leakage, and spurious voltages from cable Follower input resistance is 1 G0. With the Input open, off- flexing, Instability can be avoided with small capacitor on ‘set voltage is multiplied by 100, but the added error is not input. significant because the op amp offset is low. ‘on 4 om vw Ts | input) T oo ~ > With summing amplifier, summing node is at virtual ground so input shield is best grounded. Small feedback capacitor insures stability. This circuit multiplies RC time constant to 1000 seconds and provides low output impedance. LN | wor) LN | m ourrer ae court i = swnor.

72 Ft Sm2 + Ro) >

ALR, tt ages yi svour=""Fagae+vos) 3380

= | Differential Amplifiers 8 This differential amplifier handles high input voltages. Two op-amp instrumentation amplifier has poor ac Resistor mismatches and stray capacitors should be common-mode rejection. This can be improved at the ex- = balanced out for best common-mode rejection. pense of differential bandwidth with C2. S| oy =P oe as a /CM(MAX) ry /OUT(MAX) ux -_ Ay= 3 Vat a at Hy = - . 5 anttatt curr ovreur = = i Ll ne oor oF a * i tz cat Sn ~ S som * gain set Vg= 215V T trim for de CMRR- 1 trim for de OMRR fo= 102 = # trim for ac CMBR High gain differential instrumentation amplitier includes input guarding, cable bootstrapping and bias current compensa- tion. Differential bandwidth is reduced by C1 which also makes common-mode rejection less dependent on matching of input amplifiers. cc) - Q-+ ‘s a ® fe x aN ein 1 current zero ™ a 1 voltage balance * gain c—— © 1 dcomne ** acCMRR For moderate-gain instrumentation amplifiers, input amplifiers can be connected as followers. This simplifies circuitry, but A2 must also have low drift. cn 2 ED tf fH wt “ ad o ast, Fr) eee AS us AISA, R2= AM z RZ Ave a Vat trim torde CMAR feet torac OMAR 3-300

r Bias Current Compensation =z Precise bias current compensation for use with unreg- This circuit shows how bias current compensation canbe ulated supplies. Reference voltage is available for other used on a voltage follower. circuitry = 7 = E v {Qa =x mills

1 En 8

ne ” ™ 3 ar i a cy 8 om |g 2d cur (7) a a - 100m | 4 urat INPUT: 2 Voltmeter . High-input-impedance millivoltmeter, Input current is proportional to input voltage, about 10 pA at full-scale. Reference could be used to make direct reading linear ohmmeter. am v v @ ms 2 m = Ts a : fm LY ® a a ON/OFF re Ww o ar Reo By z J. sarrenes 2S 13M v 4 0K oh van am + "eat ws eo > ey fan = 7 8 = as a « ‘ow a . « ™ 1D ; . wut aa in ra ql " aor ‘SCALE i re) o” ns s 150 754 2 om “1x scalecalibrate © RANGE 3301

8 Current meter ranges from 100 pA to 3 mA full-scale. Voltage across input is 100 »V at lower ranges rising to3 mV at3 mA, Buf- x= fers on op amp are to remove ambiguity with high-current overload. Output can also drive DVM or DPM. a wn a AAA = un 8g pls = br 2 " sancceno” 9 am J Ey of = [2 .™, xr “Ny so W “ a a 6 . a mos " . J Yi © v 1 1x seatecaloate J ae ! tn 3x scale callrate aw $ includes reversing switen mY +—L_? ~ seaue Current Source Precision current source has 10 uA to 10 mA ranges with output compliance of 30V to — 5V. Output current is fully adjustable on each range with a calibrated, ten-turn potentiometer. Error light indicates saturation. wore REVERSE ° ERROR 6 fro + te on © 2 9 ' curt mer o- oe ° oy x ' ann . ol | rs 0 tae * aw

1 H vo * calibrate range

Lwo ory Telect for iggq< 100 pA 3392

Fast Amplifiers <= These inverters have bias current and offset voltage of Follower has 10 xs settling to 1 mV, but signal repetition 8 LH2011 along with speed of the FET op amps. Open loop frequency should not exceed 10 kHz if the FET amplifier is gain is about 140 dB and settling time to 1 mV about 8 xs. ac coupled to input. The circuit does not behave well if | = Overioad-recovery delay can be eliminated by direct cou- common-mode range is exceeded. Cc pling the FET amplifier to summing node. . x i 3 nur A i] " = A Lam 4 <= tone 8 ist ba Ey = 0 inst 2 . = i our ~ mn » "s ny in Pe sea ouinst

4 Heater Control

f Proportional control crystal oven heater uses lead/lag = compensation for fast settling. Time constant is changed uy with R4 and compensating resistor RS. If Q2is inside oven, ae a regulated supply is recommended for 0.1°C control This 100x amplifier has smail and large signal bandwidth vi of t MHz. The LH2011 greatly reduces offset voltage, bias current and gain error. Eliminating long recovery deiay for greater than 100% overload requires direct coupling of A2 Pr} to input. Py a “ * one Pa “ ea J : Ay @ a Seu wrt ‘ ik 3 woe wae ‘ Fry \\y Z f = 2 : te solldtantaiom i 1 mylar Fra 4 close thermal coupling between sensor and oven shell is recommended. 3393

= | “Leakage isolation 8 ‘Switch leakage in this sample and hold does not reach storage capacitor. = ‘ im a nor = a 8 ourrur saurue ot mt exe Polystyrene or Teflon = I 1 required it protected: = > . gate switch is used g Apeak detector designed for extended hold. Leakage currents of peak-detecting diodes and reset switch are absorbed before ZZ | reaching storage capacitor. Ht wt mm eH b “me fe “4 vega 0 tony trequited it 1 has gate. cs ox protection ode be = Zin * Polystyrene or Tetlon ce me

1 N18), a

eset “ 300 4s min single pulse WW 200 18 min repetitive pulse > 300 He max sine wave error< mV Standard-Cell Buffer Reset is provided for this integrator and switch leakage is Battery powered buffer amplifier for standard cell has isolated from the summing junction. Greater precision negligible loading and disconnects cell for low supply can be provided if bias-current compensation Is included. voltage or overload on output. Indicator diode extin- or guishes as disconnect circuitry is activated. & + eur, 4 e é LX stanpano oureur. ett : J LN L iad L ane “ . En) . bed => LED tm = 4 Py to * it + 2 reg Oo v ry ™ anit x * Polystyrene or Tetion fest . Petia Wr ‘cannot have gateprotection dlode: VrH> Vout Gate switch is uses 304

Logarithmic Amplitiers . Unusual frequency compensation gives this logarithmic converter a 100 us time constant from 1 mA down to 100 nA, increasing from 200 xs to 200 ms from 10 nA to 10 pA. Optional bias current compensation can give 10 pA resolution from —§5°C to 100°C. Scale factor is 1V/decade and temperature compensated. = ar = ™ a | ” ‘ @ ait Lo 2 sine t 3300 ppmi*C. Type Q209 available Light meter has eight-decade range. Bias current compensation can give input current resolution of better than 2 pA over 15°C to 55°C. BATTERY. a A ie 24 b : sow L Te

3 L_|

E al 2 V1.0 @ IN =100 nd, ** Mi=ts@ lin= 1m 3305

5 Schematic Diagram (for single device)

5 * ui | oO alle ia rf = | g s | Ld E . Li? | - sD | a / Tk nl a. tS 1 raat Definition of Terms Input offset voltage: That voltage which must be applied |§ Common-mode rejection: The ratio of the input voltage between the input terminals to bias the unloaded outputin range to the change in offset voltage between the the linear region. extremes. Input offset current: The difference in the currents atthe — Temperature drift: The change of a parameter measured input terminals when the output is unloaded in the linear at 25°C and either temperature extreme divided by the region. temperature change. Input bias current; The absolute value of the average of Supply-voltage rejection: The ratio of the specified the two input currents. ‘supply-voltage change (either or both supplies) to the Input resistance: The ratio of the change in input voltage Change in offset voltage between the extremes. tothe change in input current on either input withtheother Supply current: The current required from the power grounded. ‘source to operate the amplifier with the output unloaded Large signal voltage gain: The ratio of the specified out- 274 operating in the linear range. Put voltage swing to the change in differential input voltage required to produce it. 3306