LF444QML TI | Alldatasheet

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www.ti.com SNOSAO9 –DECEMBER 2010 LF444QMLQuadLowPowerJFETInputOperationalAmplifier Check forSamples: LF444QML 1FEATURES DESCRIPTION The LF444 quad low power operationalamplifier 23• 1/4Supply Currentofa LM148: 250 providesmany ofthesame AC characteristicsas theμA/Amplifier(Max) industrystandardLM148 whilegreatlyimprovingthe• Low InputBias Current:100 pA (max) DC characteristicsof the LM148. The amplifierhas

  • High Gain Bandwidth: 1 MHz thesame bandwidth,slewrate,and gain(10kΩ load) as the LM148 and onlydraws one fourththe supply• High Slew Rate:1 V/μs currentof the LM148. In additionthe wellmatched• Low Noise VoltageforLow Power 35 nV/√Hz highvoltageJFET inputdevicesoftheLF444 reduce
  • Low InputNoise Current0.01pA/√Hz the inputbias and offsetcurrentsby a factorof 10,000 over the LM148. The LF444 alsohas a very• High InputImpedance: 1012Ω low equivalentinputnoisevoltagefora low power• High Gain,VO = ±10V,R L = 10kΩ:25K (Min) amplifier. The LF444 ispincompatiblewiththeLM148 allowing an immediate 4 times reductionin power drainin many applications.The LF444 should be used wherever low power dissipationand good electrical characteristicsarethemajorconsiderations. Connection Diagram Figure1. CDIP -Top View See Package Number NAK0014D Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2BI-FETisa trademarkofTexas Instruments. 3Allothertrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2010,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

SNOSAO9 –DECEMBER 2010 www.ti.com SimplifiedSchematic Figure2. 1/4Quad DetailedSchematic Figure3. 1/4Quad These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates.

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www.ti.com SNOSAO9 –DECEMBER 2010 ABSOLUTE MAXIMUM RATINGS (1) SupplyVoltage ±18V DifferentialInputVoltage ±30V InputVoltageRange (2) ±15V OutputShortCircuitDuration(3) Continuous Power Dissipation(4)(5) 900 mW TJmax 150°C θJA (Typical) 100°C/W OperatingTemperatureRange −55°C ≤ TA ≤ 125°C StorageTemperatureRange −65°C ≤ TA ≤ 150°C ESD Tolerance(6) Ratingtobe determined (1) AbsoluteMaximum Ratingsindicatelimitsbeyond whichdamage tothedevicemay occur.OperatingRatingsindicateconditionsfor whichthedeviceisfunctional,butdo notensurespecificperformancelimits.Forensuredspecificationsand testconditions,see the ElectricalCharacteristics.The ensuredspecificationsapplyonlyforthetestconditionslisted.Some performancecharacteristicsmay degradewhen thedeviceisnotoperatedunderthelistedtestconditions. (2) Unlessotherwisespecifiedtheabsolutemaximum negativeinputvoltageisequaltothenegativepower supplyvoltage. (3) Any oftheamplifieroutputscan be shortedtogroundindefinitely,however,more thanone shouldnotbe simultaneouslyshortedas the maximum junctiontemperaturewillbe exceeded. (4) The maximum power dissipationmust be deratedatelevatedtemperaturesand isdictatedby TJmax (maximum junctiontemperature), θJA (packagejunctiontoambientthermalresistance),and TA (ambienttemperature).The maximum allowablepower dissipationatany temperatureisPDmax = (TJmax -TA)/θJA orthenumber givenintheAbsoluteMaximum Ratings,whicheverislower. (5) Max. Power Dissipationisdefinedby thepackage characteristics.OperatingthepartneartheMax. Power Dissipationmay cause the parttooperateoutsidespecifiedlimits. (6) Human body model,1.5kΩ inserieswith100 pF. Table1.QUALITY CONFORMANCE INSPECTION Mil-Std-883,Method 5005 -Group A Subgroup Description Temp (°C)

1 Statictestsat +25

2 Statictestsat +125

3 Statictestsat -55

4 Dynamic testsat +25

5 Dynamic testsat +125

6 Dynamic testsat -55

7 Functionaltestsat +25

9 Switchingtestsat +25

10 Switchingtestsat +125

11 Switchingtestsat -55

12 Settlingtimeat +25

13 Settlingtimeat +125

14 Settlingtimeat -55

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SNOSAO9 –DECEMBER 2010 www.ti.com LF444 ELECTRICAL CHARACTERISTICS DC PARAMETERS The followingconditionsapply,unlessotherwisespecified.VS = ±15V,VCM = 0V,R S = 0Ω,R L = 0Ω Sub-Symbol Parameter Conditions Notes Min Max Unit groups -10 10 mV 1 VIO InputOffsetVoltage R S = 10KΩ -14 14 mV 2,3 -0.05 0.05 nA 1 IIO InputOffsetCurrent R L = 10KΩ -10 10 nA 2 -0.10 0.10 nA 1 +IIB InputBiasCurrent R L = 10KΩ -20 20 nA 2 -0.10 0.10 nA 1 -IIB InputBiasCurrent R L = 10KΩ -20 20 nA 2 VO = 0 to+10V, 25 V/mV 1 +AVS LargeSignalVoltageGain See (1) R L = 10KΩ,R S = 10KΩ 15 V/mV 2,3 VO = 0 to-10V, 25 V/mV 1 -AVS LargeSignalVoltageGain See (1) R L = 10KΩ,R S = 10KΩ 15 V/mV 2,3 +VO OutputVoltageSwing R L = 10KΩ,VI= +1V 12 V 1,2,3 -VO OutputVoltageSwing R L = 10KΩ,VI= -1V -12 V 1,2,3 InputCommon Mode VoltageVCM See (2) 9 -9 V 1,2,3Range CMRR Common Mode RejectionRatio R S = 10KΩ,VCM = ±9V 70 dB 1,2,3 PSRR+ Power SupplyRejectionRatio VS = ±15V toVS = ±6V 70 dB 1,2,3 PSRR- Power SupplyRejectionRatio VS = ±15V toVS = ±6V 70 dB 1,2,3 IS SupplyCurrent 1.0 mA 1,2,3 -3.0 -20 mA 1 +IOS OutputShortCircuitCurrent VI= 1V -3.0 -40 mA 2,3 3.0 20 mA 1 -IOS OutputShortCircuitCurrent VI= -1V 3.0 40 mA 2,3 (1) DataloginK = V/mV. (2) Parametertestedgo-no-goonly.Specifiedby theCMRR test.

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www.ti.com SNOSAO9 –DECEMBER 2010 TYPICAL PERFORMANCE CHARACTERISTICS InputBias Current InputBias Current Figure4. Figure5. PositiveCommon-Mode Supply Current InputVoltageLimit Figure6. Figure7. NegativeCommon-Mode InputVoltageLimit PositiveCurrentLimit Figure8. Figure9. Copyright© 2010,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LF444QML

SNOSAO9 –DECEMBER 2010 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) NegativeCurrentLimit Output VoltageSwing Figure10. Figure11. Output VoltageSwing Gain Bandwidth Figure12. Figure13. Bode Plot Slew Rate Figure14. Figure15.

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www.ti.com SNOSAO9 –DECEMBER 2010 TYPICAL PERFORMANCE CHARACTERISTICS (continued) UndistortedOutput Distortionvs Frequency VoltageSwing Figure16. Figure17. Open Loop Common-Mode Frequency Response RejectionRatio Figure18. Figure19. Power Supply EquivalentInput RejectionRatio Noise Voltage Figure20. Figure21. Copyright© 2010,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LF444QML

SNOSAO9 –DECEMBER 2010 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) Open Loop VoltageGain Output Impedance Figure22. Figure23. InverterSettlingTime Figure24.

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www.ti.com SNOSAO9 –DECEMBER 2010 PULSE RESPONSE R L = 10 kΩ,C L = 10 pF Small SignalInverting Small SignalNon-Inverting Figure25. Figure26. Large SignalInverting Large SignalNon-Inverting Figure27. Figure28. Copyright© 2010,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LF444QML

SNOSAO9 –DECEMBER 2010 www.ti.com APPLICATION HINTS Thisdeviceisa quad low power op amp withJFET inputdevices(BI-FET™ ).These JFETs have largereverse breakdown voltagesfromgatetosourceand draineliminatingtheneed forclamps acrosstheinputs.Therefore, largedifferentialinputvoltagescan easilybe accommodated withouta largeincreasein inputcurrent.The maximum differentialinputvoltageisindependentofthesupplyvoltages.However,neitheroftheinputvoltages shouldbe allowedtoexceed thenegativesupplyas thiswillcause largecurrentstoflowwhich can resultina destroyedunit. Exceeding the negativecommon-mode limiton eitherinputwillforcethe outputto a high state,potentially causinga reversalofphase totheoutput.Exceedingthenegativecommon-mode limiton bothinputswillforce the amplifieroutputto a highstate.In neithercase does a latchoccursinceraisingthe inputback withinthe common-mode rangeagainputstheinputstageand thustheamplifierina normaloperatingmode. Exceedingthepositivecommon-mode limiton a singleinputwillnotchange thephase oftheoutput;however,if bothinputsexceed thelimit,theoutputoftheamplifierwillbe forcedtoa highstate. The amplifierswilloperatewitha common-mode inputvoltageequaltothepositivesupply;however,thegain bandwidthand slewratemay be decreasedinthiscondition.When thenegativecommon-mode voltageswings towithin3V ofthenegativesupply,an increaseininputoffsetvoltagemay occur. Each amplifierisindividuallybiasedto allownormal circuitoperationwithpower suppliesof ±3.0V.Supply voltageslessthanthesemay degradethecommon-mode rejectionand restricttheoutputvoltageswing. The amplifierswilldrivea 10 kΩ loadresistanceto±10V overthefulltemperaturerange.Iftheamplifierisforced todriveheavierloadcurrents,however,an increaseininputoffsetvoltagemay occuron thenegativevoltage swingand finallyreachan activecurrentlimiton bothpositiveand negativeswings. Precautionsshouldbe takentoensurethatthepower supplyfortheintegratedcircuitneverbecomes reversedin polarityorthattheunitisnotinadvertentlyinstalledbackwardsina socketas an unlimitedcurrentsurgethrough theresultingforwarddiodewithintheIC couldcause fusingoftheinternalconductorsand resultina destroyed unit. As withmost amplifiers,careshouldbe takenwithleaddress,component placementand supplydecouplingin ordertoensurestability.For example,resistorsfromtheoutputtoan inputshouldbe placedwiththebody close to the inputto minimize“pick-up” and maximize the frequencyof the feedback pole by minimizingthe capacitancefromtheinputtoground. A feedbackpoleiscreatedwhen the feedbackaround any amplifierisresistive.The parallelresistanceand capacitancefromtheinputofthedevice(usuallytheinvertinginput)toAC groundsetthefrequencyofthepole. Inmany instancesthefrequencyofthispoleismuch greaterthantheexpected3 dB frequencyoftheclosed loopgainand consequentlythereisnegligibleeffecton stabilitymargin.However, ifthefeedbackpoleisless thanapproximately6 timestheexpected3 dB frequencya leadcapacitorshouldbe placedfromtheoutputtothe inputoftheop amp. The valueoftheadded capacitorshouldbe such thattheRC timeconstantofthiscapacitor and theresistanceitparallelsisgreaterthanorequaltotheoriginalfeedbackpoletimeconstant.

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www.ti.com SNOSAO9 –DECEMBER 2010 TypicalApplication *ForR2 = 50kΩ,R4 = 330k ±1% ForR2 = 100k,R4 = 75k ±1% ForR2 = 200k,R4 = 56k ±1% Polystyrene *FilmresistortypeRN60C To calibrate,insertprobeinpH =7 solution.Setthe“TEMPERATURE ADJUST ”pot,R2, tocorrespondtothesolution temperature:fullclockwisefor0°C, and proportionatelyforintermediatetemperatures,usinga turns-countingdial. Then set“CALIBRATE ”potso outputreads7V. Typicalprobe= IngoldElectrodes#465-35 Figure29. pH Probe Amplifier/TemperatureCompensator Copyright© 2010,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LF444QML

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REVISION HISTORY

Date Released Revision Section Changes 12/16/2010 A New releasetocorporateformat 1 MDS datasheetconvertedtostandardcorporate format.MDS MNLF444M-X Rev 0AL willbe archived.

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www.ti.com 20-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) LF444MD/883 Active Production CDIP SB (NAK) | 14 25 | TUBE Yes Call TI Level-1-NA-UNLIM -55 to 125 LF444MD/

883 Q YQ ACO

883 Q >Y >T

(1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 21-May-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) LF444MD/883 NAK CDIP SB 14 25 502 14 9652 4.32 Pack Materials-Page 1

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