LF442QML TI | Alldatasheet
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www.ti.com SNOSAO8A –DECEMBER 2010–REVISED MARCH 2013 LF442QMLDualLowPowerJFETInputOperationalAmplifier Check forSamples: LF442QML 1FEATURES DESCRIPTION The LF442 dual low power operationalamplifier 2• 1/10Supply Currentofa LM1458: 400 μA (Max) providesmany ofthesame AC characteristicsas the• Low InputBias Current:50 pA (Typ) industrystandardLM1458 whilegreatlyimprovingthe
- Low InputOffsetVoltage:1 mV (Typ) DC characteristicsoftheLM1458. The amplifierhas thesame bandwidth,slewrate,and gain(10kΩ load)• Low InputOffsetVoltageDrift:7 μV/°C (Typ) as theLM1458 and onlydraws one tenththesupply• High Gain Bandwidth: 1 MHz (Typ) currentof the LM1458. In additionthe wellmatched
- High Slew Rate:1 V/μs (Typ) highvoltageJFET inputdevicesoftheLF442 reduce the inputbias and offsetcurrentsby a factorof• Low Noise VoltageforLow Power: 35 nV/√Hz 10,000 over the LM1458. A combinationof careful(Typ) layoutdesignand internaltrimmingensuresverylow• Low InputNoise Current:0.01pA/√Hz (Typ) inputoffsetvoltageand voltagedrift.The LF442 also
- High InputImpedance: 1012Ω has a very low equivalentinputnoisevoltagefora lowpower amplifier. The LF442 is pin compatiblewith the LM1458 allowingan immediate10 timesreductionin power drainin many applications.The LF442 should be used where low power dissipationand good electrical characteristicsarethemajorconsiderations. TypicalConnection Connection Diagram Pin4 connectedtocase Figure1. Top View See Package Number LMC Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2010–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.
SNOSAO8A –DECEMBER 2010–REVISED MARCH 2013 www.ti.com SimplifiedSchematic Figure2. 1/2Dual DetailedSchematic Figure3. 1/2Dual These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates.
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www.ti.com SNOSAO8A –DECEMBER 2010–REVISED MARCH 2013 AbsoluteMaximum Ratings(1) SupplyVoltage ±18V DifferentialInputVoltage ±30V InputVoltageRange (2) ±15V OutputShortCircuitDuration(3) Continuous Maximum Power Dissipation(4) 900mW TJ max 150°C StillAir 161°C/W θJA ThermalResistance 500LF/MinAirflow 87°C/W θJC 33°C/W OperatingTemperatureRange −55°C ≤ TA ≤ 125°C StorageTemperatureRange −65°C ≤ TA ≤ 150°C Lead Temperature(Soldering,10 sec.) 260°C ESD Tolerance(5) 500V (1) AbsoluteMaximum Ratingsindicatelimitsbeyond whichdamage tothedevicemay occur.OperatingRatingsindicateconditionsfor whichthedeviceisfunctional,butdo notensurespecificperformancelimits.Forensuredspecificationsand testconditions,see the ElectricalCharacteristics.The ensuredspecificationsapplyonlyforthetestconditionslisted.Some performancecharacteristicsmay degradewhen thedeviceisnotoperatedunderthelistedtestconditions. (2) Unlessotherwisespecifiedtheabsolutemaximum negativeinputvoltageisequaltothenegativepower supplyvoltage. (3) Any oftheamplifieroutputscan be shortedtogroundindefinitely,however,more thanone shouldnotbe simultaneouslyshortedas the maximum junctiontemperaturewillbe exceeded. (4) The maximum power dissipationmust be deratedatelevatedtemperaturesand isdictatedby TJmax (maximum junctiontemperature), θJA (packagejunctiontoambientthermalresistance),and TA (ambienttemperature).The maximum allowablepower dissipationatany temperatureisPDmax = (TJmax -TA)/θJA orthenumber givenintheAbsoluteMaximum Ratings,whicheverislower. (5) Human Body Model,100pF dischargedthrough1.5KΩ QualityConformance Inspection Table1.Mil-Std-883,Method 5005 -Group A Subgroup Description Temp (°C)
1 Statictestsat +25
2 Statictestsat +125
3 Statictestsat -55
4 Dynamic testsat +25
5 Dynamic testsat +125
6 Dynamic testsat -55
7 Functionaltestsat +25
9 Switchingtestsat +25
10 Switchingtestsat +125
11 Switchingtestsat -55
12 Settlingtimeat +25
13 Settlingtimeat +125
14 Settlingtimeat -55
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SNOSAO8A –DECEMBER 2010–REVISED MARCH 2013 www.ti.com LF442 ElectricalCharacteristicsDC Parameters The followingconditionsapply,unlessotherwisespecified.VS = ±15V,VCM = 0V,R S = 0Ω Sub-Symbol Parameter Conditions Notes Min Max Unit groups ICC SupplyCurrent 500 µA 1,2,3 -5.0 5.0 mV 1 VIO InputOffsetVoltage R S = 10KΩ -7.5 7.5 mV 2,3 0.1 nA 1 ±IIB InputBiasCurrent 20 nA 2 -0.05 0.05 nA 1 IIO InputOffsetCurrent -10 10 nA 2 CMRR Common Mode RejectionRatio VCM = ±11V,R S = 10K 70 dB 1,2,3 VS+ = +15V to+6V, 70 dB 1,2,3VS-= -15V PSRR Power SupplyRejectionRatio VS-= -15V to-6V, 70 dB 1,2,3VS+ = +15V VO = 0V to+10V, 25 V/mV 4 +AVS LargeSignalVoltageGain See (1) R L = 10KΩ 15 V/mV 5,6 VO = 0V to-10V, 25 V/mV 4 -AVS LargeSignalVoltageGain See (1) R L = 10KΩ 15 V/mV 5,6 VO + OutputVoltageSwing VI= ±11V,R L = 10K 12 V 4,5,6 VO - OutputVoltageSwing VI= ±11V,R L = 10K -12 V 4,5,6 InputCommon Mode VoltageVCM See (2) 11 -11 V 4,5,6Range (1) V/mV inunitscolumn isequivalenttoK indatalog. (2) Parametertestedgo-no-goonly,specifiedby CMRR test.. AC Parameters The followingconditionsapply,unlessotherwisespecified.VS = ±15V,VCM = 0V,R S = 0Ω Sub-Symbol Parameter Conditions Notes Min Max Unit groups VO = -5V to+5V, AV = 1,SR + Slew Rate 0.6 V/µS 7R L = 2KΩ,C L -100pF VO = +5V to-5V, SR - Slew Rate AV = 1,R L = 2KΩ, 0.6 V/µS 7 C L -100pF GBW Gain Band Width VI= 50mV, ƒ = 20KHz 0.6 MHz 7
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www.ti.com SNOSAO8A –DECEMBER 2010–REVISED MARCH 2013 TypicalPerformance Characteristics InputBias Current InputBias Current Figure4. Figure5. PositiveCommon-Mode Supply Current InputVoltageLimit Figure6. Figure7. NegativeCommon-Mode InputVoltageLimit PositiveCurrentLimit Figure8. Figure9. Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LF442QML
SNOSAO8A –DECEMBER 2010–REVISED MARCH 2013 www.ti.com TypicalPerformance Characteristics(continued) NegativeCurrentLimit Output VoltageSwing Figure10. Figure11. Output VoltageSwing Gain Bandwidth Figure12. Figure13. Bode Plot Slew Rate Figure14. Figure15.
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www.ti.com SNOSAO8A –DECEMBER 2010–REVISED MARCH 2013 TypicalPerformance Characteristics(continued) UndistortedOutput Voltage Distortionvs Frequency Swing Figure16. Figure17. Open Loop Frequency Common-Mode Rejection Response Ratio Figure18. Figure19. Power Supply Rejection EquivalentInputNoise Ratio Voltage Figure20. Figure21. Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LF442QML
SNOSAO8A –DECEMBER 2010–REVISED MARCH 2013 www.ti.com TypicalPerformance Characteristics(continued) Open Loop VoltageGain Output Impedance Figure22. Figure23. InverterSettlingTime Figure24.
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www.ti.com SNOSAO8A –DECEMBER 2010–REVISED MARCH 2013 Pulse Response R L = 10 kΩ,C L = 10 pF Small SignalInverting Small SignalNon-Inverting Large SignalInverting Large SignalNon-Inverting Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LF442QML
SNOSAO8A –DECEMBER 2010–REVISED MARCH 2013 www.ti.com APPLICATION HINTS Thisdeviceisa duallow power op amp withinternallytrimmedinputoffsetvoltagesand JFET inputdevices(BI- FET II).These JFETs have largereversebreakdown voltagesfromgatetosourceand draineliminatingtheneed forclamps acrosstheinputs.Therefore,largedifferentialinputvoltagescan easilybe accommodated withouta largeincreaseininputcurrent.The maximum differentialinputvoltageisindependentof the supplyvoltages. However,neitheroftheinputvoltagesshouldbe allowedtoexceed thenegativesupplyas thiswillcause large currentstoflowwhichcan resultina destroyedunit. Exceeding the negativecommon-mode limiton eitherinputwillforcethe outputto a high state,potentially causinga reversalofphase totheoutput.Exceedingthenegativecommon-mode limiton bothinputswillforce the amplifieroutputto a highstate.In neithercase does a latchoccursinceraisingthe inputback withinthe common-mode rangeagainputstheinputstageand thustheamplifierina normaloperatingmode. Exceedingthepositivecommon-mode limiton a singleinputwillnotchange thephase oftheoutput;however,if bothinputsexceed thelimit,theoutputoftheamplifierwillbe forcedtoa highstate. The amplifierswilloperatewitha common-mode inputvoltageequaltothepositivesupply;however,thegain bandwidthand slewratemay be decreasedinthiscondition.When thenegativecommon-mode voltageswings towithin3V ofthenegativesupply,an increaseininputoffsetvoltagemay occur. Each amplifierisindividuallybiasedto allownormal circuitoperationwithpower suppliesof ±3.0V.Supply voltageslessthanthesemay degradethecommon-mode rejectionand restricttheoutputvoltageswing. The amplifierswilldrivea 10 kΩ loadresistanceto± 10V overthefulltemperaturerange. Precautionsshouldbe takentoensurethatthepower supplyfortheintegratedcircuitneverbecomes reversedin polarityorthattheunitisnotinadvertentlyinstalledbackwardsina socketas an unlimitedcurrentsurgethrough theresultingforwarddiodewithintheIC couldcause fusingoftheinternalconductorsand resultina destroyed unit. As withmost amplifiers,careshouldbe takenwithleaddress,component placementand supplydecouplingin ordertoensurestability.For example,resistorsfromtheoutputtoan inputshouldbe placedwiththebody close to the inputto minimize“pick-up” and maximize the frequencyof the feedback pole by minimizingthe capacitancefromtheinputtoground. A feedbackpoleiscreatedwhen the feedbackaround any amplifierisresistive.The parallelresistanceand capacitancefromtheinputofthedevice(usuallytheinvertinginput)toAC groundsetthefrequencyofthepole. Inmany instancesthefrequencyofthispoleismuch greaterthantheexpected3 dB frequencyoftheclosed loopgainand consequentythereisnegligibleeffecton stabilitymargin.However, ifthe feedbackpoleisless thanapproximately6 timestheexpected3 dB frequencya leadcapacitorshouldbe placedfromtheoutputtothe inputoftheop amp. The valueoftheadded capacitorshouldbe such thattheRC timeconstantofthiscapacitor and theresistanceitparallelsisgreaterthanorequaltotheoriginalfeedbackpoletimeconstant.
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www.ti.com SNOSAO8A –DECEMBER 2010–REVISED MARCH 2013 TypicalApplications Figure25. BatteryPowered StripChartPreamplifier Runs from9v batteries(±9V supplies) Fullysettablegainand timeconstant Batterypowered supplyallowsdirectplug-ininterfacetostripchartrecorderwithoutcommon-mode problems Figure26. “No FET ” Low Power V→F Converter Trim1M potfor1 kHz full-scaleoutput 15 mW power drain No integratorresetFET required Mount D1 and D2 incloseproximity 1% linearityto1 kHz Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LF442QML
SNOSAO8A –DECEMBER 2010–REVISED MARCH 2013 www.ti.com Figure27. High EfficiencyCrystalOven Controller
- Tcontrol= 75°C
- A1's outputrepresentstheamplifieddifferencebetween theLM335 temperaturesensorand thecrystaloven's temperature
- A2,a freerunningdutycyclemodulator,drivestheLM395 tocompletea servoloop
- Switchedmode operationyieldshighefficiency
- 1% metalfilmresistor Figure28. ConventionalLog Amplifier R T = TelLabs typeQ81 Trim5k for10 μA throughthe5k–120k combination *1% filmresistor
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www.ti.com SNOSAO8A –DECEMBER 2010–REVISED MARCH 2013 Figure29. UnconventionalLog Amplifier Q1, Q2, Q3 areincludedon LM389 amplifierchipwhichistemperature-stabilizedby theLM389 and Q2-Q3, whichact as a heater-sensorpair. Q1, theloggingtransistor,isthusimmune toambienttemperaturevariationand requiresno temperature compensationatall. Table2.RevisionHistory Date Released Revision Section Changes 12/16/2010 A New releasetocorporateformat 1 MDS datasheetconvertedintoone corporate datasheetformat.MNLF442M-X Rev 0A1 willbe archived. 03/26/2013 A AllSections Changed layoutofNationalData SheettoTIformat Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LF442QML
www.ti.com 5-Apr-2023 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead finish/ Ball material (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LF442MH/883 OBSOLETE TO-99 LMC 8 TBD Call TI Call TI LF442MH/883 5962-9763301QGA Q ACO 5962-9763301QGA Q (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1
www.ti.com 5-Apr-2023 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2
www.ti.com PACKAGE OUTLINE C .305-.335 [7.75-8.51] .165-.185 [4.19-4.70] .010-.040 [0.25-1.02] SEATING PLANE .040 MAX [1.02] .335-.370 [8.51-9.40] .110-.160 [2.79-4.06] .028-.034 [0.71-0.86] .500 MIN [12.7] .225 [5.72] 8X .016-.021 [0.41-0.53] .200 [5.08] .100 [2.54] UNCONTROLLED LEAD DIA .055[1.397] MAX .029-.045 [0.74-1.14]
45 TYP
TO-CAN - 5.72 mm max heightLMC0008A TRANSISTOR OUTLINE 4220610/B 09/2024 NOTES: 1. All linear dimensions are in inches [millimeters]. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Pin numbers shown for reference only. Numbers may not be marked on package. 4. Reference JEDEC registration MO-002/TO-99. MAX .010 [0.25] C A A
www.ti.com EXAMPLE BOARD LAYOUT (45 ) TYP .003 MAX [0.07] ALL AROUND 7X .003 MAX [0.07] ALL AROUND ( .200 ) [5.08] ( .055) [1.4] 7X ( .055) [1.4] METAL 8X ( .031) VIA [0.8] (R.002 ) TYP [0.05] TO-CAN - 5.72 mm max heightLMC0008A TRANSISTOR OUTLINE 4220610/B 09/2024 LAND PATTERN EXAMPLE NON-SOLDER MASK DEFINED SCALE: 12X 7X SOLDER MASK OPENING SOLDER MASK OPENING METAL
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