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Sample & Buy T echnical Documents Tools & Software Support & Community LF442 SNOSC03F –APRIL 1999–REVISED OCTOBER 2014 LF442DualLowPowerJFETInputOperationalAmplifier
1 Features 3 Description
The LF442 dual low power operational amplifiers 1• 1/10 Supply Current of a LM1458: 400 μA (Max) provide many of the same AC characteristics as the• Low Input Bias Current: 50 pA (Max) industry standard LM1458 while greatly improving the
- Low Input Offset Voltage: 1 mV (Max) DC characteristics of the LM1458. The amplifiers have the same bandwidth, slew rate, and gain (10 kΩ• Low Input Offset Voltage Drift: 7 μV/°C (Typ) load) as the LM1458 and only draw one tenth the• High Gain Bandwidth: 1 MHz supply current of the LM1458. In addition the well• High Slew Rate: 1 V/μs matched high voltage JFET input devices of the LF442 reduce the input bias and offset currents by a• Low Noise Voltage for Low Power: 35 nV/√Hz factor of 10,000 over the LM1458. A combination of• Low Input Noise Current: 0.01 pA/√Hz careful layout design and internal trimming ensures• High Input Impedance: 1012Ω very low input offset voltage and voltage drift. The
- High Gain VO = ±10V, RL = 10k: 50k (Min) LF442 also has a very low equivalent input noise voltage for a low power amplifier.
2 Applications The LF442 is pin compatible with the LM1458
- High Speed Integrators allowing an immediate 10 times reduction in power drain in many applications. The LF442 should be• Fast D/A Converters used where low power dissipation and good electrical• Sample and Hold Circuits characteristics are the major considerations. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) LF442ACN PDIP (8) 9.59 mm × 6.35 mm LF442AMH TO-99 (8) 8.96 mm Diameter (1) For all available packages, see the orderable addendum at the end of the datasheet. Inverting Amplifier An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.
SNOSC03F –APRIL 1999–REVISED OCTOBER 2014 www.ti.com Table of Contents
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision E (October 2013) to Revision F Page Changes from Revision D (March 2013) to Revision E Page Changes from Revision C (March 2013) to Revision D Page
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5 Pin Configuration and Functions
See Package Number LMC0008C Top View Pin 4 connected to case See Package Number P0008E Top View Pin Functions PIN I/O DESCRIPTION NAME NO. Output A 1 Output Amplifier A Output Inverting Input A 2 Input Amplifier A Inverting Input Non-Inverting 3 Input Amplifier A Non-Inverting InputInput A V- 4 Power Negative Supply Non-Inverting 5 Input Amplifier B Non-Inverting InputInput B Inverting Input B 6 Input Amplifier B Inverting Input Output B 7 Output Amplifier B Output V+ 8 Power Positive Supply Copyright © 1999–2014, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LF442
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6 Specifications
6.1 Absolute Maximum Ratings(1)(2)
Supply Voltage ±22V ±18V Differential Input Voltage ±38V ±30V Input Voltage Range(3) ±19V ±15V Output Short Circuit Duration(4) Continuous Continuous (1) “Absolute Maximum Ratings”indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. (2) Refer to RETS442X for LF442MH military specifications. (3) Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage. (4) Any of the amplifier outputs can be shorted to ground indefinitely, however, more than one should not be simultaneously shorted as the maximum junction temperature will be exceeded.
6.2 Absolute Maximum Ratings(1)(2)
Tj max 150°C 115°C Operating Temperature Range See(3)(4) See(3)(4) Lead Temperature (Soldering, 10 sec.) 260°C 260°C (1) “Absolute Maximum Ratings”indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. (2) Refer to RETS442X for LF442MH military specifications. (3) These devices are available in both the commercial temperature range 0°C ≤ TA ≤ 70°C and the military temperature range −55°C ≤ TA ≤ 125°C. The temperature range is designated by the position just before the package type in the device number. A “C”indicates the commercial temperature range and an “M”indicates the military temperature range. The military temperature range is available in “H” package only. (4) The value given is in static air.
6.3 Handling Ratings
Tstg Storage temperature range -65 150 °C
6.4 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT Supply Voltage LF442A ±20 V Supply Voltage LF442 ±15 V
6.5 Thermal Information
THERMAL METRIC(1) LMC0008C P0008E UNIT
8 PINS 8 PINS
RθJA 400 linear feet/min air flow 65 114 Junction-to-ambient thermal resistance(Typical) Static air 165 152 °C/W RθJC Junction-to-case thermal resistance 21(Typical) (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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6.6 DC Electrical Characteristics(1)(2)
PARAMETER TEST CONDITIONS UNIT MIN TYP MAX MIN TYP MAX VOS Input Offset Voltage RS = 10 kΩ, TA = 25°C 0.5 1.0 1.0 5.0 mV Over Temperature 7.5 mV ΔVOS/ΔT Average TC of Input Offset RS = 10 kΩ 7 7 μV/°CVoltage IOS Input Offset Current VS = ±15V(1)(3) Tj = 25°C 5 25 5 50 pA Tj = 70°C 1.5 1.5 nA Tj = 125°C 10 nA IB Input Bias Current VS = ±15V(1)(3) Tj = 25°C 10 50 10 100 pA Tj = 70°C 3 3 nA Tj = 125°C 20 nA RIN Input Resistance Tj = 25°C 1012 1012 Ω AVOL Large Signal Voltage Gain VS = ±15V, VO = ±10V, 50 200 25 200 V/mVRL = 10 kΩ, TA = 25°C Over Temperature 25 200 15 200 V/mV VO Output Voltage Swing VS = ±15V, RL = 10 kΩ ±12 ±13 ±12 ±13 V VCM Input Common-Mode ±16 +18 ±11 +14 V Voltage Range −17 −12 V CMRR Common-Mode Rejection RS ≤ 10 kΩ 80 100 70 95 dBRatio PSRR Supply Voltage Rejection See(4) 80 100 70 90 dBRatio IS Supply Current 300 400 400 500 μA (1) Unless otherwise specified, the specifications apply over the full temperature range and for VS = ±20V for the LF442A and for VS = ±15V for the LF442. VOS, IB, and IOS are measured at VCM = 0. (2) Refer to RETS442X for LF442MH military specifications. (3) The input bias currents are junction leakage currents which approximately double for every 10°C increase in the junction temperature, Tj. Due to limited production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient temperature as a result of internal power dissipation, PD. Tj = TA + θjAPD where θjA is the thermal resistance from junction to ambient. Use of a heat sink is recommended if input bias current is to be kept to a minimum. (4) Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice from ±15V to ±5V for the LF442 and ±20V to ±5V for the LF442A.
6.7 AC Electrical Characteristics(1)(2)
PARAMETER TEST CONDITIONS UNIT MIN TYP MAX MIN TYP MAX Amplifier to Amplifier Coupling TA = 25°C, f = 1 Hz-20 kHz (Input −120 −120 dBReferred) SR Slew Rate VS = ±15V, TA = 25°C 0.8 1 0.6 1 V/μs GBW Gain-Bandwidth Product VS = ±15V, TA = 25°C 0.8 1 0.6 1 MHz en Equivalent Input Noise Voltage TA = 25°C, RS = 100Ω, f = 1 kHz 35 35 nV/√Hz in Equivalent Input Noise Current TA = 25°C, f = 1 kHz 0.01 0.01 pA/√Hz (1) Unless otherwise specified, the specifications apply over the full temperature range and for VS = ±20V for the LF442A and for VS = ±15V for the LF442. VOS, IB, and IOS are measured at VCM = 0. (2) Refer to RETS442X for LF442MH military specifications. Copyright © 1999–2014, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: LF442
6.8 Typical Performance Characteristics
Figure 2. Input Bias CurrentFigure 1. Input Bias Current Figure 3. Supply Current Figure 4. Positive Common-Mode Input Voltage Limit Figure 6. Positive Current LimitFigure 5. Negative Common-Mode Input Voltage Limit
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Figure 13. Distortion vs Frequency Figure 14. Undistorted Output Voltage Swing Figure 15. Open Loop Frequency Response Figure 16. Common-Mode Rejection Ratio Figure 18. Equivalent Input Noise VoltageFigure 17. Power Supply Rejection Ratio
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6.8.1 Pulse Response
Figure 22. Small Signal Inverting Figure 23. Small Signal Non-Inverting Figure 24. Large Signal Inverting Figure 25. Large Signal Non-Inverting
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7 Detailed Description
7.1 Overview
noise voltage for a low power amplifier.
7.2 Functional Block Diagram
Figure 26. Each Amplifier
7.3 Feature Description
output voltage of the op-amp VOUT is given by the equation VOUT = AOL(IN+ - IN-).
7.4 Device Functional Modes
7.4.1 Input and Output Stage
Figure 27. 1/2 Dual LF442
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8 Application and Implementation
validate and test their design implementation to confirm system functionality.
8.1 Application Information
voltage and voltage drift. The LF442 also has a very low equivalent input noise voltage for a low power amplifier.
8.2 Typical Applications
- Battery Powered Strip Chart Preamplifier
- "No FET" Low Power V to F Converter
- High Efficiency Crystal Oven Controller
- Conventional Log Amplifier
- Unconvential Log Amplifier
8.2.1 Battery Powered Strip Chart Preamplifier
Figure 28. Battery Powered Strip Chart Preamplifier
8.2.1.1 Design Requirements
Runs from 9V batteries (±9V supplies). Fully settable gain and time constant. Battery powered supply allows direct plug-in interface to strip chart recorder without common-mode problems.
8.2.1.2 Detailed Design Procedure
large increase in input current. The maximum differential input voltage is independent of the supply voltages. currents to flow which can result in a destroyed unit. common-mode range again puts the input stage and thus the amplifier in a normal operating mode. both inputs exceed the limit, the output of the amplifier will be forced to a high state. to within 3V of the negative supply, an increase in input offset voltage may occur. voltages less than these may degrade the common-mode rejection and restrict the output voltage swing. The amplifiers will drive a 10 kΩ load resistance to ± 10V over the full temperature range. capacitance from the input of the device (usually the inverting input) to AC ground set the frequency of the pole. and the resistance it parallels is greater than or equal to the original feedback pole time constant.
8.2.1.3 Application Curves
Figure 29. Input and Output Waveforms, Gain = 10, Time Constant = 1 Second
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Figure 30. "No FET" Low Power V to F Converter
8.2.2.1 Design Requirements
- Trim 1M pot for 1 kHz full-scale output.
- No integrator reset FET required.
- Mount D1 and D2 in close proximity.
8.2.2.2 Detailed Design Procedure
8.2.2.3 Application Curves
Figure 31. Input and Output Waveforms
8.2.3 High Efficiency Crystal Oven Controller
Figure 32. High Efficiency Crystal Oven Controller
8.2.3.1 Design Requirements
- A1's output represents the amplified difference between the LM335 temperature sensor and the crystal
- A2, a free running duty cycle modulator, drives the LM395 to complete a servo loop.
- Switched mode operation yields high efficiency.
8.2.3.2 Detailed Design Procedure
8.2.4 Conventional Log Amplifier
Figure 33. Conventional Log Amplifier
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8.2.4.1 Design Requirements
- Trim 5k for 10 μA through the 5k–120k combination.
8.2.4.2 Detailed Design Procedure
8.2.5 Unconventional Log Amplifier
Figure 34. Unconventional Log Amplifier
8.2.5.1 Design Requirements
- Q1, Q2, Q3 are included on LM389 amplifier chip which is temperature-stabilized by the LM389 and Q2-Q3,
which act as a heater-sensor pair.
- Q1, the logging transistor, is thus immune to ambient temperature variation and requires no temperature
8.2.5.2 Detailed Design Procedure
9 Power Supply Recommendations
power supply voltage is ±5V.
10 Layout
10.1 Layout Guidelines
capacitance from the input to ground.
10.2 Layout Example
Figure 35. LF442 Layout
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11 Device and Documentation Support
11.1 Trademarks
All trademarks are the property of their respective owners.
11.2 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
11.3 Glossary
SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Copyright © 1999–2014, Texas Instruments Incorporated Submit Documentation Feedback 19 Product Folder Links: LF442
www.ti.com 19-Jul-2016 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LF442-MWA ACTIVE WAFERSALE YS 0 1 Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM -40 to 85 LF442ACN/NOPB ACTIVE PDIP P 8 40 Green (RoHS & no Sb/Br) CU SN Level-1-NA-UNLIM 0 to 70 LF 442ACN LF442AMH ACTIVE TO-99 LMC 8 500 TBD Call TI Call TI -55 to 125 ( LF442AMH ~ LF442AMH) LF442AMH/NOPB ACTIVE TO-99 LMC 8 500 Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM -55 to 125 ( LF442AMH ~ LF442AMH) LF442CN/NOPB ACTIVE PDIP P 8 40 Green (RoHS & no Sb/Br) CU SN Level-1-NA-UNLIM 0 to 70 LF 442CN (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.
www.ti.com 19-Jul-2016 Addendum-Page 2 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
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