LF400A

LF400A NSC | Alldatasheet

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LF400A/SLASHLF400 Fast-Settling JFET-Input Operational Amplifier June 1989 LF400A/SLASHLF400 Fast-Settling JFET-Input Operational Amplifier General Description The LF400 is a fast-settling (under 400 ns to 0/PERIOD01% for a 10V output step) Bi-FET operational amplifier/PERIOD Features in- clude 16 MHz bandwidth/COMMA 60V/SLASHms inverting slew rate/COMMA low input offset voltage (0/PERIOD5 mV for the LF400A at 25/SNAKEC)/COMMA and adjustable output current limit/COMMA enabling the amplifier to drive 600X loads/PERIOD

Applications

Y High speed ramp generators Y Fast buffers Y Sample-and-holds Y Fast integrators Y Piezoelectric transducer signal conditioners Typical Connection TL/SLASHH/SLASH9414–1 Connection Diagram Note/COLONPin 4 connected to case/PERIOD TL/SLASHH/SLASH9414–2 Top View Order Number LF400ACH/COMMA LF400CH/COMMA LF400AMH or LF400MH See NS Package Number H08B Simplified Schematic TL/SLASHH/SLASH9414–3 BI-FETTM is a trademark of National Semiconductor Corporation/PERIOD C1995 National Semiconductor Corporation RRD-B30M115/SLASHPrinted in U/PERIOD S/PERIOD A/PERIOD

If Military/SLASHAerospace specified devices are required/COMMA please contact the National Semiconductor Sales Office/SLASHDistributors for availability and specifications/PERIOD Supply Voltage g18V Differential Input Voltage g32V Input Voltage Range (Note 3) g16V Output Short Circuit Duration (Pin 6) Continuous Power Dissipation (Note 4) H package 500 mW Junction Temperature (T JMAX) 150 /SNAKEC Storage Temperature b65/SNAKECt o a150/SNAKEC Lead Temperature (Soldering/COMMA 10 sec/PERIOD)a300/SNAKEC ESD Susceptibility (Note 9) 800V Operating Ratings(Notes1/AMPERSAND2 ) Temperature Range T MIN s TA s TMAX LF400AMH/COMMA LF400MH b55/SNAKEC s TA s a125/SNAKEC LF400ACH/COMMA LF400CH 0 /SNAKEC s TA s a70/SNAKEC Positive Supply Voltage a10V to a16V Negative Supply Voltage b10V to b16V The following specifications apply for Va ea 15V and Vb eb 15V unless otherwise specified/PERIOD Tested Limits in Boldface apply for TJ e 25/SNAKECt o9 5/SNAKEC/PERIOD Design Limits in Boldface apply for TA e TMIN to TMAX/n53454d492d434f4c4f4e other Design Limits are for TA e 25/SNAKEC/n53454d492d434f4c4f4e all other limits for TJ e 25/SNAKEC/PERIOD LF400ACH LF400CH Symbol Parameter Conditions Typical Tested Design Typical Tested Design Units (Note 6) Limit Limit (Note 6) Limit Limit (Note 7) (Note 8) (Note 7) (Note 8) ts Settling Time to 0/PERIOD01% SeeFigure 1 365 365 ns to 0/PERIOD10% SeeFigure 1 200 200 ns GBW Minimum Gain A V ea 1/COMMA CL e 10 pF 16 14 16 14 MHzBandwidth Product SR Minimum Slew Rate A v ea 1/COMMA CL e 10 pF 30 27 30 27 V/SLASH ms AV eb 1/COMMA CL e 10 pF 60 60 V/SLASH ms w Phase Margin A V ea 1/COMMA CL e 10 pF 60 60 Degrees en Input Noise Voltage f e 1 kHz/COMMA RS e 100X 23 23 nV/SLASH 0Hz Broadband/COMMA RS e 100X/COMMA 2/PERIOD3 2/PERIOD3 mV rms

10 Hz to 10 kHz

in Input Noise Current f e 1 kHz 0/PERIOD01 0/PERIOD01 pA/SLASH 0Hz Broadband 1/PERIOD0 1/PERIOD0 pA rms THD Total Harmonic Distortion f e 1 kHz/COMMA AV eb 1/COMMA0/PERIOD002 0/PERIOD002 %RL e 10k CIN Input Capacitance 7 7 pF

The following specifications apply for Va ea 15V and Vb eb 15V unless otherwise specified/PERIOD Tested Limits in Boldface apply for TJ e 25/SNAKECt o9 5/SNAKEC/PERIOD Design Limits in Boldface apply for TA e TMIN to TMAX/n53454d492d434f4c4f4e other Design Limits are for TA e 25/SNAKEC/n53454d492d434f4c4f4e all other limits for TJ e 25/SNAKEC/PERIOD LF400ACH LF400CH Symbol Parameter Conditions Typical Tested Design Typical Tested Design Units (Note 6) Limit Limit (Note 6) Limit Limit (Note 7) (Note 8) (Note 7) (Note 8) VOS Maximum Input Offset Voltage V CM e 0V/COMMA TJ e 25/SNAKEC g0/PERIOD5 g3/PERIOD0 mV RS e 0/COMMA TJ e 70/SNAKEC g2/PERIOD0 g5/PERIOD0 mVRL e % IOS Maximum Input Offset Current V CM e 0V (Note 5) g50 g100 g50 g100 pA g2/PERIOD5 g2/PERIOD5 nA IB Maximum Input Bias Current V CM e 0V (Note 5) 100 200 100 200 pA 26 26 nA RIN Input Resistance 10 11 1011 X VCM Input Common-Mode Voltage b12 to g11 b12 to g11 VRange a14 a14 AVOL Minimum Large Using Pin 6 V O e g10V/COMMA RL e 2k X 300 100 300 100 V/SLASHmV Signal Voltage Using Pin 8 V O e g10V/COMMA RL e 600X 280 100 280 100 V/SLASHmVGain VO Minimum Output Using Pin 6 R L e 2k X g12/PERIOD5g12/PERIOD0 g12/PERIOD5g12/PERIOD0 V Voltage Swing Using Pin 8 R L e 600X g12/PERIOD0g11/PERIOD0 g12/PERIOD0g11/PERIOD0 V ISC Output Pulse Test 25 25 mA Short Circuit MIN Using Pin 6 15 15 mA Current MAX Using Pin 6 45 45 mA MIN Using Pin 8 100 100 mA RO Output Using Pin 6 Open Loop/COMMA DC 75 75 X Resistance Using Pin 8 Open Loop/COMMA DC 50 50 X CMRR Minimum DC Common Mode b11V s VIN s a11V 100 90 100 80 dBRejection Ratio PSRR Minimum DC Power Supply a10V s Va s a15V/COMMA Rejection Ratio b15V s Vb s b10V/COMMA 100 90 100 80 dB VCM e 0V IS Maximum Supply Current V O e 0V/COMMA RL e % 11/PERIOD0 13/PERIOD0 11/PERIOD0 13/PERIOD0 mA

The following specifications apply for Va ea 15V/COMMA Vb eb 15V/COMMA and TJ e 25/SNAKEC unless otherwise specified/PERIOD Tested Limits in Boldface apply for TJ eb 55/SNAKECt o a125/SNAKEC LF400AMH LF400MH Symbol Parameter Conditions Typical Tested Design Typical Tested Design Units (Note 6) Limit Limit (Note 6) Limit Limit (Note 7) (Note 8) (Note 7) (Note 8) ts Settling Time to 0/PERIOD01% SeeFigure 1 365 365 ns to 0/PERIOD10% SeeFigure 1 200 200 ns GBW Minimum Gain A V ea 1/COMMA CL e 10 pF 16 14 16 14 MHz Bandwidth Product 10 10 MHz SR Minimum Slew Rate A V ea 1/COMMA CL e 10 pF 30 27 30 27 V/SLASHms AV eb 1/COMMA CL e 10 pF 60 60 V/SLASH ms w Phase Margin A V ea 1/COMMA CL e 10 pF 60 60 Degrees en Input Noise Voltage f e 1 kHz/COMMA RS e 100X 23 23 nV/SLASH 0Hz Broadband/COMMA RS e 100X/COMMA 2/PERIOD3 2/PERIOD3 mV rms in Input Noise Current f e 1 kHz 0/PERIOD01 0/PERIOD01 pA/SLASH 0Hz Broadband 1/PERIOD0 1/PERIOD0 pA rms THD Total Harmonic Distortion f e 1 kHz/COMMA AV eb 1/COMMA0/PERIOD002 0/PERIOD002 %RL e 10k CIN Input Capacitance 7 7 pF The following specifications apply for Va ea 15V/COMMA Vb eb 15V/COMMA and TJ e 25/SNAKEC unless otherwise specified/PERIOD Tested Limits in Boldface apply for TJ eb 55/SNAKECt o a125/SNAKEC/PERIOD LF400AMH LF400MH Symbol Parameter Conditions Typical Tested Design Typical Tested Design Unit (Note 6) Limit Limit (Note 6) Limit Limit (Note 7) (Note 8) (Note 7) (Note 8) VOS Maximum Input V CM e 0V/COMMA TJ e 25/SNAKEC g0/PERIOD5 g3/PERIOD0 mV Offset Voltage R S e 0/COMMA g2/PERIOD0 g5/PERIOD0 mVRL e % IOS Maximum Input V CM e 0V (Note 5) g50 g100 g50 g100 pA Offset Current g15 g25 nA IB Maximum Input V CM e 0V (Note 5) 100 200 100 200 pA Bias Current 35 50 nA RIN Input Resistance 10 11 1011 X VCM Input Common-Mode b12 to g11 b12 to g11 VVoltage Range a14 a14 AVOL Minimum Large Using Pin 6 V O e g10V/COMMA RL e 2k X 300 100 300 50 V/SLASHmV Signal Voltage Using Pin 8 VO e g10V/COMMA RL e 600X 280 100 280 50 V/SLASHmV Gain

The following specifications apply for Va ea 15V/COMMA Vb eb 15V/COMMA and TJ e 25/SNAKEC unless otherwise specified/PERIOD Tested Limits in Boldface apply for TJ eb 55/SNAKECt o a125/SNAKEC/PERIOD(Continued) LF400AMH LF400MH Symbol Parameter Conditions Typical Tested Design Typical Tested Design Units (Note 6) Limit Limit (Note 6) Limit Limit (Note 7) (Note 8) (Note 7) (Note 8) VO Minimum Output Using Pin 6 R L e 2k X g12/PERIOD0 g12/PERIOD0 V Voltage Swing g12/PERIOD5g11/PERIOD5 g12/PERIOD5g11/PERIOD5 V Using Pin 8 R L e 600X g12/PERIOD0g11/PERIOD0 g12/PERIOD0g11/PERIOD0 V ISC Output Pulse Test 25 25 mA Short Circuit MIN Using Pin 6 15 15 mA Current MAX Using Pin 6 45 45 mA MIN Using Pin 8 100 100 mA RO Output Using Pin 6 Open Loop/COMMA DC 75 75 X Resistance Using Pin 8 Open Loop/COMMA DC 50 50 X CMRR Minimum DC Common Mode b11V s VIN s a11V 100 90 100 80 dB Rejection Ratio 80 75 dB PSRR Minimum DC Power Supply a10V s Va s a15V/COMMA 100 90 100 80 dB Rejection Ratio b15V s Vb s b10V/COMMA 85 75 dB VCM e 0V IS Maximum Supply Current V O e 0V/COMMA RL e % 11/PERIOD0 13/PERIOD0 11/PERIOD0 13/PERIOD0 mA 13/PERIOD0 15/PERIOD0 mA Note 1/COLONAbsolute Maximum Ratings indicate limits beyond which damage to the device may occur/PERIOD DC and AC electrical specifications do not apply when operating the device beyond its specified operating conditions/PERIOD Note 2/COLONAll voltages are with respect to ground/PERIOD Note 3/COLONUnless otherwise specified/COMMA the Absolute Minimum Input Voltage is equal to the negative power supply voltage/PERIOD Note 4/COLONThe maximum power dissipation must be derated at elevated temperatures as is dictated by T JMAX/COMMAiJA/COMMA and the ambient temperature TA/PERIODiJA for the LF400H is 150/SNAKEC/SLASHW in free air/COMMA so a heat sink will generally be required when TA is greater than about 70/SNAKEC/PERIODiJC for the LF400H is 17/SNAKEC/SLASHW/COMMA which dictates the use of a heat sink with iCA less than about 35/SNAKEC/SLASHW when TA ea 125/SNAKEC/PERIOD Note 5/COLONThe input bias currents are junction leakage currents which approximately double for every 10/SNAKEC increase in the junction temperature TJ/PERIOD Due to limited production test time/COMMA input bias currents are measured at TJ e 25/SNAKEC/PERIOD In normal operation the junction temperature rises above the ambient temperature as a result of internal power dissipation PD/PERIOD Use of a heat sink is recommended when input bias current must be minimized/PERIOD Note 6/COLONTypicals represent the most likely parametric norm/PERIOD Note 7/COLONGuaranteed to National’s AOQL (Average Outgoing Quality Level)/PERIOD Note 8/COLONGuaranteed/COMMA but not 100% production tested/PERIOD These limits are not used to calculate outgoing quality levels/PERIOD Note 9/COLONHuman body model/COMMA 100 pF discharged through a 1500X resistor/PERIOD

Typical Performance Characteristics Inverter Settling Time Bode Plot vs Temperature Gain Bandwidth Slew Rate vs Temperature Voltage Swing Undistorted Output Voltage Swing Undistorted Output Distortion vs Frequency Distortion vs Frequency Noise Voltage Equivalent Input Rejection AC Common-Mode AC Power Supply Rejection Voltage Range Common-Mode Input TL/SLASHH/SLASH9414–10

Typical Performance Characteristics (Continued) vs Supply Voltage Output Voltage Swing DC Gain vs Supply Voltage vs Temperature Input Bias Current Power Supply Voltage Power Supply Current vs TL/SLASHH/SLASH9414–11 Settling Time/n454d2d44415348Positive Output Swing TL/SLASHH/SLASH9414–12 Settling Time/n454d2d44415348Negative Output Swing TL/SLASHH/SLASH9414–13 Step Response TL/SLASHH/SLASH9414–14

Typical Performance Characteristics (Continued) Step Response TL/SLASHH/SLASH9414–15 Voltage Transfer Characteristic TL/SLASHH/SLASH9414–16 Voltage Transfer Characteristic TL/SLASHH/SLASH9414–17 TL/SLASHH/SLASH9414–18

Typical Performance Characteristics (Continued) Common/n454d2d44415348Mode Voltage Transfer Characteristic TL/SLASHH/SLASH9414–19 TL/SLASHH/SLASH9414–20 Application Hints The LF400 is a high-speed/COMMA low input bias current Bi-FET operational amplifier capable of settling to 0/PERIOD01% of a 10V output swing in less than 400 ns/PERIOD The rugged JFET inputs allow differential input voltages as high as 32V without a large increase in input current/PERIOD However/COMMA the inputs should never be driven to voltages lower than the negative supply/COMMA as this can result in input currents large enough to damage the device/PERIOD To prevent this from occurring when power is first applied/COMMA always turn the positive and negative power supplies on simultaneously/COMMA or turn the negative supply on first/PERIOD Exceeding the common-mode input range will not damage the device as long as the Absolute Maximum Ratings are not violated/COMMA but it will result in a high output voltage/PERIOD Latch- ing will not occur/COMMA however/COMMA and when the offending signal is removed the LF400 will recover quickly/PERIOD The nominal power supply voltage is g15V/COMMA but the LF400 will operate satisfactorily fromg10V to g16V/PERIOD The LF400 is functional down to g5V/COMMA but performance will be degraded/PERIOD (See Typical Performance curves/PERIOD) Settling Time Considerations The settling performance of any high-speed operational am- plifier is highly dependent on the external components and circuit board layout/PERIOD Capacitance between the amplifier summing junction and ground affects the closed-loop trans- fer function and should be minimized/PERIOD The compensation capacitor C C between the output and the inverting input should be carefully chosen to counteract the effect of the input capacitance/PERIOD Since input capacitance is made up of several stray capacitances that are difficult to predict/COMMA the compensation capacitor will generally have to be deter- mined empirically for best settling time/PERIOD A good starting point is around 10 pF for AV eb 1/PERIOD Settling time may be verified using a circuit similar to the one inFigure 1/PERIOD The LF400 is connected for inverting opera- tion/COMMA and the output voltage is summed with the input volt- age step/PERIOD When the LF400’s output voltage is equal to the input voltage/COMMA the voltage on the gate of Q1 will be zero/PERIOD Any voltage appearing at this point will represent an error/PERIOD The FET source follower output is observed on an oscilloscope/COMMA and the settling time is equal to the time required for the error signal displayed on the oscilloscope to decay to less than one-half the necessary accuracy (see oscilloscope photos of ‘‘Settling Time/n454d2d44415348Positive Output Swing’’ and ‘‘Set- tling Time/n454d2d44415348Negative Output Swing’’)/PERIOD For a 10V input sig- nal/COMMA settling time to 0/PERIOD01% (1 mV) will occur when the dis- played error is less than/suone/SLASH/intwomV/PERIOD Since settling time is strong- ly dependent on slew rate/COMMA settling will be faster for smaller signal swings/PERIOD The LF400’s inverting slew rate is faster than its non-inverting slew rate/COMMA so settling will be faster for in- verting applications/COMMA as well/PERIOD It is important to note that the oscilloscope input amplifier will be overdriven during a settling time measurement/COMMA so the oscilloscope must be capable of recovering from over- drive very quickly/PERIOD Very few oscilloscopes are suitable for this sort of measurement/PERIOD The signal generator used for set-

LF400A/SLASHLF400 Fast-Settling JFET-Input Operational Amplifier Physical Dimensionsinches (millimeters) Lit/PERIOD/DINGBAT1106144 Order Number LF400ACH/COMMA LF400CH/COMMA LF400AMH or LF400MH LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION/PERIOD As used herein/COLON 1/PERIOD Life support devices or systems are devices or 2/PERIOD A critical component is any component of a life systems which/COMMA (a) are intended for surgical implant support device or system whose failure to perform can into the body/COMMA or (b) support or sustain life/COMMA and whose be reasonably expected to cause the failure of the life failure to perform/COMMA when properly used in accordance support device or system/COMMA or to affect its safety or with instructions for use provided in the labeling/COMMA can effectiveness/PERIOD be reasonably expected to result in a significant injury to the user/PERIOD National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd/PERIOD Japan Ltd/PERIOD 1111 West Bardin Road Fax/COLON ( a49) 0-180-530 85 86 13th Floor/COMMA Straight Block/COMMA Tel/COLON 81-043-299-2309 Arlington/COMMA TX 76017 Email/COLON cnjwge /n41542d5349474etevm2/PERIODnsc/PERIODcom Ocean Centre/COMMA 5 Canton Rd/PERIOD Fax/COLON 81-043-299-2408 Tel/COLON 1(800) 272-9959 Deutsch Tel/COLON ( a49) 0-180-530 85 85 Tsimshatsui/COMMA Kowloon Fax/COLON 1(800) 737-7018 English Tel/COLON ( a49) 0-180-532 78 32 Hong Kong Fran/inthreeais Tel/COLON (a49) 0-180-532 93 58 Tel/COLON (852) 2737-1600 Italiano Tel/COLON (a49) 0-180-534 16 80 Fax/COLON (852) 2736-9960 National does not assume any responsibility for use of any circuitry described/COMMA no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications/PERIOD