LF353 FAIRCHILD | Alldatasheet

Document overview

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Technical content

Features

  • Internally trimmed offset voltage: 10mV
  • Low input bias current: 50pA
  • Wide gain bandwidth: 4MHz
  • High slew rate: 13V/ µs
  • High Input impedance: 10 12Ω

Description

The LF353 is a JFET input operational amplifier with an internally compensated input offset voltage. The JFET input device provides wide bandwidth, low input bias currents and offset currents. 8-DIP 8-SOP Internal Block Diagram LF353 Dual Operational Amplifier (JFET)

(One Section Only) Absolute Maximum Ratings Parameter Symbol Value Unit Power Supply Voltage V CC ±18 V Differential Input Voltage V I(DIFF) 30 V Input Voltage Range V I ±15 V Output Short Circuit Duration - Continuous - Power Dissipation P D 500 mW Operating Temperature Range T OPR 0 ~ +70 °C Storage Temperature Range T STG -65 ~ +150 °C

Electrical Characteristics

(VCC =+15V, VEE= -15V, TA=25 °C, unless otherwise specified) Parameter Symbol Conditions Min. Typ. Max. Unit Input Offset Voltage V IO RS=10KΩ -5 . 0 1 0 m V Input Offset Voltage Drift ∆VIO/∆T R S=10KΩ 0 °C≤TA≤+70 °C- 1 0 - µV/ °C Input Offset Current I IO - 25 100 pA 0 °C≤TA≤+70 °C- - 4 n A Input Bias Current I BIAS - 50 200 pA 0 °C≤TA≤+70 °C- - 8 n A Input Resistance R I - -1 0 12 - Ω Large Signal Voltage Gain G V VO(P-P) = ±10V 25 100 - V/mV RL = 2KΩ 0 °C≤TA≤+70 °C1 5 - - - Output Voltage Swing V O(P_P) RL = 10KΩ± 12 ±13.5 - V Input Voltage Range V I(R) - ±11 ±15/-12 - V Common Mode Rejection Ratio CMRR R S ≤ 10KΩ 70 100 - dB Power Supply Rejection Ratio PSRR R S ≤ 10KΩ 70 100 - dB Power Supply Current I CC -- 3 . 6 6 . 5 m A Slew Rate SR G V = 1 - 13 - V/ µS Gain-Bandwidth Product GBW - -4- M H z Channel Seperation CS f = 1Hz ~ 20KHz (Input referenced) - 120 - dB Equivalent Input Noise Voltage V NI RS = 100Ω f = 1KHz -1 6- nV/ Equivalent Input Noise Current I NI f = 1KHz - 0.01 - pA/ Hz Hz

6.40 ±0.20 3.30 ±0.30 0.130 ±0.012 3.40 ±0.20 0.134 ±0.008 #4 #5 0.252 ±0.008 9.20 ±0.20 0.79 2.54 0.100 0.031() 0.46 ±0.10 0.018 ±0.004 0.060 ±0.004 1.524 ±0.10 0.362 ±0.008 9.60 0.378MAX 5.08 0.200 0.33 0.013 7.62 0~15° 0.300 MAX MIN 0.25 +0.10 –0.05 0.010 +0.004 –0.002

4.92 ±0.20 0.194 ±0.008 0.41 ±0.10 0.016 ±0.004 1.27 0.050 5.72 0.225 1.55 ±0.20 0.061 ±0.008 0.1~0.25 0.004~0.001 6.00 ±0.30 0.236 ±0.012 3.95 ±0.20 0.156 ±0.008 0.50 ±0.20 0.020 ±0.008 5.13 0.202MAX #4 #5 0~8 0.56 0.022() 1.80 0.071 MAX0.10 MAX0.004 MAX MIN +0.10-0.05 0.15 +0.004-0.002 0.006 8-SOP

6/1/01 0.0m 001 Stock#DSxxxxxxxx  2001 Fairchild Semiconductor Corporation LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

Ordering Information

Product Number Package Operating Temperature LF353N 8-DIP 0 ~ + 70°C LF353M 8-SOP