LF351MX FAIRCHILD | Alldatasheet
Document overview
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Technical content
Features
- Internally trimmed offset voltage: 10mV
- Low input bias current : 50pA
- Wide gain bandwidth : 4MHz
- High slew rate : 13V/ µs
- High input impedance : 10 12Ω
Description
The LF351 is JFET input operational amplifier with an inter- nally compensated input offset voltage. The JFET input device provides wide bandwidth, low input bias currents and offset currents. 8-DIP 8-SOP Internal Block Diagram LF351 Single Operational Amplifier (JFET)
Parameter Symbol Value Unit Supply Voltage V CC ±18 V Differential Input Voltage V I(DIFF) 30 V Input Voltage Range V I ±15 V Output Short Circuit Duration - Continuous - Power Dissipation P D 500 mW Operating Temperature T OPR 0 ~ +70 °C Storage Temperature Range T STG -65 ~ +150 °C
Electrical Characteristics
(VCC = +15V, VEE = - 15V, TA = 25 °C. unless otherwise specified) Note : 1. Guaranteed by design. Parameter Symbol Conditions Min. Typ. Max. Unit Input Offset Voltage V IO RS = 10kΩ -5 . 0 1 0 mV0 °C≤TA≤70 °C- - 1 3 Input Offset Voltage Drift (Note1) ∆VIO/∆TR S = 10kΩ 0 °C≤TA≤70 °C- 1 0 - µV/ °C Input Offset Current I IO - 25 100 pA 0 °C≤TA≤70 °C --4 n A Input Bias Current I BAIS - 50 200 pA 0 °C≤TA≤70 °C --8 n A Input Resistance (Note1) R I -- 1 0 12 - Ω Large Signal Voltage Gain G V VO(P-P)= ±10V 25 100 - V/mVRL=2kΩ 0 °C≤TA≤70 °C1 5 - - Output Voltage Swing V O(P-P) RL = 10kΩ± 12 ±13.5 - V Input Voltage Range V I(R) - ±11 +15 -12 -V Common Mode Rejection Ratio C MRR RS≤10kΩ 70 100 - dB Power Supply Rejection Ratio P SRR RS≤10kΩ 70 100 - dB Power Supply Current I CC -- 2 . 3 3 . 4 m A Slew Rate (Note1) S R GV = 1 - 13 - V/ µs Gain-Bandwidth Product (Note1) GBW - - 4 - MHz
6.40 ±0.20 3.30 ±0.30 0.130 ±0.012 3.40 ±0.20 0.134 ±0.008 #4 #5 0.252 ±0.008 9.20 ±0.20 0.79 2.54 0.100 0.031() 0.46 ±0.10 0.018 ±0.004 0.060 ±0.004 1.524 ±0.10 0.362 ±0.008 9.60 0.378MAX 5.08 0.200 0.33 0.013 7.62 0~15° 0.300 MAX MIN 0.25 +0.10 –0.05 0.010 +0.004 –0.002 8-DIP
Mechanical Dimensions (Continued) Package Dimensions in millimeters 4.92 ±0.20 0.194 ±0.008 0.41 ±0.10 0.016 ±0.004 1.27 0.050 5.72 0.225 1.55 ±0.20 0.061 ±0.008 0.1~0.25 0.004~0.001 6.00 ±0.30 0.236 ±0.012 3.95 ±0.20 0.156 ±0.008 0.50 ±0.20 0.020 ±0.008 5.13 0.202MAX #4 #5 0~8 0.56 0.022() 1.80 0.071 MAX0.10 MAX0.004 MAX MIN +0.10-0.05 0.15 +0.004-0.002 0.006 8-SOP
Ordering Information
Product Number Package Operating Temperature LF351N 8-DIP 0 ~ + 70°C LF351M 8-SOP
6/1/01 0.0m 001 Stock#DSxxxxxxxx 2001 Fairchild Semiconductor Corporation LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.