LDLN025 STMICROELECTRONICS | Alldatasheet
Document overview
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- PDF pages: 22
Technical content
Datasheet sections
- 1 Block diagram
- 2 Pin configuration
- 3 Typical application diagram
- 4 Maximum ratings
- 5 Electrical characteristics
- 6 Typical characteristics
- 7 Package information
- 7.1 Flip-Chip4 package information
- 7.2 Flip-Chip4 packing information
- 7.3 DFN4-1x1 package information
- 7.4 DFN4-1x1 packing information
- 8 Ordering information
- 8.1 Marking information
- 9 Revision history
Features
Ultra low output noise: 6.5 μVRMS Operating input voltage range: 1.5 V to 5.5 V Output current up to 250 mA Very low quiescent current: 12 μA at no-load Controlled Iq in dropout condition Very low-dropout voltage: 250 mV at 250 mA Very high PSRR: 80 dB@100 Hz, 60 dB@100 kHz Output voltage accuracy: 2% across line, load and temperature Output voltage versions: from 1 V to 5 V, with 50 mV step Logic-controlled electronic shutdown Output discharge feature Internal soft-start Overcurrent and thermal protections Temperature range: from -40 °C to +125 °C Packages: Flip-Chip4, DFN4-1x1
Applications
Smartphones/tablets Image sensors Instrumentation VCO and RF modules
Description
The LDLN025 is a 250 mA low-dropout voltage regulator, able to work with an input voltage range from 1.5 V to 5.5 V. The typical dropout voltage at 250 mA load is 120 mV. The very low quiescent current, which is just 12 μA at no-load, extends battery-life of applications requiring very long standby time. Thanks to its ultra low noise value and high PSRR, the LDLN025 provides a very clean output, suitable for ultra-sensitive loads. It is stable with ceramic capacitors. The enable logic control function puts the device into shutdown mode allowing a total current consumption lower than 1 μA. The device also includes short-circuit and thermal protection. Typical applications are noise sensitive loads such as ADC, VCO in mobile phones and tablets, wireless LAN devices. The LDLN025 is designed to keep the quiescent current under control and at a low value also during dropout operation, extending the operating time of battery-powered devices. Several small package options are available.
1 Block diagram
Figure 1: Block diagram
2 Pin configuration
Figure 2: Pin configuration Table 1: Pin description Symbol DFN4-1x1 Flip-Chip4 Description VIN 4 A1 LDO Supply voltage VOUT 1 A2 LDO Output voltage GND 2 B2 Ground EN 3 B1 Enable input: set VEN = high to turn on the device; VEN = low to turn off the device This pin is internally pulled down via 1 MΩ resistor NC - - Not internally connected: can be connected to GND Exposed pad Exposed pad - Must be connected to GND
LDLN025 Typical application diagram
3 Typical application diagram
Figure 3: Typical application diagram
4 Maximum ratings
Table 2: Absolute maximum ratings Symbol Parameter Value Unit VIN Input supply voltage -0.3 to 7 V VOUT Output voltage -0.3 to VIN +0.3 V IOUT Output current Internally limited A EN Enable pin voltage -0.3 to VIN +0.3 V PD Power dissipation Internally limited W ESD Charge device model ±1000 V Human body model ±2000 TJ-OP Operating junction temperature -40 to 125 °C TJ-MAX Maximum junction temperature 150 °C TSTG Storage temperature -55 to 150 °C Table 3: Thermal data Symbol Parameter DFN4-1x1 Flip-Chip4 Unit Rthja Thermal resistance, junction-to-ambient 220 210 °C/W
5 Electrical characteristics
(TJ = 25 °C, VIN = VOUT(nom) + 1 V or 1.5 V, whichever is greater; VEN = 1.2 V; CIN = 1 μF; COUT = 1 μF; IOUT = 1 mA) Table 4: Electrical characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit VIN Operating input voltage range 1.5 5.5 V VOUT Output voltage accuracy VOUT + 1 V(1) < VIN < 5.5 V, 1 mA < IOUT < 0.25 A, VOUT ≥ 1.8 V, -40 °C < TJ < 125 °C -2.0 2.0 VOUT + 1 V(1) < VIN < 5.5 V, 1 mA < IOUT < 0.25 A, VOUT < 1.8 V, -40 °C < TJ < 125 °C -3.0 +3.0 ∆VOUT/∆VIN Static line regulation VOUT + 1 V(1) < VIN < 5.5 V 0.02 %/V -40 °C < TJ < 125 °C 0.06 Line transient(2) ∆VIN = +/- 0.6 V, trise = tfall = 30 μs -1 +1 mV ∆VOUT/∆IOUT Static load regulation 1 mA < IOUT < 0.25 A 0.002 %/mA -40 °C < TJ < 125 °C 0.007 Load transient(2) ∆IOUT = 1 mA to 250 mA and back, trise = tfall = 10 μs -40 +40 mV ∆VOUT Overshoot on startup(2) Percentage of VOUT(nom) 5 % VDROP Dropout voltage(3) IOUT = 0.1 A 50 mV IOUT = 0.25 A 120 IOUT = 0.25 A, -40 °C < TJ < 125 °C (Flip-Chip4) 200 IOUT = 0.25 A, -40 °C < TJ < 125 °C (DFN4-1x1) 250 eN Output noise voltage (2) f = 10 Hz to 100 kHz; IOUT = 1 mA 10 µVRMS f = 10 Hz to 100 kHz; IOUT = 250 mA 6.5 SVR Supply voltage rejection(2) f = 100 Hz; IOUT = 20 mA 80 dB f = 1 kHz; IOUT = 20 mA 80 f = 10 kHz; IOUT = 20 mA 75 f = 100 kHz; IOUT = 20 mA 60
Symbol Parameter Test conditions Min. Typ. Max. Unit IQ Quiescent current(4) IOUT = 0 A 12 µA IOUT = 0 A; -40 °C < TJ < 125 °C 25 IOUT = 0.25 A 250 µA IOUT = 0.25 A; -40 °C < TJ < 125 °C 425 Shutdown current VEN = 0 V 0.2 1 µA ISC Short-circuit current VOUT = 0 V 250 500 mA RLOW Output discharge resistance VEN = 0 V 230 Ω VEN VIL, enable input logic low VOUT + 1 V (1)< VIN < 5.5 V -40 °C < TJ < 125 °C 0.4 V VIH, enable input logic high 1.2 IEN Enable pin input current VIN = VEN = 5.5 V 5.5 µA VIN = 5.5 V; VEN = 0 V 0.001 tON Turn-on time(2) From VEN > VIH to VOUT = 95 % of VOUT(nom) 80 150 µs TSHDN Thermal shutdown(2) IOUT > 1 mA 160 °C Hysteresis 20 Notes: (1) VIN = VOUT + 1 V or 1.5 V, whichever is greater. Not applicable for 5 V output voltage versions. (2) Guaranteed by design. (3) Dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its nominal value. (4) The quiescent current is defined as IIN-IOUT and does not include the EN pin current. Table 5: Recommended input and output capacitors Symbol Parameter Test conditions Min. Typ. Max. Unit CIN Input capacitance Stability 0.7 1 μF COUT Output capacitance 0.7 1 10 ESR Output/input capacitance 5 500 mΩ
LDLN025 Typical characteristics
6 Typical characteristics
(The following plots are referred to LDLN025J2925R in the typical application circuit and, unless otherwise noted, at TA = 25 °C). Figure 4: Output voltage vs temperature (VIN = 3.925 V) Figure 5: Output voltage vs temperature (VIN = 5.5 V) Figure 6: Load regulation vs temperature Figure 7: Line regulation vs temperature
7 Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
7.1 Flip-Chip4 package information
Figure 28: Flip-Chip4 package outline
Table 6: Flip-Chip4 mechanical data Dim. mm Min. Typ. Max. A 0.375 0.410 0.445 A1 0.145 0.160 0.175 A2 0.230 0.250 0.270 b 0.189 0.210 0.231 D 0.598 0.628 0.658 D1 0.350 E 0.598 0.628 0.658 E1 0.350 SD 0.175 SE 0.175 f 0.139 ccc 0.075 Figure 29: Flip-Chip4 recommended footprint
7.2 Flip-Chip4 packing information
Figure 30: Flip-Chip4 carrier tape
7.3 DFN4-1x1 package information
Figure 31: DFN4-1x1 package outline
Table 7: DFN4-1x1 package mechanical data Dim. mm Min. Typ. Max. A 0.36 0.40 A1 0.00 0.05 A2 0.15 0.25 0.35 A3 0.125 b 0.15 0.20 0.25 D 0.95 1.00 1.05 D2 0.38 0.48 0.58 e 0.65 E 0.95 1.00 1.05 E2 0.38 0.48 0.58 L 0.15 0.25 0.35 K 0.15 N
7.4 DFN4-1x1 packing information
Figure 32: DFN4 (1x1x0.38 pitch 4 mm) carrier tape
8 Ordering information
Table 8: Order code Order code Package Output voltage Marking Packing LDLN025PU18R DFN4-1x1
1.8 V 18
LDLN025PU25R 2.5 V 25 LDLN025PU275R 2.75 V 2Z LDLN025PU28R 2.8 V 28 LDLN025PU29R 2.9 V 29 LDLN025PU30R 3.0 V 30 LDLN025PU32R 3.2 V 32 LDLN025PU33R 3.3 V 33 LDLN025PU50R 5.0 V 50 LDLN025J12R Flip-Chip4
1.2 V M
LDLN025J18R 1.8 V E LDLN025J25R 2.5 V H LDLN025J28R 2.8 V I LDLN025J2925R 2.925 V K LDLN025J30R 3.0 V G LDLN025J32R 3.2 V N LDLN025J33R 3.3 V F LDLN025J50R 5.0 V P
8.1 Marking information
Figure 33: Flip-Chip marking composition (marking view) the symbol # indicates the marking digit, as per Table 8: "Order code".
9 Revision history
Table 9: Document revision history Date Revision Changes 03-Aug-2016 1 First release. 01-Sep-2016 2 Updated Table 8: “Order code”. Minor text changes. 24-Oct-2016 3 Updated Table 2: "Absolute maximum ratings". Minor text changes. 17-Nov-2016 4 Updated Section 8: "Ordering information". Minor text changes.