LDC1001NHRR

LDC1001 TI1 | Alldatasheet

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Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LDC1001 SNVSBF7 –NOVEMBER 2019 LDC1001Inductance-to-DigitalConverter

1 Features

1• Magnet-free operation

• Sub-micron precision
• Adjustable sensing range (through coil design)
• Lower system cost
• Remote sensor placement (decoupling the LDC from harsh environments)
• High durability (by virtue of contact-less operation)
• Insensitivity to environmental interference (such as dirt, dust, water, oil)
• Supply voltage, analog: 4.75 V to 5.25 V
• Supply voltage, I/O: 1.8 V to 5.25 V
• Supply current (without LC tank): 1.7 mA
• RP resolution: 16 bit
• L resolution: 24 bit
• LC frequency range: 5 kHz to 5 MHz

2 Applications

• Touch buttons
• Angular position sensing
• Linear position sensing
• Metal proximity sensing

3 Description

The LDC1001 device is a 4.75-V to 5.25-V inductance-to-digital converter designed for parallel resistance (Rp) and inductance (L) measurements. Inductive sensing technology enables precise measurement of linear or angular position of metal targets in automotive and industrial applications. Inductive sensing is a contactless, short-range sensing technology that can enable high-resolution sensing of conductive targets in the presence of dust, dirt, oil, and moisture, which can be used by applications in harsh environments. The LDC1001 system consists of an inductive sensor, typically a PCB coil, and a conductive target. The LDC1001 is available in a 16-pin WSON package and offers several modes of operation. A serial peripheral interface (SPI) simplifies connection to an MCU. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) LDC1001 WSON (16) 5.00 mm × 4.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Axial Distance Sensing Application

SNVSBF7 –NOVEMBER 2019 www.ti.com Product Folder Links: LDC1001 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Table of Contents

12 Mechanical, Packaging, and Orderable

4 Revision History

November 2019 * Initial release.

(GND) SCLK SDO DGND CFB VDD CLDO NC INB GND TBCLK INTB 8 9 CSB SDI VIO CFA INA LDC1001 www.ti.com SNVSBF7 –NOVEMBER 2019 Product Folder Links: LDC1001 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated (1) DO: Digital Output, DI: Digital Input, P: Power, A: Analog (2) There is an internal electrical connection between the exposed Die Attach Pad (DAP) and the GND pin of the device. Although the DAP can be left floating, for best performance the DAP should be connected to the same potential as the devices's GND pin. Do no use the DAP as the primary ground for the device. The device GND pin must always be connected to ground.

5 Pin Configuration and Functions

TYPE(1) DESCRIPTION NO. NAME 1 SCLK DI SPI clock input. SCLK is used to clock-out/clock-in the data from/into the chip. 2 CSB DI SPI CSB. Multiple devices can be connected on the same SPI bus with each device having a dedicated CSB connection to the MCU so that each device can be uniquely selected. 3 SDI DI SPI Slave Data In (Master Out Slave In). This should be connected to the Master Out Slave In of the master.

4 VIO P Digital IO Supply

6 DGND P Digital ground

5 SDO DO SPI Slave Data Out (Master In Slave Out). This pin is high-Z when CSB is high.

7 CFB A LDC filter capacitor

8 CFA A LDC filter capacitor

9 INA A External LC Tank. Connected to external LC tank 10 INB A External LC Tank. Connected to external LC tank

11 GND P Analog ground

12 VDD P Analog supply

13 CLDO A LDO bypass capacitor. A 56-nF capacitor should be connected from this pin to GND.

14 TBCLK DI/A External time-base clock

15 NC NC This pin should be left floating. 16 INTB DO Configurable interrupt output. — DAP P Connect to GND for improved thermal performance.(2)

SNVSBF7 –NOVEMBER 2019 www.ti.com Product Folder Links: LDC1001 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The maximum power dissipation is a function of TJ(MAX), RθJA, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is PDMAX = (TJ(MAX) – TA)/ RθJA. All numbers apply for packages soldered directly onto a PCB. The package thermal impedance is calculated in accordance with JESD 51-7.

6 Specifications

6.1 Absolute Maximum Ratings(1)

Analog supply voltage (VDD – GND) 6 V IO supply voltage (VIO – GND) 6 V Voltage on any analog pin –0.3 VDD + 0.3 V Voltage on any digital pin –0.3 VIO + 0.3 V Input current on INA and INB 8 mA Junction temperature, TJ(2) 150 °C Storage temperature, Tstg –65 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±1000 VCharged-device model (CDM), per JEDEC specification JESD22- C101(2) ±250

6.3 Recommended Operating Condition

Analog Supply Voltage (VDD – GND) 4.75 5.25 V IO Supply Voltage (VIO – GND) 1.8 5.25 V VDD – VIO ≥0 V Operating Temperature, TA –40 125 °C (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report (SPRA953). (2) The maximum power dissipation is a function of TJ(MAX), RθJA, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is PDMAX = (TJ(MAX) – TA)/ RθJA. All numbers apply for packages soldered directly onto a PCB. The package thermal impedance is calculated in accordance with JESD 51-7.

6.4 Thermal Information

THERMAL METRIC(1) LDC1001 UNITNHR (WSON)

16 PINS

RθJA Junction-to-ambient thermal resistance(2) 28 °C/W

www.ti.com SNVSBF7 –NOVEMBER 2019 Product Folder Links: LDC1001 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated (1) Electrical Characteristics table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. Absolute Maximum Ratings indicate junction temperature limits beyond which the device may be permanently degraded, either mechanically or electrically. (2) The maximum power dissipation is a function of TJ(MAX), RθJA, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is PDMAX = (TJ(MAX) - TA)/ RθJA. All numbers apply for packages soldered directly onto a PCB. The package thermal impedance is calculated in accordance with JESD 51-7. (3) Limits are specified by testing, design, or statistical analysis at 25°C. Limits over the operating temperature range are specified through correlations using statistical quality control (SQC) method. (4) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not specified on shipped production material.

6.5 Electrical Characteristics

Unless otherwise specified, all limits ensured for TA = TJ = 25°C, VDD = 5 V, VIO = 3.3 V(1)(2) PARAMETER TEST CONDITIONS MIN(3) TYP(4) MAX(3) UNIT POWER VDD Analog supply voltage 4.75 5 5.25 V VIO IO supply voltage VIO ≤ VDD 1.8 3.3 5.25 V IDD Supply current on VDD pin PWR_MODE = 1, no sensor connected 1.7 2.3 mA IVIO IO supply current Static current 14 µA IDD_LP Standby mode supply current on VDD pin PWR_MODE = 0, no sensor connected 250 µA tSTART Start-up time From POR to ready-to-convert. 2 ms LDC ƒSENSOR_MIN Minimum sensor frequency 5 kHz ƒSENSOR_MAX Maximum sensor frequency 5 MHz ASENSOR_MIN Minimum sensor amplitude 1 VPP ASENSOR_MAX Maximum sensor amplitude 4 VPP tREC Recovery time Oscillation start-up time after RP under-range condition 10 1/ƒsensor RP_MIN Minimum sensor RP range 798 Ω RP_MAX Maximum sensor RP range 3.93 MΩ RP_RES RP measurement resolution 16 Bits L Res Inductance measurement resolution RESPONSE_TIME = b111 (6144), ƒEXT = 8 MHz, ƒSENSOR = 5 kHz 24 Bits tS_MIN Minimum response time Minimum programmable settling time of digital filter 192/ƒSE NSOR s tS_MAX Maximum response time Maximum programmable settling time of digital filter 6144/ƒS ENSOR s EXTERNAL CLOCK FOR FREQUENCY COUNTER External Clock Frequency 8 MHz Clock input high voltage VIO V DIGITAL I/O CHARACTERISTICS VIH Logic 1 input voltage 0.8 × VIO V VIL Logic 0 input voltage 0.2 × VIO V VOH Logic 1 output voltage ISOURCE = 400 µA VIO–0.3 V VOL Logic 0 output voltage ISINK = 400 µA 0.3 V IIOHL Digital IO leakage current –500 500 nA

6.6 Timing Requirements

load on SDO. Specified by design; not production tested. Figure 1. Write Timing Diagram Figure 2. Read Timing Diagram

6.7 Typical Characteristics

Figure 3. RP vs Distance Figure 4. Proximity Data vs Distance

L C Frequency Counter TBCLK NC Threshold Detector Frequency Counter Data Register Proximity Data RegisterLDC CSB LDC1001 SNVSBF7 –NOVEMBER 2019 www.ti.com Product Folder Links: LDC1001 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated

7 Detailed Description

7.1 Overview

The LDC1001 is an Inductance-to-Digital Converter that measures the parallel impedance of an LC resonator. The device accomplishes this task by regulating the oscillation amplitude in a closed-loop configuration to a constant level, while monitoring the energy dissipated by the resonator. By monitoring the amount of power injected into the resonator, the LDC1001 can determine the value of RP. When the value is determined, the device returns this as a digital value which is inversely proportional to RP. The threshold detector block provides a comparator with hysteresis. With the threshold registers programed and comparator enabled, proximity data register is compared with threshold registers and INTB pin indicates the output. The device has a simple 4-wire SPI interface. The INTB pin provides multiple functions which are programmable with SPI. The device has separate analog and I/O supplies. The analog supply operates at 5 V and the I/O operates at 1.8 to 5 V. The integrated LDO requires a 56-nF capacitor connected from the CLDO pin to GND.

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Inductive Sensing

An AC current flowing through an inductor will generate an AC magnetic field. If a conductive material, such as a metal target, is brought into the vicinity of the coil, this magnetic field will induce circulating currents (eddy currents) on the surface of the target. These eddy currents are a function of the distance, size, and composition of the target. The eddy currents then generate their own magnetic field, which opposes the original field generated by the coil. This mechanism is best compared to a transformer, where the coil is the primary core and the eddy current is the secondary core. The inductive coupling between both cores depends on distance and shape. Hence the resistance and inductance of the secondary core (eddy current), shows up as a distant dependent resistive and inductive component on the primary side (coil). Figure 5 and Figure 8 show a simplified circuit model.

Figure 8. Equivalent Resistance of RS in Parallel With LC Tank characteristics in Table 23). The target in this example is a section of a 2-mm thick stainless steel disk. Figure 9. Typical RP vs Distance With 14-mm PCB Coil

7.3.2 Measuring RP With LDC1001

information on setting these registers.

3 FC UNT

Figure 10. Transfer Characteristics of LDC1001 With RP_MIN = 16.160 kΩ and RP_MAX = 48.481 kΩ

• RP = Measured sensor parallel resistance in kΩ.
• RP_MIN is the resistance (in kΩ) selected in register 0x02
• RP_MAX is the resistance (in kΩ) selected in register 0x01
• Y = Proximity Data÷215
• Proximity data is the LDC RP output = (Contents of Register 0x22) × 28 + (Contents of register 0x21). (2) Example: If Proximity data (address 0x22:0x21) is 5000, RP_MIN is 2.394 kΩ, and RP_MAX is 38.785 kΩ ,the resonance impedance is given by: Y = 5000/215 = 0.1526 RP = (38785 × 2394) ÷ (2394 × (1 – 0.1526) + 38785 × 0.1526) = (92851290 ÷ (2028.675 + 5918.591)) RP = 11.683 kΩ

7.3.3 Measuring Inductance With LDC1001

• ƒSENSOR is the measured sensor frequency
• ƒEXT is the frequency of the external clock.
• FCOUNT is the value obtained from the Frequency Counter Data registers (address 0x23,0x24,0x25).
• RESPONSE_TIME is the programmed response time (set in the LDC configuration register, address 0x04). (3)

S ENSOR¦ C (2 ) u Su LDC1001 SNVSBF7 –NOVEMBER 2019 www.ti.com Product Folder Links: LDC1001 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Feature Description (continued) Use Equation 4 to determine the sensor inductance: where

• C is the parallel sensor capacitance
• ƒSENSOR is the sensor frequency calculated in Equation 3 (4) Example: If ƒEXT = 6MHz, RESPONSE_TIME = 6144, C = 100 pF and measured Fcount = 3000 (dec) (address 0x23 through 0x25) Using the ƒsensor = 4.096 MHz example for Equation 4, the sensor inductance L = 15.098 µH. NOTE The accuracy of a measurement largely depends upon the frequency of the external time- base clock (TBCLK). A higher frequency will provide better measurement accuracy. The maximum supported frequency is 8 MHz.

7.4 Device Functional Modes

7.4.1 Power Modes

The LDC1001 has two power modes:

• Active Mode: In this mode the LDC1001 is performing conversions. Changing any device configuration settings except PWR_MODE or INTB_MODE when the LDC1001 is in active mode is not recommended. This mode is selected when PWR_MODE = 1.
• Standby Mode: This is the default mode on device power up. In the mode the LDC1001 power consumption is lower than when in Active mode, however the LDC1001 is not performing conversions. The SPI of the device is enabled, and the device should be configured in this mode. This mode is selected when PWR_MODE = 0.

7.4.2 INTB Pin Modes

The INTB pin is a configurable output pin which can be used to drive an interrupt on an MCU. This mode is selected by setting INTB_MODE. The LDC1001 provides three different modes on INTB pin: 1. Comparator Mode 2. Wake-Up Mode 3. DRDY Mode LDC1001 has a built-in High and Low trigger threshold which registers as a comparator with programmable hysteresis or a special mode which can be used to wake up an MCU.

7.4.2.1 Comparator Mode

essentially behaves as a proximity switch with programmable hysteresis. Figure 11. Behavior of INTB Pin in Comparator Mode

7.4.2.2 Wake-Up Mode

deasserted when wake-up mode is disabled in INTB pin mode register. This mode can be used to wake up an MCU that is in sleep mode to conserve power. Figure 12. Behavior of INTB Pin in Wake-Up Mode

7.4.2.3 DRDY Mode

recommends to configure this setting after PWR_MODE has been set to 1 (the LDC1001 is in Active Mode). Figure 13. Behavior of INTB pin in DRDY Mode With SPI Extending Beyond Subsequent Conversions Figure 14. Behavior of INTB Pin in DRDY Mode With SPI Reading the Data Within Subsequent

7.5 Programming

does not initiate any transactions.

7.5.1 SPI Description

section for more information. Figure 15. Serial Interface Protocol device and does not initiate any transactions.

7.5.1.1 Extended SPI Transactions

8*(1+N) clock cycles of SCLK, where N is the amount of bytes to write or read during the transaction. after the initial 8 clocks of the command field. transaction by initiating a read from register 0x21.

Figure 16. Extended SPI Transaction

(1) Values of register fields which are unused should be set to default values only. (3) R/W: Read/Write. RO: Read Only. WO: Write Only.

7.6 Register Maps

Table 1. Register Map(1)(2)

7.6.1 Register Description

7.6.1.1 Revision ID (Address = 0x00)

Table 2. Revision ID 7:0 Revision ID RO 0x80 RevisionID of Silicon.

7.6.1.2 RP_MAX (Address = 0x01)

Table 3. RP_MAX Table 4. Register Settings for RP_MAX

Table 4. Register Settings for RP_MAX (continued) (1) This register needs a mandatory write as it defaults to 0x14.

7.6.1.3 RP_MIN (Address = 0x02)

Table 5. RP_MIN Table 6. Register Settings for RP_MIN

7.6.1.4 Watchdog Timer Frequency (Address = 0x03)

Table 7. Watchdog Timer Frequency

• ƒSENSOR is the sensor frequency
• M is the register value to program for Min Sensor Frequency. (5) Example: With a Sensor frequency is 1 MHz Min Sensor Frequency = 68.94 × log10(1 × 106/2500) = Round to nearest integer (179.38) = 179

7.6.1.5 LDC Configuration (Address = 0x04)

Table 8. LDC Configuration

7.6.1.6 Clock Configuration (Address = 0x05)

Table 9. Clock Configuration

1 CLK_SEL

0 CLK_PD

7.6.1.7 Comparator Threshold High LSB (Address = 0x06)

Table 10. Comparator Threshold High LSB

7.6.1.8 Comparator Threshold High MSB (Address = 0x07)

Table 11. Comparator Threshold High MSB 7:0 Threshold High R/W 0xFF Threshold High Register MSB.

7.6.1.9 Comparator Threshold Low LSB (Address = 0x08)

Table 12. Comparator Threshold Low LSB

7.6.1.10 Comparator Threshold Low MSB (Address = 0x09)

Table 13. Comparator Threshold Low MSB 7:0 Threshold Low R/W 0x00 Threshold Low Register MSB.

7.6.1.11 INTB Pin Configuration (Address = 0x0A)

Table 14. INTB Pin Configuration

7.6.1.12 Power Configuration (Address = 0x0B)

Table 15. Power Configuration 7:1 Reserved R/W 0x00 Reserved to 000'0000.

0 PWR_MODE 0: Standby mode: LDC1001 is in a

Refer to Power Modes for more details.

7.6.1.13 Status (Address = 0x20)

Table 16. Status 7 OSC Status RO N/A 1: Indicates sensor oscillation timeout. 0: Sensor oscillation timeout not detected.

6 Data Ready 1: No new data available

5 Wake-up 1: Wake-up disabled

more than Threshold High value.

4 Comparator 1: Proximity data is less than Threshold

7.6.1.14 Proximity Data LSB (Address = 0x21)

TI recommends to read register 0x21 immediately after any read of register 0x20. Table 17. Proximity Data LSB

7.6.1.15 Proximity Data MSB (Address = 0x22)

delayed between subsequent conversions, these registers are not updated until another read is initiated on 0x21. Table 18. Proximity Data MSB

7.6.1.16 Frequency Counter LSB (Address = 0x23)

Table 19. Frequency Counter LSB

7.6.1.17 Frequency Counter Mid-Byte (Address = 0x24)

Table 20. Frequency Counter Mid-Byte

7.6.1.18 Frequency Counter MSB (Address = 0x25)

Table 21. Frequency Counter MSB

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8 Application and Implementation

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

8.1.1 Calculation of RP_MIN and RP_MAX

Different sensing applications may have a different range of the resonance impedance RP to measure. The LDC1001 measurement range of RP is controlled by setting 2 registers – RP_MIN and RP_MAX. For a given application, RP must never be outside the range set by these register values, otherwise the measured value will be clipped. For optimal sensor resolution, the range of RP_MIN to RP_MAX should not be unnecessarily large. The following procedure is recommended to determine the RP_MIN and RP_MAX register values.

8.1.1.1 RP_MAX

RP_MAX sets the upper limit of the LDC1001 resonant impedance input range.

• Configure the sensor such that the eddy current losses are minimized. As an example, for a proximity sensing application, set the distance between the sensor and the target to the maximum sensing distance.
• Measure the sensor impedance RP using an impedance analyzer.
• Multiply RP by 2 and use the next higher value from Table 7. Setting RP_MAX to a value not listed in Table 7 can result in indeterminate behavior.

8.1.1.2 RP_MIN

RP_MIN sets the lower limit of the LDC1001 resonant impedance input range.

• Configure the sensor such that the eddy current losses are maximized. As an example, for a proximity sensing application, set the distance between the sensor and the metal target to the minimum sensing distance.
• Measure the sensor impedance RP using an impedance analyzer.
• Divide the RP value by 2 and then select the next lower RP value from Table 10. Note that setting RP_MIN to a value not listed on Table 10 can result in indeterminate behavior. In addition, RP_MIN powers on with a default value of 0x14 which must be changed to a value from Table 10 prior to powering on the LDC.

8.1.2 Output Data Rate

The output data rate of (or the conversion time) LDC1001 depends on the sensor frequency, ƒsensor and RESPONSE_TIME field in LDC Configuration register(Address:0x04). The maximum sample rate requires a RESPONSE_TIME setting of 192 and a sensor frequency of 5 MHz. (6)

8.1.3 Choosing Filter Capacitor (CFA and CFB Pins)

The filter capacitor is critical to the operation of the LDC1001. The capacitor should be low leakage, temperature stable, and it must not generate any piezoelectric noise (the dielectrics of many capacitors exhibit piezoelectric characteristics and any such noise is coupled directly through RP into the converter). The optimal capacitance values range from 20 pF to 100 nF. The value of the capacitor is based on the time constant and resonating frequency of the sensor.

constant reaches its maximum when there is no target present in front of the sensor.

1. Start with a large filter capacitor. For a ferrite core coil, 10 nF is usually large enough. For an air coil or PCB

coil, a value of 100 pF is usually large enough.

1. Power on the LDC1001 and set the desired register values. Minimize the eddy currents losses by minimizing
2. Observe the signal on the CFB pin using a scope. Because this node is very sensitive to capacitive loading,

timescale per division of the oscilloscope should be set to 0.1 ms.

1. Vary the values of the filter capacitor until that the signal observed on the CFB pin has an amplitude of

mV, the desired 1-VPP value is obtained using a filter capacitor value that is calculated in Equation 7.

8.2 Typical Application

8.2.1 Axial Distance Sensing Using a PCB Sensor With LDC1001

Figure 17. Typical Application Schematic

8.2.1.1 Design Requirements

For this design example, use the design parameters listed in Table 22 as the input parameters. Table 22. Design Parameters

8.2.1.2 Detailed Design Procedure

8.2.1.2.1 Sensor and Target

Table 23. Sensor Characteristics The target is a stainless steel disk of 15-mm diameter and has a thickness of 1 mm.

8.2.1.2.2 Calculating Sensor Capacitor

sensor frequency to achieve an output data rate of 28 KSPS per the design parameter. frequency calculated in Equation 8 is 3.6 MHz. capacitor will slightly increase the sensor frequency to 3.75 MHz and provide a sample rate of 29.3 KSPS.

8.2.1.2.3 Choosing Filter Capacitor

Figure 18. Waveform on CFB With 100 pF Figure 19. Waveform on CFB With 20 pF

8.2.1.2.4 Setting RP_MIN and RP_MAX

value larger than 25 kΩ, which corresponds to the RP_MAX setting of 0x12 in Table 4. lower than 2.5 kΩ, which corresponds to the RP_MIN setting of 0x3B in Table 6.

8.2.1.2.5 Calculating Minimum Sensor Frequency

Use Equation 10 to calculate the minimum sensor frequency. LDC1001 will take a longer time to detect if the sensor oscillation has stopped.

8.2.1.3 Application Curve

Figure 20. RP vs Distance

9 Power Supply Recommendations

bypass capacitors. A capacitor with a value of 10 µF is usually sufficient.

10 Layout

10.1 Layout Guidelines

• The VDD and VIO pin should be bypassed to ground with a low-ESR ceramic bypass capacitor. The typical recommended bypass capacitance is a 0.1-µF ceramic X5R or X7R dielectric capacitor. Some applications may require additional supply bypassing for optimal LDC1001 operation. For these applications, the smallest- valued capacitor should be placed closest to the corresponding supply pin.
• The optimum placement is closest to the VDD/VIO and GND/DGND pins of the device. Take care to minimize the loop area formed by the bypass capacitor connection, the VDD/VIO pin, and the GND/DGND pin of the IC. See Figure 21 for a PCB layout example.
• The CLDO pin should be bypassed to digital ground (DGND) with a 56-nF ceramic bypass capacitor.
• Connect the filter capacitor selected for the application using the procedure described in Choosing Filter Capacitor (CFA and CFB Pins) between the two CFA and CFB pins. Place the filter capacitor close to the CFA and CFB pins. Do not use any ground or power plane below the capacitor and the trace connecting the capacitor and the CFA /CFB pins.
• Use separate ground planes for the GND and DGND with a star connection. See Figure 21 for a PCB layout example.
• The sensor capacitor should be a C0G capacitor placed as close as possible to the sensor coil.
• See the LDC Sensor Design application report for more details.

10.2 Layout Example

Figure 21. LDC1001 Board Layout

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11 Device and Documentation Support

11.1 Documentation Support

11.1.1 Related Documentation

For related documentation, see the following:

• Semiconductor and IC Package Thermal Metrics (SPRA953)
• LDC Sensor Design (SNOA930)

11.2 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

11.3 Trademarks

E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.

11.4 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

11.5 Glossary

SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

www.ti.com 6-Dec-2019 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LDC1001NHRR ACTIVE WSON NHR 16 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LDC1001 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF LDC1001 :

www.ti.com 6-Dec-2019 Addendum-Page 2

• Automotive: LDC1001-Q1 NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 7-Dec-2019 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LDC1001NHRR WSON NHR 16 1000 210.0 185.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 7-Dec-2019 Pack Materials-Page 2

www.ti.com SDA16B (Rev A)

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