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Technical content

Features

 Serial interface SPI (mode0, mode3) I 2C (F/S mode) Selection with MODE0 pin  Built in Gyro filter  Digital Gyro Support Built in Digital Gyro I/F for each manufacturer  Stepping motor drive mode 1-2 phase W1-2 phase 2W1-2 phase 4W1-2 phase 8W1-2 phase Continued on next page. CMOS LSI Optical Image Stabilization (OIS) Controller & Driver * I2C Bus is a trademark of Philips Corporation. LFLGA49 4x4 / FLGA49

www.onsemi.com Continued from preceding page.  Stepping motor driver integrated in an MCP Saturation driven H bridge 4ch Built in thermal protection circuit Built in low voltage malfunction prevention circuit Built in transistor for photo sensor drive Two driver power supplies (VM : for motor, VCC : for others)  Operation Clock Clock generated from built in oscillation amplifier Clock input directly from CLKIN pin Selection with MODE1 pin Recommended drive frequency 24MHz, Permission drive frequency 15MHz to 36MHz  Package FLGA49 (4mm  4mm) Pb-Free Halogen Free  Power supply voltage (Typical voltage) Logic LSI : Pin 3.3V, Inside 1.8V (External supply required) Driver LSI : VM 5.0V, V CC 3.3V

Electrical Characteristics

Absolute Maximum Ratings at at VSS = 0V Parameter Symbol Conditions Ratings unit Power supply voltage V DD18 max Ta ≤25C -0.3 to 3.6 V VDD33 max Ta ≤25C -0.3 to 4.6 V D.C. Characteristics: Input/output level/VSS = 0V, VDD = 2.7 to 3.6V, Ta = -30 to 85C Parameter Symbol Conditions min typ max unit Applicable pin High-level input voltage V IH CMOS schmidt 1.4 V (1) Low-level input voltage V IL 0.36 V High-level input voltage V IH CMOS schmidt 1.4 V (2) Low-level input voltage V IL 0.50 V High-level input voltage V IH CMOS schmidt 1.5 V (3) Low-level input voltage V IL 0.36 V *Applicable pin (1)ZRESET (2)CLKIN (3)SCLK, MOSI Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product per formance may not be indicated by the Electrical Characteristics if operated under different conditions.

www.onsemi.com Package Dimensions unit : mm LFLGA49 4x4 / FLGA49 CASE 569AM ISSUE A 4.0±0.08 TOP VIEW 4.0±0.08 LASER MARKED INDEX

0.10 S A

0.15

0.10 S B

0.03 SIDE VIEW S S 0.075 S

0.0 NOM

0.8±0.05 NSMD Off set Via type LAND Aperture of Solder Resist B A SIDE VIEW BOTTOM VIEW

0.05 SA B

49−∅0.3±0.03 0.5 0.5 A 0.5 0.5 23 45 6 7 BCDEFG XXXXX = Specific Device Code Y = Year M = Month DDD = Additional Traceability Data GENERIC MARKING DIAGRAM* *This information is generic. Please refer to device data sheet for actual part marking. XXXXXX YMDDD SOLDERING FOOTPRINT* NOTE: The measurements are not to guarantee but for reference only. *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. (Unit: mm)0.50 0.00 0.50 0.30 0.35 0.00

www.onsemi.com Block Diagram Logic VCC Gyro-EQ Pan-Tilt SPI I/F I2C I/F (Slave) Digital Filter Block I/F BUSY Stepping Driver I/F PI Sensor PIX PIY XTALCK XTAL ZRESET LXPO1 LXPO2 LXPO3 LXPO4 LYPO1 LYPO2 LYPO3 LYPO4 DSTBY SGND INA IN8 IN7 IN6 IN5 IN4 IN3 IN2 IN1 VCC PI1 PI PI PGND OUT8 OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1 VM2 VM1 PGND DSP Digital Gyro I/F Digital Gyro MODE1 DVDD33 DVDD33 DVDD18 DVDD18 DVSSDVSSDVSS DGSSB DGSCLK DGMISO DGMOSI BUSY1/IOP4/MONC BUSY2/IOP3/MOND DGINT/IOP2/MONC SSB/I2CAS SCLK/I2CCK MOSI/I2CDT MISO/IOP5/MOND TEST CLKIN MODE0 IOP0/MONA IOP1/MONB

www.onsemi.com Pin Description TYPE I INPUT P Power, GND NC NOT CONNECT O OUTPUT B (I) BIDIRECTION : INPUT at reset B (O) BIDIRECTION : OUTPUT at reset Logic LSI SPI/I2C interface (Slave) SSB/I2CSA I SPI chip select/ I2C slave address select (L: 0100100, H: 0100101, Please make sure to connect the pin to L level or H level.) SCLK/I2CCK B (I) SPI clock/I 2C clock MOSI/I2CDT B (I) SPI received data/I 2C data MISO/IOP5/MOND B (O) SPI transmit data/Monitor pin Sensor output signal input for reference point detection PIX B(I) PIY B(I) Digital gyro interface DGSSB O Digital gyro I/F chip select DGSCLK O Digital gyro I/F transfer clock DGMOSI O Digital gyro I/F transmit data DGMISO I Digital gyro I/F received data DGINT/IOP2/MONC B (I) Digital gyro I/F ti ming signal/General-purpose port/Monitor pin PIO interface IOP0/MONA B (I) General-purpose port/Monitor pin IOP1/MONB B (I) General-purpose port/Monitor pin BUSY flag BUSY1/IOP4/MONC B (O) BUSY pin (RAM acces s BUSY signal when SPI I/F is selected) BUSY2/IOP3/MOND B (O) BUSY pin (Stepping motor force movement busy, measurement busy etc.) Clock, Reset pin XTALCK I Oscillation amplifier input (recommended drive frequency : 24MHz, permission drive frequency : 15MHz to 36MHz) XTAL O Oscillation amplifier output CLKIN I Clock input (Refer to XTALCK description about both recommended and permission drive frequency) ZRESET I Power-on reset Mode select pin MODE0 I Interface select : L SPI, HI2C MODE1 I Clock select : L XTALCK/XTAL use, HCLKIN use Test pin TEST I For test mode setting (fixed to L for normal operation) Power supply pin DVDD33 P 3.3V digital power supply DVDD18 P 1.8V digital power supply DVSS P Digital ground

www.onsemi.com *Process when pins are not used PIN TYPE “O” ―― The pin must be left open. PIN TYPE “I” ―― The pin must not be left open. Please make sure to connect the pin to VDD or VSS even when it is not used. (Please check with us whether to connect to VDD or VSS.) PIN TYPE “B” ―― Please contact us if you are uncertain about a processing method in the pin description in the PIN layout table. A problem may occur if the processing method is used wrongly for any unused pin. Please make sure to contact us. Driver LSI Saturation-driven H bridge output OUT1 to OUT8 O Motor control pulse output Power supply pin VM1,VM2 P Motor power supply VCC P Other power supply SGND P Signal ground PGND P Power ground Photo sensor pin PI1 I Photo sensor connectiong pin Pin Assignment Top View

7 OUT7 OUT8 PGND2 VM2 DVSS IOP1 CLKIN

6 OUT6 NC NC DVDD33 DVDD18 PIX XTAL

5 OUT5 NC DGMISO ZRESET DVSS PIY XTALCK

4 OUT4 DGINT DGSSB DGMOSI BUSY2 BUSY1 MODE1

3 OUT3 NC DGSCLK MODE0 SSB MOSI SCLK

2 OUT2 IOP0 NC TEST DVDD18 MISO DVDD33

1 PGND1 OUT1 VM1 VCC SGND PI1 DVSS

www.onsemi.com ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A lis ting of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf . SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components insystems intended for surgical implant into the body, or other applications intended tosupport or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject t oa l l applicable copyright laws and is not for resale in any manner.

ORDERING INFORMATION

Device Package Shipping (Qty / Packing) LC898113-TBM-H LFLGA49 4x4 / FLGA49 (Pb-Free / Halogen Free) 2000 / Tape & Reel † For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://www.onsemi.com/pub_link/Collateral/BRD8011-D.PDF