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Features
Two sets of eight (or in the LC78213, seven) built-in circuits with three switching configurations available based on differing internal connections. Control according to serial data sent from a microprocessor, and easy connection to 5 V microprocessors. Two identical products can be connected to a shared bus due to the provision of a select pin (S). A reset pin that turns off all analog switches. A ±20 V withstand voltage rating allows these products to provide a wide dynamic range. Specifications Absolute Maximum Ratings at Ta = 25C Parameter Symbol Conditions Ratings Unit Maximum supply voltage V DD max V DD –0.3 to +20 V V EE max V EE –20 to +0.3 V Maximum input voltage V I1 DI, CL, CE, S, RES –0.3 to +20 V V I2 L1 to L8, R1 to R8, LCOM1 to LCOM4, RCOM1 to RCOM4 V EE – 0.3 to VDD + 0.3 V Analog switch potential difference when on VON With the switch on 0.5 V Allowable power dissipation Pd max Ta ≤ 75°C 100 mW Operating temperature range Topr –30 to +75 C Storage temperature range Tstg –40 to +125 C Package Dimensions unit : mm PDIP30 / DIP30SD (400mil) CASE 646AZ CMOS LSI Analog Function Switch Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. DIP30SD (400mil)
Allowable Operating Ranges at Ta = 25°C, VSS = 0 V, |V DD |‡ |V EE | Note: * CE, CL and DI waveforms No. 4817-2/6 LC78211, 78212, 78213 Parameter Symbol Conditions min typ max Unit Maximum supply voltage VDD VDD – VEE ‡ 12 V: VDD 6.0 18.5 V VEE VDD – VEE ‡ 12 V: VEE –18.5 0 V Input high level voltage VIH1 DI, CL, CE 4.0 18.5 V VIH2 S, RES 0.7 VDD VDD V Input low level voltage VIL1 DI, CL, CE 0 0.7 V VIL2 S, RES 0 0.3 VDD V Analog switch input VIN L1 to L8, R1 to R8, LCOM1 to LCOM4, VEE VDD Vvoltage range RCOM1 to RCOM4 Low level clock pulse width tøL CL 0.5 µs High level clock pulse width tøH CL 0.5 µs tset up CL, DI 0.5 µs Setup time t1* CL, CE 0.5 µs t2* CL, CE 0.5 µs t3* CL, CE 0.5 µs Minimum reset pulse width twRES VDD ‡ 6 V: RES 1.0 µs Hysteresis VH CL, CE, DI 0.3 V Top view
Electrical Characteristics at Ta = 25°C, VSS = 0 V Equivalent Circuit Block Diagrams No. 4817-3/6 LC78211, 78212, 78213 Parameter Symbol Conditions min typ max Unit I = 1 mA, VDD – VEE = 12 V: R ON 1 L1 to L8, R1 to R8, LCOM1 to LCOM4, 150 Ω Analog switch on resistance RCOM1 to RCOM4 I = 1 mA, VDD – VEE = 37 V: R ON 2 L1 to L8, R1 to R8, LCOM1 to LCOM4, 70 Ω RCOM1 to RCOM4 VIN = 1 Vrms, f = 1 kHz, VDD – VEE = 37 V: THD1 L1 to L8, R1 to R8, LCOM1 to LCOM4, 0.0015 0.01 % Total harmonic distortion RCOM1 to RCOM4 VIN = 0.1 Vrms, f = 1 kHz, VDD – VEE = 37 V: THD2 L1 to L8, R1 to R8, LCOM1 to LCOM4, 0.01 0.05 % RCOM1 to RCOM4 VIN = 0 dBV, f = 10 kHz, VDD – VEE = 37 V: Feedthrough FTH L1 to L8, R1 to R8, LCOM1 to LCOM4, 55 dB RCOM1 to RCOM4 VIN = 0 dBV, f = 10 kHz, VDD – VEE = 37 V: Crosstalk CT L1 to L8, R1 to R8, LCOM1 to LCOM4, 75 dB RCOM1 to RCOM4 Input high level current IIH VI= 18.5 V: DI, CL, CE, S, RES +10 µA Input low level current IIL VI= 0 V: DI, CL, CE, S, RES –10 µA Analog switch leakage current VI= VEE to VEE + 37 V: (off state) IOFF L1 to L8, R1 to R8, LCOM1 to LCOM4, –10 +10 µA RCOM1 to RCOM4 Current drain IDD VDD 1.0 mA Continued on next page.
Continued from preceding page. No. 4817-4/6 LC78211, 78212, 78213
- Data Input Procedure The LC78211, LC78212 and LC78213 are controlled by inputting specified data to the CL, DI and CE pins. The input data consists of 12 bits, of which four bits are address and eight bits are data. Bits correspond to the L1 to L8 and R1 to R8 analog switches, and a value of one turns the corresponding switch on, and a value of zero turns it off. The address is used when the chip is connected to a shared bus. The data (address) that must be transmitted depends on the S pin and the particular product as shown in the table below. Note: The bit for switch eight in the LC78213 is a “don’t care” bit, that is it can be either 0 or 1 without affecting chip function. This is because the LC78213 has two sets of seven (not eight) circuits. No. 4817-5/6 LC78211, 78212, 78213 Pin I/O Internal equivalent circuit Pin function VDD , VSS , VEE L1 to L8, R1 to R8, LCOM1 to LCOM4, RCOM1 to RCOM4 CL, DI, CE S RES I I I See the block diagram. Power supply Analog switch input and output Serial data input (Schmitt buffer) Selection of one of two chips The address is set to the values shown in the table below according to the level input to the S pin. Reset input The states of the analog switches are undefined when power is first applied. Setting this pin low will force all switches the off state. Product S pin Address level A
0 A1 A2 A3
LC78211, 78212, 78213 PS No.A4817-6/6
ORDERING INFORMATION
Device Package Shipping (Qty / Packing) LC78211-E DIP30SD(400mil) (Pb-Free / Halogen Free) 20 / Fan-Fold LC78212-E DIP30SD(400mil) (Pb-Free / Halogen Free) 20 / Fan-Fold LC78213-E DIP30SD(400mil) (Pb-Free / Halogen Free) 20 / Fan-Fold ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequentia l or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use a s components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and dis tributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personali n j u r yo r death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture oft h e part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 2. DI, CL and CE Timing Data is read in on the rising edge of CL and latched on the falling edge of CE. 3. Notes on the Reset Pin The states of the analog switches are undefined when power is first applied. However, it is possible to use the reset pin to force all switches to the off state by connecting an RC circuit to this pin. 4. Using a CCB Bus with Multiple ICs The LC78211, LC78212 and LC78213 retain their prior state until they receive data with a matching address. 5. Replacing Earlier Models Caution is required when replacing an LC7821N, LC7823N and LC7823N with an LC78211, LC78212 and LC78213, since the S pin threshold levels differ. 6. Handling of Unused Input Pins We recommend connecting any unused switch pin to V SS through a resistor of up to a few 100 k to prevent damag e from static electricity.