Driver IC

LC75760UJA

ON Semiconductor

LED Driver, 12?릀hannel, Constant Current July, 2018 ??Rev. 0

Manufacturer: ON Semiconductor

Document: 65 Pages / 530Kb

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PDF pages: 65

Technical content

Features

The LED Driver Outputs of Up to 12-ch can Drive LED Directly ♦ Constant Current Output Form ♦ Output V oltage: Absolute Maximum Rating 6.8 V Maximum Operating V oltage 6.3 V ♦ Output Current: Absolute Maximum Rating 60 mA Maximum Operating Current 50 mA ♦ Output Current Regulation Function (256 Steps) ♦ Open/Short/Adjacent Outputs Short Detection Function ♦ Slew Rate Limited Switching Function
Serial Data Communication Supports 4-line Serial Format ♦ Support 3.3 V and 5.0 V Operation ♦ Maximum Operating Frequency 2 MHz
Built-in 6-ch PWM Function for Brightness Adjustment of LED ♦ Resolution of 128, 256, 512 or 1024 Steps ♦ PWM Frame Frequency can be Controlled by Serial Data
Built-in Thermal Protection Function (125°C: Automatic Adjustment of PWM, 150°C: Forced-off All LEDs)
Provides the ERR Output Pin (125°C Temperature Abnormality, Open/Short/Adjacent Outputs Short Abnormality, LED Pull-up Supply V oltage Abnormality, External Resistance Abnormally, Fundamental Clock Abnormality, Reset Action)
Provides a RES Pin and Built-in V oltage Detection Type Reset Circuit (VDET) for LSI Internal Initialization
Switch of the Internal Oscillator Operating Mode and the External Clock Operating Mode can be Controlled by Serial Data
Built-in Oscillator Circuit. (Built-in Resister and Capacitor for Oscillation)
Built-in External Resistance Value Diagnosis Function for Constant Current
AEC−Q100 Qualified and PPAP Capable Typical Applications
Automotive: Instrument Cluster, HV AC, Head Up Display
Industrial: Measurement Equipment www.onsemi.com See detailed ordering and shipping information on page 63 of this data sheet.

ORDERING INFORMATION

SSOP24 (225 mil) CASE 565AR MARKING DIAGRAM XXXXX = Specific Device Code Y = Year M = Month DDD = Additional Traceability Data XXXXXXXXXX YMDDD

Figure 1. Application Schematic 1

The pins to be connected to the controller (CLK, SIN, LATCH, RES , OSCI) can handle 3.3 V or 5 V.
The ERR pin with an open-drain output type requires a pull-up resistor (RPU). Select a resistance (between 1 k/C0087 and 10 k/C0087) appropriate

for the capacitance of the external wiring so that signal waveforms are not degraded. (Example 1) One LC75760UJA is used with 4−line serial interface format.

Figure 2. Application Schematic 2

The pins to be connected to the controller (CLK, SIN, LATCH, RES , OSCI) can handle 3.3 V or 5 V.
The ERR pin with an open-drain output type requires a pull-up resistor (RPU). Select a resistance (between 1 k/C0087 and 10 k/C0087) appropriate

for the capacitance of the external wiring so that signal waveforms are not degraded. (Example 2) Two LC75760UJA are used with 4−line serial interface format.

Figure 3. Simplified Block Diagram

Figure 4. Pin Assignment (Top View) VDD 24 This is power supply pin. Supply the voltage between +2.7 V and +5.5 V. VSS 12, 23 These are power supply pins. edge of the shift clock (CLK). OSCI 11 This is an input pin for the external clock. the external, when it is the external clock operating mode. RES 1 This is an input pin for reset. Refer to “About the reset of the system” for the elaboration. These are LED driver output pins. output current regulation function and the PWM function. driver output pins to “0” (LED turning off).

www.onsemi.com PIN FUNCTION (continued) Pin Name Handing when UnusedI/OActiveFunctionPin No. SENSE 13 This is a pull-up voltage monitor pin for LED. Input pull-up power supply voltage (6.3 V max) for LED. − I − IREF 22 This is a resistance connection pin for reference current (IREF) setting. Connect resistance between IREF pin and GND. − I − ERR 20 This is error detection signal output pin (open drain output). When temperature abnormality (TSD125 = “1”) or short abnormality of over one LED driver output (SERR = “1”) or open abnormality of over one LED driver output (OERR = “1”) or adjacent outputs short abnormality of over one LED driver output (AERR = “1”) or LED driver supply voltage abnormality (VERR = “1”) or the external resistance value abnormality (IR1,0 = “0,0”, “1,1”) or fundamental clock abnormality (CERR = “1”) or reset action (POR = “1”) of the system occurred, the ERR pin outputs Low (VSS). Furthermore, connect the external pull-up resistor. In addition, if the control data ERD is “1”, application can read each diagnosis result data from the ERR pin with serial data transfer clock. − O OPEN SOUT 21 This is a serial data output pin for shift registers (CMOS out- put). This pin outputs data from a falling edge of shift clock (CLK). − O OPEN MAXIMUM RATINGS (VSS = 0 V) Symbol Parameter Conditions Ratings Unit VDD max Maximum Supply Voltage VDD −0.3 to +6.5 V VIN1 Input Voltage SIN, CLK, LATCH, RES, OSCI −0.3 to +6.5 V VIN2 IREF −0.3 to VDD+0.3 VIN3 SENSE −0.3 to +6.8 VOUT1 Output Voltage ERR −0.3 to +6.5 V VOUT2 SOUT −0.3 to VDD+0.3 VOUT3 LD1 to LD12 −0.3 to +6.8 IOUT1 Output Current SOUT, ERR 10 mA IOUT2 LD1 to LD12 60 Pdmax1 Allowable Power Dissipation TA = +25/C0095C with PCB (Note 5) 1200 mW Pdmax2 TA = +95/C0095C with PCB (Note 5) 525 Pdmax3 TA = +105/C0095C with PCB (Note 5) 430 Pdmax4 TA = +25/C0095C with PCB (Note 6) 2000 Pdmax5 TA = +95/C0095C with PCB (Note 6) 880 Pdmax6 TA = +105/C0095C with PCB (Note 6) 720 TJ max Junction Temperature +150 °C Topr Operating Temperature −40 to +105 °C Tstg Storage Temperature −55 to +150 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

the Recommended Operating Ranges limits may affect device reliability. Figure 5. OSCI Pin Clock Timing

www.onsemi.com ELECTRICAL CHARACTERISTICS (for the recommended operating ranges) (continued) Symbol UnitMaxTypMinConditionsPinsParameter VSES1 LED Driver Supply Abnormally Voltage VLOP Open Detection Voltage of the LED Driver Output LD1 to LD12 Enabling the open or VSS short detection function of the LED driver output. (Figure 19, Figure 20) 0.4 0.5 0.6 V VLSH1 Short Detection Voltage of the LED Driver Output LD1 to LD12 Enabling the VLED short or adjacent outputs short detection function of the LED driver output. (When sets VSH = 0.8 V typ). V DD = 2.7 V to 5.5 V. (Figure 19, Figure 20) 0.7 0.8 0.9 V VLSH2 LD1 to LD12 Enabling the VLED short or adjacent outputs short detection function of the LED driver output. (When sets VSH = 1.8 V typ). V DD = 2.7 V to 5.5 V. (Figure 19, Figure 20) 1.65 1.8 1.95 V VLSH3 LD1 to LD12 Enabling the VLED short or adjacent outputs short detection function of the LED driver output. (When sets VSH = 2.8 V typ). V DD = 4.5 V to 5.5 V. (Figure 19, Figure 20) 2.6 2.8 3.0 V VLSH4 LD1 to LD12 Enabling the VLED short or adjacent outputs short detection function of the LED driver output. (When sets VSH = 3.8 V typ). V DD = 4.5 V to 5.5 V. (Figure 19, Figure 20) 3.55 3.8 4.05 V fosc Oscillator Frequency Oscillator Circuit Internal oscillator operating mode 140 200 260 kHz VREF Reference Voltage IREF 1.1 1.2 1.23 V TAC1 Temperature Monitoring Accuracy Temperature accuracy sensing 125°C abnormality 125 135 150 °C TAC2 Temperature accuracy sensing 150°C abnormality 150 165 − °C Thys Temperature Hysteresis − 15 − °C IDD1 Current Drain VDD The reset of the system by the RES pin (RES = “L”) VDD = 5.5 V − 1 15 /C0109A IDD2 VDD VDD = 5.5 V, Outputs are open. REXT = 12 k/C0087 − 2.5 5.0 mA Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.

performance may not be indicated by the Electrical Characteristics if operated under different conditions.

This item is the reference value when the pull-up register RPU = 4.7 k /C0087 and the load capacitance CL = 10 pF. The ERR pin is open drain

output, so note that this value is changed according to RPU and CL. Figure 6. Data Input and Data Output Timing of 4-line Serial Bus Interface

signal after having transmitted (16 × n) bits to SIN pin. latched and settled at the rising edge of the LATCH signal. after having transmitted (16 × n) bits to SIN pin. NOTE: n: The number of connection. Figure 7. Transfer Example of Write Data of 4-line Serial Interface Using One Device

Figure 8. Transfer Example of Read Data of 4-line Serial Interface Using One Device Continued from the previous page.

Figure 11. Serial Data Transfer Example of Reading the Diagnosis Result Data from the ERR Pin

Table 1. LIST OF WRITE COMMAND CONTROL REGISTERS

Table 1. LIST OF WRITE COMMAND CONTROL REGISTERS (continued)

n: The number of the connection, x: Don’t care.

Table 2. LIST OF READ COMMAND CONTROL REGISTERS

Table 2. LIST OF READ COMMAND CONTROL REGISTERS (continued)

n: The number of the connection, x: Don’t care.

www.onsemi.com Control Data Functions (1) CA17 to CA10, CA27 to CA20, CA37 to CA30, CA47 to CA40, CA57 to CA50, CA67 to CA60, CA77 to CA70, CA87 to CA80, CA97 to CA90, CA107 to CA100, CA117 to CA110, CA127 to CA120 Control Data for Current Value (ID) Setting of the LED Driver Output By these control data, the current value(ID) of the LED driver output (LD1 to LD12) is set in each ch. Reference current (IREF) is decided by an external resistor connected to IREF pin, and peak output current (IDmax) of the LED driver output is IREF x 500. In addition, these control data are protected by the command [Lock of output current regulation]. It cannot change these control data when the command [Lock of output current regulation] is set. When changing these control data, transmit the command [Unlock of output current regulation]. Afterwards set these control data. These control data are initialized to “(CAn7, CAn6, CAn5, CAn4, CAn3, CAn2, CAn1, CAn0) = (0, 0, 0, 0, 0, 0, 0, 0)” all by the reset action (reset by RES pin, voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating) of the system. CA- CA- CA- CA- CA- CA- CA- CA- n0 Output Current Value (ID) 0 0 0 0 0 0 0 0 (1/256) x (IREF x 500) 0 0 0 0 0 0 0 1 (2/256) x (IREF x 500) 0 0 0 0 0 0 1 0 (3/256) x (IREF x 500) 0 0 0 0 0 0 1 1 (4/256) x (IREF x 500) 0 0 0 0 0 1 0 0 (5/256) x (IREF x 500) 0 0 0 0 0 1 0 1 (6/256) x (IREF x 500) 0 0 0 0 0 1 1 0 (7/256) x (IREF x 500) 0 0 0 0 0 1 1 1 (8/256) x (IREF x 500) 0 0 0 0 1 0 0 0 (9/256) x (IREF x 500) 0 0 0 0 1 0 0 1 (10/256) x (IREF x 500) 0 0 0 0 1 0 1 0 (11/256) x (IREF x 500) 0 0 0 0 1 0 1 1 (12/256) x (IREF x 500) 0 0 0 0 1 1 0 0 (13/256) x (IREF x 500) 0 0 0 0 1 1 0 1 (14/256) x (IREF x 500) 0 0 0 0 1 1 1 0 (15/256) x (IREF x 500) 0 0 0 0 1 1 1 1 (16/256) x (IREF x 500) :  x (IREF x 500) : : : : : : : : : 1 1 1 1 0 0 0 0 (241/256) x (IREF x 500) 1 1 1 1 0 0 0 1 (242/256) x (IREF x 500) 1 1 1 1 0 0 1 0 (243/256) x (IREF x 500) 1 1 1 1 0 0 1 1 (244/256) x (IREF x 500) 1 1 1 1 0 1 0 0 (245/256) x (IREF x 500) 1 1 1 1 0 1 0 1 (246/256) x (IREF x 500) 1 1 1 1 0 1 1 0 (247/256) x (IREF x 500) 1 1 1 1 0 1 1 1 (248/256) x (IREF x 500) 1 1 1 1 1 0 0 0 (249/256) x (IREF x 500) 1 1 1 1 1 0 0 1 (250/256) x (IREF x 500) 1 1 1 1 1 0 1 0 (251/256) x (IREF x 500) 1 1 1 1 1 0 1 1 (252/256) x (IREF x 500) 1 1 1 1 1 1 0 0 (253/256) x (IREF x 500) 1 1 1 1 1 1 0 1 (254/256) x (IREF x 500) 1 1 1 1 1 1 1 0 (255/256) x (IREF x 500) 1 1 1 1 1 1 1 1 (256/256) x (IREF x 500) 10.CA17 to CA10: Data for current value setting of the LED driver output (LD1) / CA27 to CA20: Data for current value setting of the LED driver output (LD2) / CA37 to CA30: Data for current value setting of the LED driver output (LD3) / CA47 to CA40: Data for current value setting of the LED driver output (LD4) / CA57 to CA50: Data for current value setting of the LED driver output (LD5) / CA67 to CA60: Data for current value setting of the LED driver output (LD6) / CA77 to CA70: Data for current value setting of the LED driver output (LD7) / CA87 to CA80: Data for current value setting of the LED driver output (LD8) / CA97 to CA90: Data for current value setting of the LED driver output (LD9) / CA107 to CA100: Data for current value setting of the LED driver output (LD10) / CA117 to CA110: Data for current value setting of the LED driver output (LD11) / CA127 to CA120: Data for current value setting of the LED driver output (LD12)

www.onsemi.com (2) L1C, L1B, L1A to L12C, L12B, L12A Control Data for Ch Setting of the PWM Circuits that Adjust Brightness of LED By these control data, the PWM circuit of the LED driver output is set in each Ch. In addition, these control data are protected by the command [Lock of the PWM ch & PWM steps & PWM frame frequency]. It cannot change these control data when the command [Lock of the PWM ch & PWM steps & PWM frame frequency] is set. When changing these control data, transmit the command [Unlock of the PWM ch & PWM steps & PWM frame frequency]. Afterwards set these control data. These control data are initialized to “(LnC, LnB, LnA) = (0, 0, 1)” all by the reset action (reset by RES pin, voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating) of the system. LnC LnB LnA Ch of the PWM Circuit for LED Driver Output LDn 0 0 0 PWM circuit is not selected. (The setting of turning on/off of the duty 100% is possible.) 0 0 1 PWM circuit (Ch1) is selected. 0 1 0 PWM circuit (Ch2) is selected. 0 1 1 PWM circuit (Ch3) is selected. 1 0 0 PWM circuit (Ch4) is selected. 1 0 1 PWM circuit (Ch5) is selected. 1 1 0 PWM circuit (Ch6) is selected. 1 1 1 PWM circuit is not selected. (The setting of turning on/off of the duty 100% is possible.) 11. LnC, LnB, LnA (n = 1 to 12) data are control data that set the Ch of PWM circuit for LED driver output pins LDn (n = 1 to 12). For example, if (L1C, L1B, L1A) = (0, 0, 1), (L5C, L5B, L5A) = (0, 1, 1) and (L10C, L10B, L10A) = (1, 1, 0) is set, LED driver output pin LD1 select PWM circuit (Ch1) and LED driver output pin LD5 select PWM circuit (Ch3) and LED driver output pin LD10 select PWM circuit (Ch6). (3) WN1, WN0 Control Data for Setting of the Resolution Number of PWM Steps of LED Driver Output Waveform These control data bits set the steps number of PWM output (Ch1 to Ch6) of LED driver outputs (LD1 to LD12). In other word, they set the number of effective bits of PWM data. In addition, these control data are protected by the command [Lock of the PWM ch & PWM steps & PWM frame frequency]. It cannot change these control data when the command [Lock of the PWM ch & PWM steps & PWM frame frequency] is set. When changing these control data, transmit the command [Unlock of the PWM ch & PWM steps & PWM frame frequency]. Afterwards set these control data. These control data are initialized to “(WN1, WN0) = (0, 0)” by the reset action (reset by RES pin, voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating) of the system. WN1 WN0 The Steps Number of PWM Output (Ch1 to Ch6) of LED Driver Outputs LDn The Number of Effective Bits of PWM Data per One Channel of PWM Data 0 0 128 steps 7 bits (Wn9 to Wn3) 0 1 256 steps 8 bits (Wn9 to Wn2) 1 0 512 steps 9 bits (Wn9 to Wn1) 1 1 1024 steps 10 bits (Wn9 to Wn0) 12.W19 to W10: PWM data of PWM circuit (Ch1) / W29 to W20: PWM data of PWM circuit (Ch2) W39 to W30: PWM data of PWM circuit (Ch3) / W49 to W40: PWM data of PWM circuit (Ch4) W59 to W50: PWM data of PWM circuit (Ch5) / W69 to W60: PWM data of PWM circuit (Ch6)

www.onsemi.com (4) PF3 to PF0 Control Data for Setting of the Frame Frequency of PWM Output Waveform These control data bits set the frame frequency of PWM output waveform of LED driver outputs (LD1 to LD12) setting PWM circuits (Ch1 to Ch6). In addition, these control data are protected by the command [Lock of the PWM ch & PWM steps & PWM frame frequency]. It cannot change these control data when the command [Lock of the PWM ch & PWM steps & PWM frame frequency] is set. When changing these control data, transmit the command [Unlock of the PWM ch & PWM steps & PWM frame frequency]. Afterwards set these control data. These control data are initialized to “(PF3, PF2, PF1, PF0) = (1, 0, 0, 0)” all by the reset action (reset by RES pin, voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating) of the system. PF3 PF2 PF1 PF0 Frame Frequency of PWM Output Waveform of LED Driver Outputs fp [Hz] The Number of the Settable Steps of the PWM Circuit Internal Oscillator Operating Mode (Control Data OC = “0”) External Clock Operating Mode (Control Data OC = “1”) 128 Steps 256 Steps 512 Steps 1024 Steps 0 0 0 0 fosc / 2048 fOSCI1,2 / 2048 Y Y Y Y 0 0 0 1 fosc / 1920 fOSCI1,2 / 1920 Y N N N 0 0 1 0 fosc / 1792 fOSCI1,2 / 1792 Y Y N N 0 0 1 1 fosc / 1664 fOSCI1,2 / 1664 Y N N N 0 1 0 0 fosc / 1536 fOSCI1,2 / 1536 Y Y Y N 0 1 0 1 fosc / 1408 fOSCI1,2 / 1408 Y N N N 0 1 1 0 fosc / 1280 fOSCI1,2 / 1280 Y Y N N 0 1 1 1 fosc / 1152 fOSCI1,2 / 1152 Y N N N 1 0 0 0 fosc / 1024 fOSCI1,2 / 1024 Y Y Y Y 1 0 0 1 fosc / 896 fOSCI1,2 / 896 Y N N N 1 0 1 0 fosc / 768 fOSCI1,2 / 768 Y Y N N 1 0 1 1 fosc / 640 fOSCI1,2 / 640 Y N N N 1 1 0 0 fosc / 512 fOSCI1,2 / 512 Y Y Y N 13.Y = “It is possible of setting”. N = “It is impossible of setting”. If the number of steps of PWM circuit will be set to the step which is impossible of setting, it will set smallest resolution i n range which is possible of setting. For example, it is as follows. − If it will be set to 256 steps or 512 steps or 1024 steps under (128 steps, 256 steps, 512 steps, 1024 steps) = (Y, N, N, N), it will be set to 128 steps. − If it will be set to 512 steps or 1024 steps under (128 steps, 256 steps, 512 steps, 1024 steps) = (Y, Y, N, N), it will be set to 256 steps. − If it will be set to 1024 steps under (128 steps, 256 steps, 512 steps, 1024 steps) = (Y, Y, Y, N), it will be set to 512 steps. 14.If (PF3, PF2, PF1, PF0) = (1, 1, 0, 1), (1, 1, 1, 0) or (1, 1, 1, 1) are set, the frame frequency (fosc/1024, f OSCI1,2/1024) of setting (PF3, PF2, PF1, PF0) = (1, 0, 0, 0) is selected. 15.fosc = 200 kHz (typ) (When it is internal oscillator operating mode with control data OC = “0”.) fOSCI1 = 200 kHz (typ) (When it is external clock operating mode with control data OC = “1”, EXF = “0”.) fOSCI2 = 150 kHz (typ) (When it is external clock operating mode with control data OC = “1”, EXF = “1”.)

www.onsemi.com (5) W19 to W10, W29 to W20, W39 to W30, W49 to W40, W59 to W50, W69 to W60 PWM Data of PWM Circuits of the LED Driver Outputs These control data bits set LED lighting time per one frame of the PWM output waveform of the LED driver outputs (LD1 to LD12) setting PWM circuits (Ch1 to Ch6) separately. In addition, these control data are protected by the command [Lock of the PWM data]. It cannot change these control data when the command [Lock of the PWM data] is set. When changing these control data, transmit the command [Unlock of the PWM data]. Afterwards set these control data. These control data are initialized to “(Wm9, Wm8, Wm7, Wm6, Wm5, Wm4, Wm3, Wm2, Wm1, Wm0) = (0, 0, 0, 0, 0, 0, 0, 0, 0, 0)” all by the reset action (reset by RES pin, voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating) of the system. PWM Data LED Lighting Time per One Frame Wm9 Wm8 Wm7 Wm6 Wm5 Wm4 Wm3 Wm2 Wm1 Wm0 1024 Steps 512 Steps 256 Steps 128 Steps 0 0 0 0 0 0 0 0 0 0 (1/1024) x Tp (1/512) x Tp (1/256) x Tp (1/128) x Tp 0 0 0 0 0 0 0 0 0 1 (2/1024) x Tp (1/512) x Tp (1/256) x Tp (1/128) x Tp 0 0 0 0 0 0 0 0 1 0 (3/1024) x Tp (2/512) x Tp (1/256) x Tp (1/128) x Tp 0 0 0 0 0 0 0 0 1 1 (4/1024) x Tp (2/512) x Tp (1/256) x Tp (1/128) x Tp 0 0 0 0 0 0 0 1 0 0 (5/1024) x Tp (3/512) x Tp (2/256) x Tp (1/128) x Tp 0 0 0 0 0 0 0 1 0 1 (6/1024) x Tp (3/512) x Tp (2/256) x Tp (1/128) x Tp 0 0 0 0 0 0 0 1 1 0 (7/1024) x Tp (4/512) x Tp (2/256) x Tp (1/128) x Tp 0 0 0 0 0 0 0 1 1 1 (8/1024) x Tp (4/512) x Tp (2/256) x Tp (1/128) x Tp 0 0 0 0 0 0 1 0 0 0 (9/1024) x Tp (5/512) x Tp (3/256) x Tp (2/128) x Tp 0 0 0 0 0 0 1 0 0 1 (10/1024) x Tp (5/512) x Tp (3/256) x Tp (2/128) x Tp 0 0 0 0 0 0 1 0 1 0 (11/1024) x Tp (6/512) x Tp (3/256) x Tp (2/128) x Tp 0 0 0 0 0 0 1 0 1 1 (12/1024) x Tp (6/512) x Tp (3/256) x Tp (2/128) x Tp 0 0 0 0 0 0 1 1 0 0 (13/1024) x Tp (7/512) x Tp (4/256) x Tp (2/128) x Tp 0 0 0 0 0 0 1 1 0 1 (14/1024) x Tp (7/512) x Tp (4/256) x Tp (2/128) x Tp 0 0 0 0 0 0 1 1 1 0 (15/1024) x Tp (8/512) x Tp (4/256) x Tp (2/128) x Tp 0 0 0 0 0 0 1 1 1 1 (16/1024) x Tp (8/512) x Tp (4/256) x Tp (2/128) x Tp 0 0 0 0 0 1 0 0 0 0 (17/1024) x Tp (9/512) x Tp (5/256) x Tp (3/128) x Tp 0 0 0 0 0 1 0 0 0 1 (18/1024) x Tp (9/512) x Tp (5/256) x Tp (3/128) x Tp 0 0 0 0 0 1 0 0 1 0 (19/1024) x Tp (10/512) x Tp (5/256) x Tp (3/128) x Tp 0 0 0 0 0 1 0 0 1 1 (20/1024) x Tp (10/512) x Tp (5/256) x Tp (3/128) x Tp 0 0 0 0 0 1 0 1 0 0 (21/1024) x Tp (11/512) x Tp (6/256) x Tp (3/128) x Tp 0 0 0 0 0 1 0 1 0 1 (22/1024) x Tp (11/512) x Tp (6/256) x Tp (3/128) x Tp 0 0 0 0 0 1 0 1 1 0 (23/1024) x Tp (12/512) x Tp (6/256) x Tp (3/128) x Tp 0 0 0 0 0 1 0 1 1 1 (24/1024) x Tp (12/512) x Tp (6/256) x Tp (3/128) x Tp 0 1 1 1 1 1 1 1 0 0 (509/1024) x Tp (255/512) x Tp (128/256) x Tp (64/128) x Tp 0 1 1 1 1 1 1 1 0 1 (510/1024) x Tp (255/512) x Tp (128/256) x Tp (64/128) x Tp 0 1 1 1 1 1 1 1 1 0 (511/1024) x Tp (256/512) x Tp (128/256) x Tp (64/128) x Tp 0 1 1 1 1 1 1 1 1 1 (512/1024) x Tp (256/512) x Tp (128/256) x Tp (64/128) x Tp 1 0 0 0 0 0 0 0 0 0 (513/1024) x Tp (257/512) Tp (129/256) x Tp (65/128) x Tp 1 0 0 0 0 0 0 0 0 1 (514/1024) x Tp (257/512) x Tp (129/256) x Tp (65/128) x Tp 1 0 0 0 0 0 0 0 1 0 (515/1024) x Tp (258/512) x Tp (129/256) x Tp (65/128) x Tp 1 0 0 0 0 0 0 0 1 1 (516/1024) x Tp (258/512) x Tp (129/256) x Tp (65/128) x Tp 1 1 1 1 1 0 1 0 0 0 (1001/1024) x Tp (501/512) x Tp (251/256) x Tp (126/128) x Tp 1 1 1 1 1 0 1 0 0 1 (1002/1024) x Tp (501/512) x Tp (251/256) x Tp (126/128) x Tp 1 1 1 1 1 0 1 0 1 0 (1003/1024) x Tp (502/512) x Tp (251/256) x Tp (126/128) x Tp 1 1 1 1 1 0 1 0 1 1 (1004/1024) x Tp (502/512) x Tp (251/256) x Tp (126/128) x Tp 1 1 1 1 1 0 1 1 0 0 (1005/1024) x Tp (503/512) x Tp (252/256) x Tp (126/128) x Tp 1 1 1 1 1 0 1 1 0 1 (1006/1024) x Tp (503/512) x Tp (252/256) x Tp (126/128) x Tp 1 1 1 1 1 0 1 1 1 0 (1007/1024) x Tp (504/512) x Tp (252/256) x Tp (126/128) x Tp

www.onsemi.com (continued) PWM Data LED Lighting Time per One Frame Wm9 128 Steps256 Steps512 Steps1024 StepsWm0Wm1Wm2Wm3Wm4Wm5Wm6Wm7Wm8 1 1 1 1 1 0 1 1 1 1 (1008/1024) x Tp (504/512) x Tp (252/256) x Tp (126/128) x Tp 1 1 1 1 1 1 0 0 0 0 (1009/1024) x Tp (505/512) x Tp (253/256) x Tp (127/128) x Tp 1 1 1 1 1 1 0 0 0 1 (1010/1024) x Tp (505/512) x Tp (253/256) x Tp (127/128) x Tp 1 1 1 1 1 1 0 0 1 0 (1011/1024) x Tp (506/512) x Tp (253/256) x Tp (127/128) x Tp 1 1 1 1 1 1 0 0 1 1 (1012/1024) x Tp (506/512) x Tp (253/256) x Tp (127/128) x Tp 1 1 1 1 1 1 0 1 0 0 (1013/1024) x Tp (507/512) x Tp (254/256) x Tp (127/128) x Tp 1 1 1 1 1 1 0 1 0 1 (1014/1024) x Tp (507/512) x Tp (254/256) x Tp (127/128) x Tp 1 1 1 1 1 1 0 1 1 0 (1015/1024) x Tp (508/512) x Tp (254/256) x Tp (127/128) x Tp 1 1 1 1 1 1 0 1 1 1 (1016/1024) x Tp (508/512) x Tp (254/256) x Tp (127/128) x Tp 1 1 1 1 1 1 1 0 0 0 (1017/1024) x Tp (509/512) x Tp (255/256) x Tp (128/128) x Tp 1 1 1 1 1 1 1 0 0 1 (1018/1024) x Tp (509/512) x Tp (255/256) x Tp (128/128) x Tp 1 1 1 1 1 1 1 0 1 0 (1019/1024) x Tp (510/512) x Tp (255/256) x Tp (128/128) x Tp 1 1 1 1 1 1 1 0 1 1 (1020/1024) x Tp (510/512) x Tp (255/256) x Tp (128/128) x Tp 1 1 1 1 1 1 1 1 0 0 (1021/1024) x Tp (511/512) x Tp (256/256) x Tp (128/128) x Tp 1 1 1 1 1 1 1 1 0 1 (1022/1024) x Tp (511/512) x Tp (256/256) x Tp (128/128) x Tp 1 1 1 1 1 1 1 1 1 0 (1023/1024) x Tp (512/512) x Tp (256/256) x Tp (128/128) x Tp 1 1 1 1 1 1 1 1 1 1 (1024/1024) x Tp (512/512) x Tp (256/256) x Tp (128/128) x Tp 16.W19 to W10: PWM data of PWM circuit (Ch1) / W29 to W20: PWM data of PWM circuit (Ch2) / W39 to W30: PWM data of PWM circuit (Ch3) / W49 to W40: PWM data of PWM circuit (Ch4) / W59 to W50: PWM data of PWM circuit (Ch5) / W69 to W60: PWM data of PWM circuit (Ch6) / (6) MLD1 to MLD12 Control Data for LED Driver Output Mask Setting By these control data, mask setting of the LED driver outputs (LD1 to LD12) is set in each Ch. In addition, these control data are protected by the command [Lock of LED driver output mask/open/short]. It cannot change these control data when the command [Lock of LED driver output mask/open/short] is set. When changing these control data, transmit the command [Unlock of LED driver output mask/open/short]. Afterwards set these control data. These control data are initialized to “(MLDn) = (0)” all by the reset action (reset by RES pin, voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating) of the system. MLDn State of LED Driver Outputs (LDn) 0 LED is off. (LED driver outputs mask setting) 1 LED is on. (The LED is on by depending on the contents of LnA, LnB, LnC. (n = 1 to 12)) 17.MLD1: Data for mask setting of the LED driver output (LD1) / MLD2: Data for mask setting of the LED driver output (LD2) / MLD3: Data for mask setting of the LED driver output (LD3) / MLD4: Data for mask setting of the LED driver output (LD4) / MLD5: Data for mask setting of the LED driver output (LD5) / MLD6: Data for mask setting of the LED driver output (LD6) / MLD7: Data for mask setting of the LED driver output (LD7) / MLD8: Data for mask setting of the LED driver output (LD8) / MLD9: Data for mask setting of the LED driver output (LD9) / MLD10: Data for mask setting of the LED driver output (LD10) / MLD11: Data for mask setting of the LED driver output (LD11) / MLD12: Data for mask setting of the LED driver output (LD12) (7) MSH1 to MSH12 Control Data for VLED Short Detection Circuit Mask Setting of the LED Driver Outputs By these control data, mask setting of VLED short detection circuit of the LED driver outputs (LD1 to LD12) is set in each Ch. In addition, these control data are protected by the command [Lock of LED driver output mask/ open/short]. It cannot change these control data when the command [Lock of LED driver output mask/open/short] is set. When changing these control data, transmit the command [Unlock of LED driver output mask/open/short]. Afterwards set these control data. These control data are initialized to “(MSHn) = (1)” all by the reset action (reset by RES pin, voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating) of the system. Tp /C00431 fp

www.onsemi.com MSHn State of the Operation of the VLED Short Detection Circuit Status Data (SERR) Result Data of VLED Short Detection (RSH1 to RSH12)

0 VLED short detection circuit of the

corresponding LED driver outputs is separated from LED driver outputs, and VLED short detection is impossible. (VLED short detection circuit mask setting) The status data (SERR) does not reflect result of VLED short detection of the corresponding LED driver outputs. RSH1 to RSH12 maintains the result data of VLED short detection detected at the time of MSHn = “1”. RSH1 to RSH12 is initialized to “0” all by the command [Reset status flag].

1 VLED short detection circuit of the

corresponding LED driver outputs is connected to the LED driver outputs, and VLED short detection is enabled. The status data (SERR) reflects a result of VLED short detection of the corresponding LED driver outputs. RSH1 to RSH12 maintains the result data of VLED short detection of the corresponding LED driver outputs. 18.MSH1: Data for mask setting of the VLED short detecting circuit of LED driver output (LD1) / MSH2: Data for mask setting of the VLED short detecting circuit of LED driver output (LD2) / MSH3: Data for mask setting of the VLED short detecting circuit of LED driver output (LD3) / MSH4: Data for mask setting of the VLED short detecting circuit of LED driver output (LD4) / MSH5: Data for mask setting of the VLED short detecting circuit of LED driver output (LD5) / MSH6: Data for mask setting of the VLED short detecting circuit of LED driver output (LD6) / MSH7: Data for mask setting of the VLED short detecting circuit of LED driver output (LD7) / MSH8: Data for mask setting of the VLED short detecting circuit of LED driver output (LD8) / MSH9: Data for mask setting of the VLED short detecting circuit of LED driver output (LD9) / MSH10: Data for mask setting of the VLED short detecting circuit of LED driver output (LD10) / MSH11: Data for mask setting of the VLED short detecting circuit of LED driver output (LD11) / MSH12: Data for mask setting of the VLED short detecting circuit of LED driver output (LD12) (8) MSL1 to MSL12 Control Data for VSS Short Detection Circuit Mask Setting of the LED Driver Outputs By these control data, mask setting of VSS short detection circuit of the LED driver outputs (LD1 to LD12) is set in each Ch. In addition, these control data are protected by the command [Lock of LED driver output mask/open/short]. It cannot change these control data when the command [Lock of LED driver output mask/open/short] is set. When changing these control data, transmit the command [Unlock of LED driver output mask/open/short]. Afterwards set these control data. These control data are initialized to “(MSLn) = (1)” all by the reset action (reset by RES pin, voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating) of the system. MSLn State of the Operation of the VSS Short Detection Circuit Status Data (SERR) Result Data of VSS Short Detection (RSL1 to RSL12)

0 VSS short detection circuit of the

corresponding LED driver outputs is separated from LED driver outputs, and VSS short detection is impossible. (VSS short detection circuit mask setting) The status data (SERR) does not reflect result of VSS short detection of the corresponding LED driver outputs. RSL1 to RSL12 maintains the result data of VSS short detection detected at the time of MSLn = “1”. RSL1 to RSL12 is initialized to “0” all by the command [Reset status flag].

1 VSS short detection circuit of the

corresponding LED driver outputs is connected to the LED driver outputs, and VSS short detection is enabled. The status data (SERR) reflects a result of VSS short detection of the corresponding LED driver outputs. RSL1 to RSL12 maintains the result data of VSS short detection of the corresponding LED driver outputs. 19.MSL1: Data for mask setting of the VSS short detecting circuit of LED driver output (LD1) / MSL2: Data for mask setting of the VSS short detecting circuit of LED driver output (LD2) / MSL3: Data for mask setting of the VSS short detecting circuit of LED driver output (LD3) / MSL4: Data for mask setting of the VSS short detecting circuit of LED driver output (LD4) / MSL5: Data for mask setting of the VSS short detecting circuit of LED driver output (LD5) / MSL6: Data for mask setting of the VSS short detecting circuit of LED driver output (LD6) / MSL7: Data for mask setting of the VSS short detecting circuit of LED driver output (LD7) / MSL8: Data for mask setting of the VSS short detecting circuit of LED driver output (LD8) / MSL9: Data for mask setting of the VSS short detecting circuit of LED driver output (LD9) / MSL10: Data for mask setting of the VSS short detecting circuit of LED driver output (LD10) / MSL11: Data for mask setting of the VSS short detecting circuit of LED driver output (LD11) / MSL12: Data for mask setting of the VSS short detecting circuit of LED driver output (LD12)

www.onsemi.com (9) MOP1 to MOP12 Control Data for Open Detection Circuit Mask Setting of the LED Driver Outputs By these control data, mask setting of open detection circuit of the LED driver outputs (LD1 to LD12) is set in each Ch. In addition, these control data are protected by the command [Lock of LED driver output mask/open/short]. It cannot change these control data when the command [Lock of LED driver output mask/open/short] is set. When changing these control data, transmit the command [Unlock of LED driver output mask/open/short]. Afterwards set these control data. These control data are initialized to “(MOPn) = (1)” all by the reset action (reset by RES pin, voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating) of the system. MOPn State of the Operation of the Open Detection Circuit Status Data (OERR) Result Data of Open Detection (ROP1 to ROP12)

0 Open detection circuit of the

corresponding LED driver outputs is separated from LED driver outputs, and open detection is impossible. (Open detection circuit mask setting) The status data (OERR) does not reflect result of open detection of the corresponding LED driver outputs. ROP1 to ROP12 maintains the result data of open detection detected at the time of MOPn = “1”. ROP1 to ROP12 is initialized to “0” all by the command [Reset status flag].

1 Open detection circuit of the

corresponding LED driver outputs is connected to the LED driver outputs, and open detection is enabled. The status data (OERR) reflects a result of open detection of the corresponding LED driver outputs. ROP1 to ROP12 maintains the result data of open detection of the corresponding LED driver outputs. 20.MOP1: Data for mask setting of the open detecting circuit of LED driver output (LD1) / MOP2: Data for mask setting of the open detecting circuit of LED driver output (LD2) / MOP3: Data for mask setting of the open detecting circuit of LED driver output (LD3) / MOP4: Data for mask setting of the open detecting circuit of LED driver output (LD4) / MOP5: Data for mask setting of the open detecting circuit of LED driver output (LD5) / MOP6: Data for mask setting of the open detecting circuit of LED driver output (LD6) / MOP7: Data for mask setting of the open detecting circuit of LED driver output (LD7) / MOP8: Data for mask setting of the open detecting circuit of LED driver output (LD8) / MOP9: Data for mask setting of the open detecting circuit of LED driver output (LD9) / MOP10: Data for mask setting of the open detecting circuit of LED driver output (LD10) / MOP11: Data for mask setting of the open detecting circuit of LED driver output (LD11) / MOP12: Data for mask setting of the open detecting circuit of LED driver output (LD12) (10) VSH1B, VSH1A to VSH12B, VSH12A Control Data for VLED Short Detection Voltage Setting of the LED Driver Outputs By these control data, setting of VLED short detection voltage of the LED driver outputs (LD1 to LD12) is set in each Ch. In addition, these control data are protected by the command [Lock of LED driver output mask/open/short]. It cannot change these control data when the command [Lock of LED driver output mask/open/short] is set. When changing these control data, transmit the command [Unlock of LED driver output mask/open/short]. Afterwards set these control data. These control data are initialized to “(VSHnB, VSHnA) = (0, 0)” all by the reset action (reset by RES pin, voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating) of the system. VSHnB VSHnA VLED Short Detection Voltage of the LED Driver Outputs (LDn) 21.VSH1B, VSH1A: Data for setting of the VLED short detection voltage of LED driver output (LD1). / VSH2B, VSH2A : Data for setting of the VLED short detection voltage of LED driver output (LD2). / VSH3B, VSH3A : Data for setting of the VLED short detection voltage of LED driver output (LD3). / VSH4B, VSH4A : Data for setting of the VLED short detection voltage of LED driver output (LD4). / VSH5B, VSH5A : Data for setting of the VLED short detection voltage of LED driver output (LD5). / VSH6B, VSH6A : Data for setting of the VLED short detection voltage of LED driver output (LD6). / VSH7B, VSH7A : Data for setting of the VLED short detection voltage of LED driver output (LD7). / VSH8B, VSH8A : Data for setting of the VLED short detection voltage of LED driver output (LD8). / VSH9B, VSH9A : Data for setting of the VLED short detection voltage of LED driver output (LD9). / VSH10B, VSH10A : Data for setting of the VLED short detection voltage of LED driver output (LD10). / VSH11B, VSH11A : Data for setting of the VLED short detection voltage of LED driver output (LD11). / VSH12B, VSH12A : Data for setting of the VLED short detection voltage of LED driver output (LD12).

www.onsemi.com (11) PLDT Control Data for PWM Duty Setting at the Time of the 125/C0053C Detection with the Temperature Sensor By this control data, the PWM Duty control at the time of the 125°C detection with the temperature sensor is set. This control data is valid for only LED driver output of the PWM setting. In addition, this control data is protected by the command [Lock of control data 1 & control data 2]. It cannot change this control data when the command [Lock of control data 1 & control data 2] is set. When changing this control data, transmit the command [Unlock of control data 1 & control data 2]. Afterwards set this control data. This control data is initialized to “(PLDT) = (0)” by the reset action (reset by RES pin, voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating) of the system. PLDT State of the LED Driver Outputs of the PWM Setting 0 When 125°C or above were detected by a temperature sensor, the PWM output waveform is adjusted automatically. (This LSI halves duty of the PWM outputs waveform to suppress the temperature) 1 Even if 125°C or above are detected by a temperature sensor, the PWM output waveform is not adjusted. (12) TSDN Control Data for Thermal Shut Down Function Setting By this control data, the thermal shut down function is set to valid or invalid. At the time of TSDN = “0”, a thermal shut down function is valid, and this LSI performs thermal shut down actuating when junction temperature 150 °C is detected by a temperature sensor. (The LED driver outputs are forcibly set to the turning off state.) At the time of TSDN = “1”, a thermal shut down function is invalid and this LSI does not perform thermal shut down actuating when junction temperature 150 °C is detected by a temperature sensor. In addition, this control data is protected by the command [Lock of control data 1 & control data 2]. It cannot change this control data when the command [Lock of control data 1 & control data 2] is set. When changing this control data, transmit the command [Unlock of control data 1 & control data 2]. Afterwards set this control data. This control data is initialized to “(TSDN) = (0)” by the reset action (reset by RES pin, voltage detection type reset circuit (VDET) or software reset) of the system. TSDN Thermal Shut Down Function

0 Valid

1 Invalid

(13) OC Control Data for Switching the Internal Oscillator Operating Mode and External Clock Operating Mode This control data bit selects either the internal oscillator operating mode or external clock operating mode. In addition, this control data is protected by the command [Lock of control data 1 & control data 2]. It cannot change this control data when the command [Lock of control data 1 & control data 2] is set. When changing this control data, transmit the command [Unlock of control data 1 & control data 2]. Afterwards set this control data. This control data is initialized to “(OC) = (0)” by the reset action (reset by RES pin or voltage detection type reset circuit (VDET)) of the system. OC Fundamental Clock Operating Mode Input Pin (OSCI) State

0 Internal oscillator operating mode Connect to GND

1 External clock operating mode Input the clock of fOSCI1 = 200 kHz or

fOSCI2 = 150 kHz from the outside

command [Lock of control data 1 & control data 2] is set. voltage detection type reset circuit (VDET)) of the system. Figure 12. Output Current Rising Time abnormality, LED pull-up supply voltage abnormality, fundamental clock abnormality, reset action. RAJ12 to RAJ1, RLD12 to RLD1” from ERR pin with serial data transfer clock.

Table 3. LIST OF READ COMMAND CONTROL REGISTERS BY ERR PIN command [Lock of control data 1 & control data 2] is set. reset or the thermal shut down actuating) of the system. 0 0 It can’t detect an abnormal value of LED pull-up supply voltage. LED pull-up supply voltage and sets the status data VERR to “1”. However, the recommended power supply VDD is between 4.5 V and 5.5 V. LED pull-up supply voltage and sets the status data VERR to “1”.

www.onsemi.com (18) MKIR Control Data for Setting External Resistance Value Abnormality Detection Mask of IREF Pin The control data bit sets the external resistance value abnormality detection mask of IREF pin. In addition, this control data is protected by the command [Lock of control data 1 & control data 2]. It cannot change this control data when the command [Lock of control data 1 & control data 2] is set. When changing this control data, transmit the command [Unlock of control data 1 & control data 2]. Afterwards set this control data. This control data is initialized to “(MKIR) = (1)” by the reset action (reset by RES pin, voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating) of the system. MKIR External Resistance Value Abnormality Detection Operation Statement of IREF Pin 0 It doesn’t operate the external resistance value abnormality detection of IREF pin. 1 It operates the external resistance value abnormality detection of IREF pin. (19) MKSH Control Data for Setting VLED Short Detection Mask of All of LED Driver Outputs from LD1 to LD12 The control data bit sets the VLED short detection mask of all of LED driver outputs from LD1 to LD12. In addition, this control data is protected by the command [Lock of control data 1 & control data 2]. It cannot change this control data when the command [Lock of control data 1 & control data 2] is set. When changing this control data, transmit the command [Unlock of control data 1 & control data 2]. Afterwards set this control data. This control data is initialized to “(MKSH) = (1)” by the reset action (reset by RES pin, voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating) of the system. MKSH VLED Short Detection Operation Statement of LED Driver Outputs 0 It doesn’t operate the VLED short detection regardless of contents of the control data MSHn. 1 It operates the VLED short detection with contents of the control data MSHn. 22.(n = 1 to 12) (20) MKSL Control Data for Setting VSS Short Detection Mask of All of LED Driver Outputs from LD1 to LD12 The control data bit sets the VSS short detection mask of all of LED driver outputs from LD1 to LD12. In addition, this control data is protected by the command [Lock of control data 1 & control data 2]. It cannot change this control data when the command [Lock of control data 1 & control data 2] is set. When changing this control data, transmit the command [Unlock of control data 1 & control data 2]. Afterwards set this control data. This control data is initialized to “(MKSL) = (1)” by the reset action (reset by RES pin, voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating) of the system. MKSL VSS Short Detection Operation Statement of LED Driver Outputs 0 It doesn’t operate the VSS short detection regardless of contents of the control data MSLn. 1 It operates the VSS short detection with contents of the control data MSLn. 23.(n = 1 to 12)

www.onsemi.com (21) MKOP Control Data for Setting Open Detection Mask of All of LED Driver Outputs from LD1 to LD12 The control data bit sets the open detection mask of all of LED driver outputs from LD1 to LD12. In addition, this control data is protected by the command [Lock of control data 1 & control data 2]. It cannot change this control data when the command [Lock of control data 1 & control data 2] is set. When changing this control data, transmit the command [Unlock of control data 1 & control data 2]. Afterwards set this control data. This control data is initialized to “(MKOP) = (1)” by the reset action (reset by RES pin, voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating) of the system. MKOP Open Detection Operation Statement of LED Driver Outputs 0 It doesn’t operate the open detection regardless of contents of the control data MOPn. 1 It operates the open detection with contents of the control data MOPn. 24.(n = 1 to 12) (22) MKAJ Control Data for Setting Adjacent Outputs Short Detection Mask of All of LED Driver Outputs from LD1 to LD12 The control data bit sets the adjacent outputs detection mask of LED driver outputs from LD1 to LD12. In addition, this control data is protected by the command [Lock of control data 1 & control data 2]. It cannot change this control data when the command [Lock of control data 1 & control data 2] is set. When changing this control data, transmit the command [Unlock of control data 1 & control data 2]. Afterwards set this control data. This control data is initialized to “(MKAJ) = (1)” by the reset action (reset by RES pin, voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating) of the system. MKAJ Adjacent Outputs Short Detection Operation Statement of LED Driver Outputs 0 It doesn’t operate the adjacent outputs short detection. 1 It operates the adjacent outputs short detection.

www.onsemi.com Correspondence of Output Pins to Control Data for LED Driver Output Mask Setting Output Pins Control Data for LED Driver Output Mask Setting LD1 MLD1 LD2 MLD2 LD3 MLD3 LD4 MLD4 LD5 MLD5 LD6 MLD6 LD7 MLD7 LD8 MLD8 LD9 MLD9 LD10 MLD10 LD11 MLD11 LD12 MLD12 For example, the table below lists the output states for the LD7 output pin. MLDJ Output Pin (LD7) State 0 LED is off. 1 LED is on. If (L7C,L7B,L7A) = (0,0,0) is set, the current value is decided by control data “CA77 to CA70” of output current regulation. And duty is 100%. If (L7C,L7B,L7A)=(0,0,1) is set, the current value is decided by control data “CA77 to CA70” of output current regulation. And duty is decided by PWM data “W19 to W10” of PWM circuit (Ch1). If (L7C,L7B,L7A)=(0,1,0) is set, the current value is decided by control data “CA77 to CA70” of output current regulation. And duty is decided by PWM data “W29 to W20” of PWM circuit (Ch2). If (L7C,L7B,L7A)=(0,1,1) is set, the current value is decided by control data “CA77 to CA70” of output current regulation. And duty is decided by PWM data “W39 to W30” of PWM circuit (Ch3). If (L7C,L7B,L7A)=(1,0,0) is set, the current value is decided by control data “CA77 to CA70” of output current regulation. And duty is decided by PWM data “W49 to W40” of PWM circuit (Ch4). If (L7C,L7B,L7A)=(1,0,1) is set, the current value is decided by control data “CA77 to CA70” of output current regulation. And duty is decided by PWM data “W59 to W50” of PWM circuit (Ch5). If (L7C,L7B,L7A)=(1,1,0) is set, the current value is decided by control data “CA77 to CA70” of output current regulation. And duty is decided by PWM data “W69 to W60” of PWM circuit (Ch6). If (L7C,L7B,L7A)=(1,1,1) is set, the current value is decided by control data “CA77 to CA70” of output current regulation. And duty is 100%.

www.onsemi.com Explanation of Status Data (1) TSD125 125/C0053C Detection Status Data with the Temperature Sensor A detection state of the junction temperature with the temperature sensor is set for this status data. When junction temperature is less than 125°C, TSD125 is set to “0”. When junction temperature is 125°C or more, TSD125 is set to “1”. Even if junction temperature falls to less than 125 °C after TSD125 has been set to “1”, TSD125 is not set to “0” and maintains “1”. The controller can read this status data by the command [Read status flag 1]. This status data is set to “(TSD125) = (1)” by the reset action (reset by RES pin or voltage detection type reset circuit (VDET)) of the system at the time of power on. Therefore it initializes this status data to “(TSD125) = (0)” by transmitting the command [Reset status flag]. TSD125 Status

0 Normal operation

1 The temperature sensor detects 125°C or more

(2) TSD150 150/C0053C Detection Status Data with the Temperature Sensor A detection state of the junction temperature with the temperature sensor is set for this status data. When junction temperature is less than 150°C, TSD150 is set to “0”. When junction temperature is 150°C or more, TSD150 is set to “1”. In addition, when the thermal shut down is valid by control data TSDN = “0” and it is at the time of TSD150 = “1”, all LED driver output is set to turn off state forcibly. Even if junction temperature falls to less than 150°C after TSD150 has been set to “1”, TSD150 is not set to “0” and maintains “1”. The controller can read this status data by the command [Read status flag 1]. This status data is set to “(TSD150) = (1)” by the reset action (reset by RES pin or voltage detection type reset circuit (VDET)) of the system at the time of power on. Therefore it initializes this status data to “(TSD150) = (0)” by transmitting the command [Reset status flag]. TSD150 Status

1 The temperature sensor detects 150°C or more

(3) SERR Master Status Data of the Short Abnormality Detection A detection state of the short detection circuit of the LED driver outputs is set for this status data. When short abnormality is not detected by LED driver outputs, SERR is set to “0”, and when short abnormality is detected by one or more LED driver output, SERR is set to “1”. Even if short abnormality is not detected after SERR has been set to “1”, SERR is not set to “0” and maintains “1”. The controller can read this status data by the command [Read status flag 1]. This status data is set to “(SERR) = (1)” by the reset action (reset by RES pin or voltage detection type reset circuit (VDET)) of the system at the time of power on. Therefore it initializes this status data to “(SERR) = (0)” by transmitting the command [Reset status flag]. SERR Status

1 Short abnormality of one or more LED driver output is detected

(4) OERR Master Status Data of the Open Abnormality Detection A detection state of the open detection circuit of the LED driver outputs is set for this status data. When open abnormality is not detected by LED driver outputs, OERR is set to “0”, and when open abnormality is detected by one or more LED driver output, OERR is set to “1”. Even if open abnormality is not detected after OERR has been set to “1”, OERR is not set to “0” and maintains “1”. The controller can read this status data by the command [Read status flag 1]. This status data is set to “(OERR) = (1)” by the reset action (reset by RES pin or voltage detection type reset circuit (VDET)) of the system at the time of power on. Therefore it initializes this status data to “(OERR) = (0)” by transmitting the command [Reset status flag].

www.onsemi.com OERR Status

1 Open abnormality of one or more LED driver output is detected

(5) AERR Master Status Data of the Adjacent Outputs Short Abnormality Detection A detection state of the adjacent outputs short detection circuit of the LED driver outputs is set for this status data. When the adjacent outputs short abnormality is not detected by LED driver outputs, AERR is set to “0”, and when the adjacent outputs short abnormality is detected by one or more LED driver output, AERR is set to “1”. Even if short abnormality is not detected after AERR has been set to “1”, AERR is not set to “0” and maintains “1”. The controller can read this status data by the command [Read status flag 1]. This status data is set to “(AERR) = (1)” by the reset action (reset by RES pin or voltage detection type reset circuit (VDET)) of the system at the time of power on. Therefore it initializes this status data to “(AERR) = (0)” by transmitting the command [Reset status flag]. AERR Status

1 Adjacent outputs short abnormality of one or more LED driver output is detected

(6) VERR Status Data of the VLED Voltage Abnormality Detection A detection state of the VLED voltage abnormality detection circuit is set for this status data. When the VLED voltage abnormality is not detected by SENSE pin, VERR is set to “0”, and when the VLED voltage abnormality is detected by SENSE pin, VERR is set to “1”. Even if VLED voltage abnormality is not detected after VERR has been set to “1”, VERR is not set to “0” and maintains “1”. The controller can read this status data by the command [Read status flag 1]. This status data is set to “(VERR) =(1)” by the reset action (reset by RES pin or voltage detection type reset circuit (VDET)) of the system at the time of power on. Therefore it initializes this status data to “(VERR) = (0)” by transmitting the command [Reset status flag]. VERR Status

1 VLED voltage abnormality in SENSE pin is detected

(7) CERR Status Data of the Fundamental Clock Abnormality Detection A clock detection state of a fundamental clock is set for this status data. When it is the internal oscillator operating mode “(OC) = (0)” , the operating state of an internal oscillation clock is detected. When it is the external clock operating mode “(OC) = (1)” , the operating state of an external clock is detected. The detection of a fundamental clock starts at the rising edge of the LATCH signal at the command [Check of the fundamental clock abnormality]. After that when the fundamental clock is not detected, CERR is set to “1”. And when the fundamental clock is detected, CERR is set to “0”. The controller can read this status data by the command [Read status flag 1]. The CERR can be cleared “(CERR) = (0)” by the command [Clearing of the fundamental clock abnormality]. This status data is set to “(CERR) = (1)” by the reset action (reset by RES pin or voltage detection type reset circuit (VDET)) of the system at the time of power on. CERR Status

0 A fundamental clock (an internal oscillation clock or an external clock) is detected

1 A fundamental clock (an internal oscillation clock or an external clock) is not detected

www.onsemi.com (8) POR Status Data of the Reset Action The reset active state of the system is set for this status data. When a system does a reset action (reset by RES pin, voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating), POR is set to “1”. The controller can read this status data by the command [Read status flag 1]. This status data is initialized to “(POR) =(0)” by the command [Reset POR flag]. POR Status 1 Reset of the system is executed by RES pin, voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating (9) C_LOCK Status Data of the Output Current Regulation Lock A state of lock/unlock of control data “CAn7 to CAn0 (n = 1 to 12)” for current value regulation of the LED driver outputs is set for this status data. When the command [Lock of output current regulation] is transmitted, C_LOCK is set to “1” and the change of these control data “CAn7 to CAn0 (n = 1 to 12)” is impossible. When the command [Unlock of output current regulation] is transmitted, C_LOCK is set to “0” and the change of these control data “CAn7 to CAn0 (n = 1 to 12)” is possible. The controller can read this status data by the command [Read status flag 2]. This status data is initialized to “(C_LOCK) = (0)” by the reset action (reset by RES pin, voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating) of the system. C_LOCK Status

0 Unlock of output current regulation

1 Lock of output current regulation

(10) M_LOCK Status Data of the LED Driver Output Mask/Open/Short Lock A state of lock/unlock of control data, such as “MLD1 to MLD12” for the LED driver output mask and “MSH1 to MSH12” for the VLED short detection circuit mask of LED driver output and “MSL1 to MSL12” for the VSS short detection circuit mask of LED driver output and “MOP1 to MOP12” for the open detection circuit mask of LED driver output and “VSH1B, VSH1A to VSH12B, VSH12A” for the VLED short detection voltage setting of LED driver output, is set for this status data. When the command [Lock of LED driver output mask/open/short] is transmitted, M_LOCK is set to “1” and the change of these control data “MLD1 to MLD12”, “MSH1 to MSH12”, “MSL1 to MSL12”, “MOP1 to MOP12”, “VSH1B, VSH1A to VSH12B, VSH12A” is impossible. When the command [Unlock of LED driver output mask/open/short] is transmitted, M_LOCK is set to “0” and the change of these control data “MLD1 to MLD12”, “MSH1 to MSH12”, “MSL1 to MSL12”, “MOP1 to MOP12”, “VSH1B, VSH1A to VSH12B, VSH12A” is possible. The controller can read this status data by the command [Read status flag 2]. This status data is initialized to “(M_LOCK) = (0)” by the reset action (reset by RES pin or voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating) of the system. M_LOCK Status

0 Unlock of LED driver output mask/open/short

1 Lock of LED driver output mask/open/short

www.onsemi.com (11) P_LOCK Status Data of the PWM ch & PWM Steps & PWM Frame Frequency Lock A state of lock/unlock of control data, such as “L1C, L1B, L1A to L12C, L12B, L12A” for setting channel of the PWM circuit of the LED driver outputs “LD1 to LD12” and “WN1, WN0” for setting number of the PWM output steps and “PF3 to PF0” for setting frame frequency of PWM output waveform, is set for this status data. When the command [Lock of the PWM ch & PWM steps & PWM frame frequency] is transmitted, P_LOCK is set to “1”, and the change of these control data “L1C, L1B, L1A to L12C, L12B, L12A”, “WN1, WN0”, “PF3 to PF0” is impossible. When the command [Unlock of the PWM ch & PWM steps & PWM frame frequency] is transmitted, P_LOCK is set to “0”, and the change of these control data “L1C, L1B, L1A to L12C, L12B, L12A”, “WN1, WN0”, “PF3 to PF0” is possible. The controller can read this status data by the command [Read status flag 2]. This status data is initialized to “(P_LOCK) = (0)” by the reset action (reset by RES pin, voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating) of the system. P_LOCK Status

0 Unlock of the PWM ch & PWM steps & PWM frame frequency

1 Lock of the PWM ch & PWM steps & PWM frame frequency

(12) W_LOCK Status Data of the PWM Data Lock A state of lock/unlock of control data, such as “W19 to W10, W29 to W20, W39 to W30, W49 to W40, W59 to W50, W69 to W60” for setting the PWM data of PWM outputs “1ch to 6ch” maping to LED driver outputs “LD1 to LD12”, is set for this status data. When the command [Lock of the PWM data] is transmitted, W_LOCK is set to “1”, and the change of these control data “W19 to W10, W29 to W20, W39 to W30, W49 to W40, W59 to W50, W69 to W60” is impossible. When the command [Unlock of the PWM data] is transmitted, W_LOCK is set to “0”, and the change of these control data “W19 to W10, W29 to W20, W39 to W30, W49 to W40, W59 to W50, W69 to W60” is possible. The controller can read this status data by the command [Read status flag 2]. This status data is initialized to “(W_LOCK) = (0)” by the reset action (reset by RES pin, voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating) of the system. W_LOCK Status

0 Unlock of the PWM data

1 Lock of the PWM data

(13) R_LOCK Status Data of Lock of the Control Data 1 & Control Data 2 A state of lock/unlock of the control data 1 “PLDT, TSDN, OC, EXF, SR, ERD” and the control data 2 “VLS0, VLS1, MKIR, MKSH, MKSL, MKOP, MKAJ”, is set for this status data. When the command [Lock of control data 1 & control data 2] is transmitted, R_LOCK is set to “1” and the change of these control data “PLDT, TSDN, OC, EXF, SR, ERD, VLS0, VLS1, MKIR, MKSH, MKSL, MKOP, MKAJ” is impossible. When the command [Unlock of control data 1 & control data 2] is transmitted, R_LOCK is set to “0” and the change of these control data “PLDT, TSDN, OC, EXF, SR, ERD, VLS0, VLS1, MKIR, MKSH, MKSL, MKOP, MKAJ” is possible. The controller can read this status data by the command [Read status flag 2]. This status data is initialized to “(R_LOCK) =(0)” by the reset action (reset by RES pin, voltage detection type reset circuit (VDET), software reset or the thermal shut down actuating) of the system. R_LOCK Status

0 Unlock of the control data 1 and the control data 2

1 Lock of the control data 1 and the control data 2

www.onsemi.com Explanation of Read Data (1) IR0, IR1 Result Data of External Resistance Value Diagnosis An external resistance diagnosis result of 2 bits depending on resistance connected to IREF pin is set to these read data. The controller can read these data, by the command [Read external resistance diagnosis result]. These read data are initialized to “(IR1,IR0) = (1,1)” by the reset action (reset by RES pin or voltage detection type reset circuit (VDET)) of the system at the time of power on. Therefore it initializes these read data to “(IR1,IR0) = (0,1)” by transmitting the command [Reset status flag]. Resistance Value of the IREF Pin Result Data of External Resistance Value Diagnosis IR1 IR0 Less than 11 k/C0087 0 0 12 k/C0087 to 56 k/C0087 0 1 More than 62 k/C0087 1 1 (2) RSH1 to RSH12 Result Data of VLED Short Detection of LED Driver Outputs from LD1 to LD12 These read data are set the result of VLED short detection of LED driver outputs from LD1 to LD12. When the LED driver outputs are normal operation, the RSHn (n = 1 to 12) are set to “0”. When the LED driver outputs are VLED short abnormal state, the RSHn (n = 1 to 12) are set to “1”. Even if the LED driver outputs are normal operation after RSHn (n = 1 to 12) have been set to “1”, RSHn (n = 1 to 12) are not set to “0” and maintain “1”. The controller can read these data by the command [Read VLED short detection result]. These read data are set to “(RSHn) = (1)” by the reset action (reset by RES pin or voltage detection type reset circuit (VDET)) of the system at the time of power on. Therefore it initializes these read data to “(RSHn) = (0)” by transmitting the command [Reset status flag]. RSHn Result Data of VLED Short Detection of LED Driver Output

1 VLED short abnormal state of an LED driver output

25.The RSHn (n = 1 to 12) are set to the result of VLED short detection of LED driver outputs LDn (n = 1 to 12). The table below lists the correspondence of LED driver output pins to result data of VLED short detection of LED driver output. Output Pins Result Data of VLED Short Detection of LED Driver Output LD1 RSH1 LD2 RSH2 LD3 RSH3 LD4 RSH4 LD5 RSH5 LD6 RSH6 LD7 RSH7 LD8 RSH8 LD9 RSH9 LD10 RSH10 LD11 RSH11 LD12 RSH12

www.onsemi.com (3) RSL1 to RSL12 Result Data of VSS Short Detection of LED Driver Outputs from LD1 to LD12 These read data are set the result of VSS short detection of LED driver outputs from LD1 to LD12. When the LED driver outputs are normal operation, the RSLn (n = 1 to 12) are set to “0”. When the LED driver outputs are VSS short abnormal state, the RSLn (n = 1 to 12) are set to “1”. Even if the LED driver outputs are normal operation after RSLn (n = 1 to 12) have been set to “1”, RSLn (n = 1 to 12) are not set to “0” and maintain “1”. The controller can read these data by the command [Read VSS short detection result]. These read data are set to “(RSLn) = (1)” by the reset action (reset by RES pin or voltage detection type reset circuit (VDET)) of the system at the time of power on. Therefore it initializes these read data to “(RSLn) = (0)” by transmitting the command [Reset status flag]. RSLn Result Data of VSS Short Detection of LED Driver Output

1 VSS short abnormal state of an LED driver output

26.The RSLn (n = 1 to 12) are set to the result of VSS short detection of LED driver outputs LDn (n = 1 to 12). The table below lists the correspondence of LED driver output pins to result data of VSS short detection of LED driver output. Output Pins Result Data of VSS Short Detection of LED Driver Output LD1 RSL1 LD2 RSL2 LD3 RSL3 LD4 RSL4 LD5 RSL5 LD6 RSL6 LD7 RSL7 LD8 RSL8 LD9 RSL9 LD10 RSL10 LD11 RSL11 LD12 RSL12

www.onsemi.com (4) ROP1 to ROP12 Result Data of Open Detection of LED Driver Outputs from LD1 to LD12 These read data are set the result of open detection of LED driver outputs from LD1 to LD12. When the LED driver outputs are normal operation, the ROPn (n = 1 to 12) are set to “0”. When the LED driver outputs are open abnormal state, the ROn (n = 1 to 12) are set to “1”. Even if the LED driver outputs are normal operation after ROPn (n = 1 to 12) have been set to “1”, ROPn (n = 1 to 12) are not set to “0” and maintain “1”. The controller can read these data by the command [Read open detection result]. These read data are set to “(ROPn) = (1)” by the reset action (reset by RES pin or voltage detection type reset circuit (VDET)) of the system at the time of power on. Therefore it initializes these read data to “(ROPn) = (0)” by transmitting the command [Reset status flag]. ROPn Result Data of Open Detection of LED Driver Output

1 Open abnormal state of an LED driver output

27.The ROPn (n = 1 to 12) are set to the result of open detection of LED driver outputs LDn (n = 1 to 12). The table below lists the correspondence of LED driver output pins to result data of open detection of LED driver output. Output Pins Result Data of Open Detection of LED Driver Output LD1 ROP1 LD2 ROP2 LD3 ROP3 LD4 ROP4 LD5 ROP5 LD6 ROP6 LD7 ROP7 LD8 ROP8 LD9 ROP9 LD10 ROP10 LD11 ROP11 LD12 ROP12

www.onsemi.com (5) RAJ1 to RAJ12 Result Data of Adjacent Outputs Short Detection of LED Driver Outputs from LD1 to LD12 These read data are set the result of adjacent outputs short detection of LED driver outputs from LD1 to LD12. When the LED driver outputs are normal operation, the RAJn (n = 1 to 12) are set to “0”. When the LED driver outputs are adjacent outputs short abnormal state, the RAJn (n = 1 to 12) are set to “1”. Even if the LED driver outputs are normal operation after RAJn (n = 1 to 12) have been set to “1”, RAJn (n = 1 to 12) are not set to “0” and maintain “1”. The controller can read these data by the command [Read adjacent outputs short detection result]. These read data are set to “(RAJn) = (1)” by the reset action (reset by RES pin or voltage detection type reset circuit (VDET)) of the system at the time of power on. Therefore it initializes these read data to “(RAJn) = (0)” by transmitting the command [Reset status flag]. RAJn Result Data of Adjacent Outputs Short Detection of LED Driver Output

1 Adjacent outputs short abnormal state of an LED driver output

28.The RAJn (n = 1 to 12) are set to the result of adjacent outputs short detection of LED driver outputs LDn (n = 1 to 12). The table below lists the correspondence of LED driver output pins to result data of adjacent outputs short detection of LED driver output. Output Pins Result Data of Adjacent Outputs Short Detection of LED Driver Output LD1 RAJ1 LD2 RAJ2 LD3 RAJ3 LD4 RAJ4 LD5 RAJ5 LD6 RAJ6 LD7 RAJ7 LD8 RAJ8 LD9 RAJ9 LD10 RAJ10 LD11 RAJ11 LD12 RAJ12

www.onsemi.com (6) RLD1 to RLD12 State Data of the LED Driver Outputs from LD1 to LD12 These read data are set the operating state of the LED driver outputs from LD1 to LD12. When the LED driver output is “OFF”, the RLDn (n = 1 to 12) is set to “0”. When the LED driver output is “ON”, the RLDn (n = 1 to 12) is set to “1”. The RLDn (n = 1 to 12) is set by the rising edge of the LATCH signal at the command [Read the state data of the LED driver output]. The controller can read these data by the command [Read the state data of the LED driver output]. These read data are initialized to “(RLDn)= (0)” by the reset action (reset by RES pin or voltage detection type reset circuit (VDET)) of the system at the time of power on. And it initializes these read data to “(RLDn) = (0)” by transmitting the command [Reset status flag]. RLDn The State of the LED Driver Output

0 OFF

29.The RLDn (n = 1 to 12) are set to the state of the LED driver outputs LDn (n = 1 to 12). The table below lists the correspondence of LED driver output pins to the state data of LED driver output. Output Pins The State Data of the LED Driver Output LD1 RLD1 LD2 RLD2 LD3 RLD3 LD4 RLD4 LD5 RLD5 LD6 RLD6 LD7 RLD7 LD8 RLD8 LD9 RLD9 LD10 RLD10 LD11 RLD11 LD12 RLD12

www.onsemi.com Explanation of the Constant Current LED Driver Output (1) About Current Value This LSI has 12-ch constant current LED driver circuits which can set the current value for each LED driver output. Reference current (IREF) is decided by reference voltage (VREF) outputted from IREF pin, and by an external resistor connected to IREF pin. Peak output current (IDmax) in all LED driver outputs is shown by the following relational Equations. IREF /C0043 VREF REXT [/C0109A] (eq. 1) IDmax /C0043IREF /C0032500 [mA] (eq. 2) The current value for each LED driver output can be set for each channel by the control data of CA17 to CA10, CA27 to CA20, CA37 to CA30, CA47 to CA40, CA57 to CA50, CA67 to CA60, CA77 to CA70, CA87 to CA80, CA97 to CA90, CA107 to CA100, CA117 to CA110 and CA127 to CA120. In addition, these control data are protected by the command [Lock of output current regulation] and can change it after setting the command [Unlock of output current regulation]. ID /C0043IDmax /C0032 ((CAn7 to CAn0) /C00411) 256 [mA] (eq. 3) (n = 1 to 12) For example, in the case of LED driver output LD1 in 50 mA, LED driver output LD2 in 30.4 mA, LED driver output LD3 in 14.8 mA, it is VREF = 1.2 V (typ), REXT = 12 k/C0087, IREF = 100 /C0109A, IDmax = 50 mA, CA17 to CA10 = “11111111”, CA27 to CA20 = “10011011”, CA37 to CA30 = “01001011”. (2) About Control of the On/Off The on/off control for each LED driver output can be set by the control of MLD1 to MLD12. In addition, these control data are protected by the command [Lock of LED driver output mask/open/short] and can change it after setting the command [Unlock of LED driver output mask/open/short]. This LSI has 6-ch PWM circuits which can set the lighting time (duty) per one frame for each LED driver output. The corresponding LED driver outputs can control a period of the LED lighting per one frame by setting MLD1 to MLD12= “1”, and by setting one of (LnC, LnB, LnA) = this LSI can coordinate brightness of the LED. When the LED driver output is set a duty of 100% without using PWM function, set LnC, LnB, LnA = “0,0,0” or “1,1,1”. When the LED driver output is set the PWM function, it needs to set the number (WN1, WN0) of PWM output steps, the frame frequency (PF3 to PF0) of the PWM output waveform, PWM data (Wm9 to Wm0) of the PWM circuit. MLDn State of LED Driver Outputs (LDn) 0 LED is off. (LED driver outputs mask setting) 1 LED is on. (The LED is on by depending on the contents of LnC, LnB, LnA) 30.(n = 1 to 12, m = 1 to 6) 31.MLD1: Data for mask setting of the LED driver output (LD1). / MLD2: Data for mask setting of the LED driver output (LD2). / MLD3: Data for mask setting of the LED driver output (LD3). / MLD4: Data for mask setting of the LED driver output (LD4). / MLD5: Data for mask setting of the LED driver output (LD5). / MLD6: Data for mask setting of the LED driver output (LD6). / MLD7: Data for mask setting of the LED driver output (LD7). / MLD8: Data for mask setting of the LED driver output (LD8). / MLD9: Data for mask setting of the LED driver output (LD9). / MLD10: Data for mask setting of the LED driver output (LD10). / MLD11: Data for mask setting of the LED driver output (LD11). / MLD12: Data for mask setting of the LED driver output (LD12). When there is a LED driver output which doesn’t be used, it is necessary that the control data “MLD1 to MLD12” of LED driver output mask corresponding to the unused LED driver output is set to “0” (LED is off). And it is necessary that the control data “MSH1 to MSH12” of VLED short detection circuit mask, the control data “MSL1 to MSL12” of VSS short detection circuit mask and the control data “MOP1 to MOP12” of open detection circuit mask, corresponding to the unused LED driver output, is set to “0” (Disabled VLED short detection, disabled VSS short detection, disabled open detection). If those LED driver outputs are opened and those control data are set to “1”, maybe it is the VLED short abnormality detection, VSS short abnormality detection and open short abnormality detection. And the VLED short detection result data “RSH1 to RSH12”, the VSS short detection result data “RSL1 to RSL12” and the open detection result data “ROP1 to ROP12” corresponding to the LED driver is set to “1” and the status data “SERR” and “OERR” is set to “1”. And the ERR pin is set to “L”. So it needs to be careful.

Figure 13. LED Driver Waveforms with PWM Outputs of 128 Steps

Table 4. CURRENT VALUE OF LED DRIVER OUTPUT

0 X X X X X X X X Outputs (LD8 to LD12): LED is off

Table 5. LED LIGHTING TIME PER ONE FRAME OF LED DRIVER OUTPUT 1 0 0 0 PWM circuit is not selected, LED is on.

Figure 14. LED Driver Waveforms with PWM Outputs of 256 Steps

Table 6. CURRENT VALUE OF LED DRIVER OUTPUT Table 7. LED LIGHTING TIME PER ONE FRAME OF LED DRIVER OUTPUT 1 0 0 0 PWM circuit is not selected, LED is on.

Figure 15. LED Driver Waveforms with PWM Outputs of 512 Steps

Table 8. CURRENT VALUE OF LED DRIVER OUTPUT Table 9. LED LIGHTING TIME PER ONE FRAME OF LED DRIVER OUTPUT 1 0 0 0 PWM circuit is not selected, LED is on.

Figure 16. LED Driver Waveforms with PWM Outputs of 1024 Steps

Table 10. CURRENT VALUE OF LED DRIVER OUTPUT Table 11. LED LIGHTING TIME PER ONE FRAME OF LED DRIVER OUTPUT 1 0 0 0 PWM circuit is not selected, LED is on.

occurred, ERR pin is set to low level(VSS). Figure 17. Equivalent Circuit of the Error Detection Circuit

www.onsemi.com Explanation of the VLED Short Detection Operation of the LED Driver Output The VLED short detection of the LED driver output is effective, when control data (MLD1 to MLD12) for LED driver output mask is “1” , when control data (MSH1 to MSH12) for VLED short detection circuit mask is “1”, when control data (MKSH) for VLED short detection mask of all of LED driver outputs is “1” and when lighting time of the LED is more than 5 [/C0109s]. The VLED short detection operation compares the potential difference of SENSE voltage (VSE) and the LED driver output voltage (VLDn) with the short detection voltage (VLSH1, VLSH2, VLSH3, VLSH4) by a comparator. If this potential difference is less than the short detection voltage (VLSH1, VLSH2, VLSH3, VLSH4), the LED driver output is judged the VLED short abnormality. And VLED short detection result data (RSH1 to RSH12) is set to “1” (abnormality). On the other hand, if this potential difference is more than the short detection voltage (VLSH1, VLSH2, VLSH3, VLSH4), the LED driver output is judged the normal. And VLED short detection result data (RSH1 to RSH12) is set to “0” (normal). When short abnormality of one or more LED driver output is detected, status data (SERR) of short abnormality detection is set to “1”. It is judged all with short abnormality if potential difference of SENSE voltage and the LED driver output voltage becomes less than the short detection voltage (VLSH1, VLSH2, VLSH3, VLSH4) by not only complete short abnormality but also incomplete short abnormality. The controller can receive VLED short detection result data (RSH1 to RSH12) by the command [Read VLED short detection result], and can receive status data (SERR) of short abnormality detection by the command [Read status flag 1]. These control data are maintained and are initialized by the command [Reset status flag]. In addition, the VLED short detection operating is possible to stop per channel by the control data (MSH1 to MSH12) of VLED short detection circuit mask of the LED driver output. Explanation of the VSS Short Detection Operation of the LED Driver Output The VSS short detection of the LED driver output is effective, when control data (MLD1 to MLD12) for LED driver output mask is “1” or “0”, when control data (MSL1 to MSL12) for VSS short detection circuit mask is “1”, when control data (MKSL) for VSS short detection mask of all of LED driver outputs is “1” and when unlighting time of the LED is more than 5 [/C0109s]. The VSS short detection operation compares the LED driver output voltage (VLDn) with the open detection voltage (VLOP) by a comparator. If the LED driver output voltage (VLDn) is less than the open detection voltage (VLOP), the LED driver output is judged the VSS short abnormality. And VSS short detection result data (RSL1 to RSL12) is set to “1” (abnormality). On the other hand, if the LED driver output voltage (VLDn) is more than the open detection voltage (VLOP), the LED driver output is judged the normal. And VSS short detection result data (RSL1 to RSL12) is set to “0” (normal). When VSS short abnormality of one or more LED driver output is detected, status data (SERR) of short abnormality detection is set to “1”. It is judged all with short abnormality if the LED driver output voltage (VLDn) becomes less than the open detection voltage (VLOP) by not only complete short abnormality but also incomplete short abnormality. The controller can receive VSS short detection result data (RSL1 to RSL12) by the command [Read VSS short detection result], and can receive status data (SERR) of short abnormality detection by the command [Read status flag 1]. These control data are maintained and are initialized by the command [Reset status flag]. In addition, the VSS short detection operating is possible to stop per channel by the control data (MSL1 to MSL12) of VSS short detection circuit mask of the LED driver output. Explanation of the Open Detection Operation of the LED Driver Output The open detection of the LED driver output is effective, when control data (MLD1 to MLD12) for LED driver output mask is “1”, when control data (MOP1 to MOP12) for open detection circuit mask is “1”, when control data (MKOP) for open detection mask of all of LED driver outputs is “1” and when lighting time of the LED is more than 5 [/C0109s]. The open detection operation compares the LED driver output voltage (VLDn) with the open detection voltage (VLOP) by a comparator. If the LED driver output voltage (VLDn) becomes less than the open detection voltage (VLOP), the LED driver output is judged the open abnormality. And open detection result data (ROP1 to ROP12) is set to “1” (abnormality). On the other hand, if the LED driver output voltage (VLDn) becomes more than the open detection voltage (VLOP), the LED driver output is judged the normal. And open detection result data (ROP1 to ROP12) is set to “0” (normal). When open abnormality of one or more LED driver output is detected, status data (OERR) of open abnormality detection is set to “1”. It is judged all with open abnormality if the LED driver output voltage (VLDn) becomes less than the open detection voltage (VLOP) by not only complete open abnormality but also incomplete open abnormality or the voltage reduction of the pull-up power supply for LED. The controller can receive open detection result data (ROP1 to ROP12) by the command [Read open detection result], and can receive status data (OERR) of open abnormality detection by the command [Read status flag 1]. These control data are maintained and are initialized by the command [Reset status flag]. In addition, the open detection operating is possible to stop per channel by the control data (MOP1 to MOP12) of open detection circuit mask of the LED driver output.

different and more than 5 [/C0109s]. the LED driver status of lighting and unlighting is different. abnormality detection by the command [Read status flag 1]. command [Reset status flag]. is not possible to stop per channel. (abnormality under VLED ≤ VSES2). by the command [Reset status flag]. Figure 18. Open/Short Abnormality and VLED Voltage Abnormality Detection Circuit of LED Driver Outputs

Figure 19. Error Detection Operating Sequence of VLED Short, VSS Short and VLED Voltage Abnormality

Figure 20. Error Detection Operating Sequence of Open, Adjacent Outputs Short

by the command [Reset status flag]. the thermal shut down actuating is canceled. Table 12. RELATIONS OF TEMPERATURE STATUS DATA AND THE THERMAL SHUT DOWN (VDET) or software reset) of the system.

Figure 21. Sequence of the Thermal Shut Down Operating

command [Clearing of the fundamental clock abnormality]. Figure 22. Operating Sequence of the Fundamental Clock Detection This is a command except the [Check of the fundamental clock abnormality].

www.onsemi.com About the Reset of the System This LSI supports the system reset by RES pin, voltage detection type reset circuit (VDET) , software reset command and the thermal shut down actuating. When a system reset is applied, the LED driver output (LD1 to LD12) is turned off. (This state is that an electric current does not flow.) This LSI needs to perform the following operation to prevent meaningless lighting, because the control data in the LSI is undefined at the time of the power-on. (Refer to [Figure 24] and [Figure 25]). (1) Reset Function of the System <Reset of the system by RES pin> When the power is first applied with setting RES pin to “L”, the LED driver outputs (LD1 to LD12) is turned off. Then status data of “POR, TSD125, TSD150, SERR, OERR, AERR, CERR and VERR” are set to “1”. And the external resistance diagnosis result data of “IR1, IR0” are set to “1,1”. And the LED driver state data of “RLD1 to RLD12” are set to “0”. Next, the internal oscillation clock is generated by setting RES = “H” and the status data CERR is set to “0”. After transmitting the command [Reset POR flag] and [Reset status flag] from a controller, the status data of “POR, TSD125, TSD150, SERR, OERR, AERR, CERR and VERR” are set to “0”. And the external resistance diagnosis result data of “IR1, IR0” are set to “0,1”. And LED lighting is enabled by transmitting control data for LED display. <Reset of the system by the voltage detection type reset circuit (VDET)> If at least 1 [ms] is assured as the power supply voltage VDD rise time when the power is applied with setting the RES pin to “H”, a system reset will be applied by the VDET output signal when the power supply voltage is brought up. Then, the LED driver outputs (LD1 to LD12) is turned off. Then status data of “POR, TSD125, TSD150, SERR, OERR, AERR, CERR and VERR” are set to “1”. And the external resistance diagnosis result data of “IR1, IR0” are set to “1,1”. And the LED driver state data of “RLD1 to RLD12” are set to “0”. Furthermore the internal oscillation clock is generated, the status data CERR is set to “0”. Next, It maintains the RES = “H”. After transmitting the command [Reset POR flag] and [Reset status flag] from a controller, the status data of “POR, TSD125, TSD150, SERR, OERR, AERR, CERR and VERR” are set to “0”. And the external resistance diagnosis result data of “IR1, IR0” are set to “0,1”. And LED lighting is enabled by transmitting control data for LED display. The voltage detection type reset circuit generates an output signal and resets the system when the power is first applied and when the voltage drops, i.e., when the power supply voltage is less than or equal to the power down detection voltage VDET, which is 2.2 V (typ). To assure that this function operates reliability, a capacitor must be added to the power supply line so that the power supply voltage VDD rise time (t1) when the power is first applied and the power supply voltage VDD fall time (t3) when the voltage drops are both at least 1 [ms]. <Reset of the system by the software reset> The LED driver outputs (LD1 to LD12) are turned off by transmitting the command [Software reset] from a controller. Then, the status data (POR) is set to “1” and the status data (TSD125, TSD150) is set to “0” or “1” depending on the state of IC again. Next, transmit the command [Reset POR flag] from a controller. (Status data POR is set to “0”.) And LED lighting is enabled by transmitting control data for LED display. <Reset of the system by the thermal shut down actuating> When the LSI chip temperature is more than 150 °C, a reset by the thermal shut down actuating is applied and the LED driver outputs(LD1 to LD12) are turned off. When the LSI chip temperature falls to less than 150 °C, the thermal shut down actuating is canceled. Next, transmit the command [Reset POR flag] from a controller. (Status data POR is set to “0”.) And LED lighting is enabled by transmitting control data for LED display. (2) State of Each Block during the Reset Period of the System

REFERENCE CURRENT GENERATOR A reset by the RES pin and the VDET are applied, and the circuit is set to the initial state. However a reset by the software reset and the thermal shut down actuating are not applied.
LED DRIVER A reset by the RES pin, the VDET, the software reset and the thermal shut down actuating are applied, and all LED driver outputs (LD1 to LD12) are set to the state that an electric current does not flow forcibly, and LED is turned off.
OPEN/SHORT DETECTION CIRCUIT A reset by the RES pin, the VDET, the software reset and the thermal shut down actuating are applied, and open/short/adjacent outputs short detection circuit operation of the LED driver output is set to the initial state.
CLOCK GENERATOR A reset by the RES pin and the VDET are applied, and the internal oscillator stops and the accepting of external clock is stopped. However it generates forcibly the internal oscillator clock just after the end of reset period. And a reset by the software reset and the thermal shut down actuating are not applied.
TEMPERA TURE SENSOR A reset by the RES pin and the VDET are applied, and the circuit is set to the initial state. However a reset by the software reset and the thermal shut down actuating are not applied.

CONTROL REGISTER A reset by the RES pin, the VDET, the software reset and the thermal shut down actuating are applied, and the circuit is set to the initial state. When a reset by the software reset and the thermal shut down actuating are applied, the control data (OC, EXF, ERD), the status data (SERR, OERR, AERR, CERR, VERR), various detection result data (IR1,IR0,RSH1 to RSH12, RSL1 to RSL12, ROP1 to ROP12, RAJ1 to RAJ12) and the status data of LED driver outputs (RLD1 to RLD12) are maintained same as previous contents.
SHIFT REGISTER A reset by the RES pin, the VDET, the software reset and the thermal shut down actuating are applied, and the circuit is set to the initial state.
INTERFACE CONTROLLER A reset by the RES pin, the VDET, the software reset and the thermal shut down actuating are applied, the circuit does not accept the input of the serial data. However it can do after the end of reset period.

Figure 23. Block which Applies the Reset of the System

www.onsemi.com (4) State of Each Control Register during the Reset Period Register Name Reset by the RES Pin or the Voltage Detection Type Reset Circuit (VDET) Reset by the Software Reset or the Thermal Shut Down Actuating Output current regulation (CAn7 to CAn0) All “0,0,0,0,0,0,0,0” (The smallest current) PWM Ch (LnC, LnB, LnA) All “0,0,1” (PWM ch1 is selected) PWM steps (WN1,WN0) “0,0” (128 steps) PWM frame frequency (PF3 to PF0) “1,0,0,0” (fosc/1024) PWM data (Wm9 to Wm0) All “0,0,0,0,0,0,0,0,0,0” (The smallest lighting time) LED driver output mask (MLD12 to MLD1) All “0” (LED turning off) VLED short detection circuit mask (MSH12 to MSH1) All “1” (Connected a detection circuit) VSS short detection circuit mask (MSL12 to MSL1) All “1” (Connected a detection circuit) Open detection circuit mask (MOP12 to MOP1) All “1” (Connected a detection circuit) VLED short detection voltage setting (VSH12B, VSH12A to VSH1B, VSH1A) All “0,0” (0.8 V (typ)) PWM duty setting at the time of the 125°C detection with the temperature sensor (PLDT) “0” (When 125°C or above were detected by a temperature sensor, the PWM outputs waveform is adjusted automatically.) Thermal shut down function setting (TSDN) “0” (Thermal shut down is valid) Setting the internal oscillator or external clock operating mode (OC) “0” (Internal oscillator operating mode) A previous state is maintained. External clock operating frequency setting (EXF) “0” (fOSCI1 = 200 kHz) A previous state is maintained. Output current rising time setting (SR) “0” (0.5/C0109s (typ)) Enabled to output each diagnosis result data from ERR pin (ERD) “0” (Disabled to output each diagnosis result data) A previous state is maintained. Setting abnormal value of LED pull-up voltage VLED (VLS1, VLS0) “1,1” (In the case of VLED ≤ 2.4 V typ, it can detect an abnormal value) Setting external resistance value abnormality detection mask of IREF pin (MKIR) “1” (It can operate the external resistance value abnormality detection of IREF pin) Setting VLED short detection mask of all of LED driver outputs from LD1 to LD12 (MKSH) “1” (It can operate the VLED short detection with contents of the control data MSHn) Setting VSS short detection mask of all of LED driver outputs from LD1 to LD12 (MKSL) “1” (It can operate the VSS short detection with contents of the control data MSLn) Setting open detection mask of all of LED driver outputs from LD1 to LD12 (MKOP) “1” (It can operate the open detection with contents of the control data MOPn) Setting adjacent outputs short detection mask of all of LED driver outputs from LD1 to LD12 (MKAJ) “1” (It can operate the adjacent outputs short detection) Status 125°C detection with the temperature sensor (TSD125) “1” (Temperature abnormality) When junction temperature is less than 125°C, it is set to “0”. (Normal) When junction temperature is or above 125°C, it is set to “1”. (Abnormality) 150°C detection with the temperature sensor (TSD150) “1” (Temperature abnormality) When junction temperature is less than 150°C, it is set to “0”. (Normal) When junction temperature is or above 150°C, it is set to “1”. (Abnormality) Short abnormality detection (SERR) “1” (Short abnormality is detected) A previous state is maintained Open abnormality detection (OERR) “1” (Open abnormality is detected) A previous state is maintained Adjacent outputs short abnormality detection (AERR) “1” (Adjacent outputs short abnormality is detected) A previous state is maintained VLED voltage abnormality detection (VERR) “1” (VLED voltage abnormality is detected) A previous state is maintained Fundamental clock abnormality detection (CERR) “1” (Fundamental clock abnormality is detected) A previous state is maintained Reset action (POR) “1” (Reset is executed) Output current regulation lock (C_LOCK) “0” (Output current regulation register unlock) LED driver output mask/open/short lock (M_LOCK) “0” (LED driver output mask/open/short register unlock) PWM ch & PWM steps & PWM frame frequency lock (P_LOCK) “0” (PWM ch & PWM steps & PWM frame frequency register unlock) PWM data lock (W_LOCK) “0” (PWM data register unlock) Control data 1 & control data 2 lock (R_LOCK) “0” (Control data 1 & control data 2 register unlock) External resistance value diagnosis (IR1, IR0) “1,1” (62 k/C0087 or above is detected) A previous state is maintained Result data of VLED short detection (RSH12 to RSH1) “1” (VLED Short abnormality is detected) A previous state is maintained Result data of VSS short detection (RSL12 to RSL1) “1” (VSS Short abnormality is detected) A previous state is maintained Result data of open detection (ROP12 to ROP1) “1” (Open abnormality is detected) A previous state is maintained Result data of adjacent outputs short detection (RAJ12 to RAJ1) “1” (Adjacent outputs short abnormality is detected) A previous state is maintained State data of the LED driver output (RLD12 to RLD1) “0” (OFF) A previous state is maintained 42.(n = 1 to 12, m = 1 to 6)

www.onsemi.com Start-up Sequence (Recommended Examples) After “VDD” power activation, the internal register is reset by performing a reset action sequence ([Figure 24] or [Figure 25]), and all of LED driver outputs is turned off. After that an LED is turned on by the following sequences. <1> Transmit the command [Read status flag 1] and confirm that it is POR = “1”. (In the case of POR = “0”, the reset action of the system is abnormality. Confirm whether a reset action sequence does not have an error.) <2> Transmit the command [Reset POR flag], and clear status data (POR). <3> Transmit the command [Reset status flag], and clear status data (TSD125, TSD150, SERR, OERR, AERR, VERR) and read data (IR0, IR1, RSH1 to RSH12, RSL1 to RSL12, ROP1 to ROP12, RAJ1 to RAJ12, RLD1 to RLD12). <4> Transmit the command [Write control data 1], and set the following various control data. (When the change from a default is necessary) PLDT: Control data for PWM duty setting at the time of the 125°C detection with the temperature sensor. TSDN: Control data for thermal shut down function setting. OC: Control data for switching the internal oscillator operating mode and external clock operating mode. EXF: Control data for setting the external clock operating frequency. SR: Control data for setting the output current rising time of LED driver. ERD: Control data for outputting each diagnosis result data from ERR pin. <5> Transmit the command [Read control data 1], and confirm the contents of the above control data 1 register. <6> Transmit the command [Write control data 2], and set the following various control data. (When the change from a default is necessary) VLS0,1: Control data for setting abnormal value of LED pull-up voltage VLED. MKIR: Control data for setting external resistance value abnormality detection mask of IREF pin. MKSH: Control data for setting VLED short detection mask of all of LED driver outputs from LD1 to LD12. MKSL: Control data for setting VSS short detection mask of all of LED driver outputs from LD1 to LD12. MKOP: Control data for setting open detection mask of all of LED driver outputs from LD1 to LD12. MKAJ: Control data for setting adjacent outputs short detection mask of all of LED driver outputs from LD1 to LD12. <7> Transmit the command [Read control data 2], and confirm the contents of the above control data 2 register. <8> Transmit the command [Lock of control data 1 & control data 2], and lock the control data 1 register (PLDT, TSDN, OC, EXF, SR, ERD) and the control data 2 register (VLS0, VLS1, MKIR, MKSH, MKSL, MKOP, MKAJ). <9> Transmit the command [Check of the fundamental clock abnormality], confirm that the fundamental clock (the internal oscillation clock or the external clock) is normal. <10> Transmit the command [Write output current regulation], and set the output current value (CAn7 to CAn0) of all channel used with application. <11> Transmit the command [Read output current regulation], and confirm the contents of the output current regulation register (CAn7 to CAn0). <12> Transmit the command [Lock of output current regulation], and lock output current regulation register (CAn7 to CAn0). <13> Transmit the command [Write PWM Ch], and set the PWM Ch register (LnC, LnB, LnA) of all channel used with application. <14> Transmit the command [Read PWM Ch], and confirm the contents of the PWM Ch register (LnC, LnB, LnA). <15> Transmit the command [Write PWM steps & PWM frame frequency], and set the PWM steps number (WN1, WN0) and frame frequency (PF3 to PF0). <16> Transmit the command [Read PWM steps & PWM frame frequency], and confirm the contents of PWM steps register (WN1, WN0) & frame frequency register (PF3 to PF0). <17> Transmit the command [Lock of PWM ch & PWM steps & PWM frame frequency], and lock the PWM channel register (LnC, LnB, LnA) and the PWM steps register (WN1, WN0) and the PWM frame frequency register (PF3 to PF0). <18> Transmit the command [Write PWM data], and set the PWM data (Wm9 to Wm0). <19> Transmit the command [Read PWM data], and confirm the contents of PWM data register (Wm9 to Wm0).

www.onsemi.com <20> Transmit the command [Lock of PWM data], and lock the PWM data register (Wm9 to Wm0). <21> Transmit the command [Write LED driver output mask], and set the LED driver output mask register (MLD1 to MLD12). <22> Transmit the command [Read LED driver output mask], and confirm the contents of LED driver output mask register (MLD1 to MLD12). <23> Transmit the command [Write VLED short detection circuit mask], and mask the VLED short detection circuit (MSH1 to MSH12). <24> Transmit the command [Read VLED short detection circuit mask], and confirm the contents of VLED short detection circuit mask register (MSH1 to MSH12). <25> Transmit the command [Write VSS short detection circuit mask], and mask the VSS short detection circuit (MSL1 to MSL12). <26> Transmit the command [Read VSS short detection circuit mask], and confirm the contents of VSS short detection circuit mask register (MSL1 to MSL12). <27> Transmit the command [Write open detection circuit mask], and mask the open detection circuit (MOP1 to MOP12). <28> Transmit the command [Read open detection circuit mask], and confirm the contents of open detection circuit mask register (MOP1 to MOP12). <29> Transmit the command [Write VLED short detection voltage setting], and set the VLED short detection voltage (VSHnB, VSHnA). <30> Transmit the command [Read VLED short detection voltage setting], and confirm the contents of VLED short detection voltage setting register (VSHnB, VSHnA). <31> Transmit the command [Lock of LED driver output mask/open/short], and lock the LED driver output mask register (MLD1 to MLD12) and the VLED short detection circuit mask register (MSH1 to MSH12) and the VSS short detection circuit mask register (MSL1 to MSL12) and the open detection circuit mask register (MOP1 to MOP12) and the VLED short detection voltage setting register (VSHnB, VSHnA). (It starts to turn on an LED.) <32> Wait more than 30 msec. <33> Transmit the command [Read status flag 1], and confirm the contents of status data (TSD125, TSD150, SERR, OERR, AERR, VERR). If the contents of these status data are abnormality, carry out those process from <36> to <40> as needed. <34> Transmit the command [Read status flag 2], and confirm the contents of status data (R_LOCK, W_LOCK, P_LOCK, M_LOCK, C_LOCK). If the contents of these status data are abnormality, confirm the contents of various control data registers with regard to those lock command and set those command again. <35> Transmit the command [Read external resistance diagnosis result], and confirm the contents of external resistance diagnosis result data (IR0, IR1). <36> Transmit the command [Read VLED short detection result], and confirm the contents of VLED short detection result data (RSH1 to RSH12). <37> Transmit the command [Read VSS short detection result], and confirm the contents of VSS short detection result data (RSL1 to RSL12). <38> Transmit the command [Read open detection result], and confirm the contents of open detection result data (ROP1 to ROP12). <39> Transmit the command [Read adjacent outputs short detection result], and confirm the contents of adjacent outputs short detection result data (RAJ1 to RAJ12). <40> Transmit the command [Read the state data of the LED driver output], and confirm the contents of the state data of the LED driver output (RLD1 to RLD12). NOTE: (n = 1 to 12, m = 1 to 6)

www.onsemi.com PWM ch & steps & frame frequency setting LED driver output mask & open & short setting Figure 26. Start-up Sequence Device Package Shipping (Qty / Packing)† LC75760UJA−AH SSOP24 (225mil) (Pb-Free / Halogen Free) 2000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

SSOP24 (225mil) CASE 565AR ISSUE A DATE 23 OCT 2013 XXXXXXXXXX YMDDD XXXXX = Specific Device Code Y = Year M = Month DDD = Additional Traceability Data GENERIC MARKING DIAGRAM* *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ /C0071”, may or may not be present. SOLDERING FOOTPRINT* NOTE: The measurements are not to guarantee but for reference only. (Unit: mm) *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 1.0 5.80 0.32 0.50 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 98AON66069EDOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1SSOP24 (225MIL) © Semiconductor Components Industries, LLC, 2019 www.onsemi.com

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Product Information

LC75760UJA specifications and overview.

Summary

LED Driver, 12?릀hannel, Constant Current July, 2018 ??Rev. 0

Description

LED Driver, 12?릀hannel, Constant Current July, 2018 ??Rev. 0

Source title LC75760UJA Datasheet(PDF) - ON Semiconductor

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