LC717A10AR_17 ONSEMI | Alldatasheet
Document overview
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Technical content
Features
- Detection System: Differential Capacitance Detection (Mutual Capacitance Type)
- Input Capacitance Resolution: Can Detect Capacitance Changes in the Femto Farad Order
- Measurement Interval (16 Differential Inputs): ♦ 30 ms (Typ) (at Initial Configuration) ♦ 6 ms (Typ) (at Minimum Interval Configuration)
- External Components for Measurement: Not Required
- Current Consumption: ♦ 570 /C0109A (Typ) (VDD = 2.8 V) ♦ 1.3 mA (Typ) (VDD = 5.5 V)
- Supply V oltage: 2.6 V to 5.5 V
- Detection Operations: Switch
- Interface: I2C Compatible Bus or SPI Selectable www.onsemi.com MARKING DIAGRAM See detailed ordering and shipping information on page 11 of this data sheet.
ORDERING INFORMATION
XXXXX = Specific Device Code Y = Year M = Month DDD = Additional Traceability Data XXXXXXXX YMDDD
Table 1. ABSOLUTE MAXIMUM RATINGS (TA = 25°C, VSS = 0 V) should not be assumed, damage may occur and reliability may be affected.
- Apply to Cin0 to 15, Cref, CrefAdd, nRST, SCL, SDA, SA0, SA1, SCK, SI, nCS.
- Apply to Cdrv, SDA, SO, INTOUT.
- 4-layer glass epoxy board (40 × 50 × 0.8t mm).
Table 2. RECOMMENDED OPERATING CONDITIONS the Recommended Operating Ranges limits may affect device reliability.
- Inserting a high-valued capacitor and a low-valued capacitor in parallel between V
capacitor should be at least 0.1 /C0109F, and is mounted near the LSI. Table 3. ELECTRICAL CHARACTERISTICS (VSS = 0 V, VDD = 2.6 to 5.5 V, TA = −40 to +105°C, Unless otherwise specified, the Cdrv drive frequency is fCDRV = 143 kHz.
Table 3. ELECTRICAL CHARACTERISTICS (continued) (VSS = 0 V, VDD = 2.6 to 5.5 V, TA = −40 to +105°C, Unless otherwise specified, the Cdrv drive frequency is fCDRV = 143 kHz.
0.8 VDD − − V (Note 9)
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
- Design-guaranteed values (not tested before shipment).
- Measurements conducted using the test mode in the LSI.
- Apply to nRST, SCL, SDA, SA0, SA1, SCK, SI, nCS.
- Apply to Cdrv, SO, INTOUT.
10.Apply to nRST, SCL, SDA, SA0, SA1, SCK, SI, nCS.
Table 4. I2C COMPATIBLE BUS TIMING CHARACTERISTICS performance may not be indicated by the Electrical Characteristics if operated under different conditions.
- Design-guaranteed values (not tested before shipment).
Table 5. SPI BUS TIMING CHARACTERISTICS performance may not be indicated by the Electrical Characteristics if operated under different conditions. 12.Design-guaranteed values (not tested before shipment).
Figure 8. Simplified Block Diagram devices and a control logic that controls the entire chip.
Figure 9. Pin Assignment (Bottom View)
26 SA0/SOCin7 10
25 SDA/SICin8 11
24 SCL/SCKCin9 12
23 SA1Cin10 13
22 INTOUTCin11 14
15 Cin12Cin4 7
16 Cin13VSS 6
17 Cin14VDD 5
18 Cin15Cin3 4
19 CrefCin2 3
20 CrefAddCin1 2
21 CdrvCin0 1
Table 7. PIN ASSIGNMENT
1 Cin0 15 Cin12
2 Cin1 16 Cin13
3 Cin2 17 Cin14
4 Cin3 18 Cin15
5 VDD 19 Cref
6 VSS 20 CrefAdd
7 Cin4 21 Cdrv
8 Cin5 22 INTOUT
9 Cin6 23 SA1
10 Cin7 24 SCL/SCK
11 Cin8 25 SDA/SI
12 Cin9 26 SA0/SO
13 Cin10 27 nCS
14 Cin11 28 nRST
Table 8. PIN FUNCTION
Table 8. PIN FUNCTION (continued) capacitor should be at least 0.1 /C0109F, and is mounted near the LSI. 14.When VSS terminal is not grounded in battery-powered mobile equipment, detection sensitivity may be degraded. doing so, Cdrv and Cin patterns are capacitively coupled. pattern as 8-bit digital data. to detect the capacitance change correctly. being measured are all in “Low” condition. Leave the unused terminals open. detect capacitance change in each Cin pin correctly. CrefAdd can be used as additional terminal for Cref. Leave the CrefAdd open if not in used. so that they are capacitively coupled. Leave the terminal open if not in used. Interface selection/Chip-select-inverting input (SPI). until LSI is again initialized.
nRST pin is “Low”, LSI is in the reset state. input pin of the SPI depending on the mode of operation. selection pin of the I2C compatible bus. When SPI mode, connect to the SA1 pin to GND. Table 9. ORDERING INFORMATION Specifications Brochure, BRD8011/D.
www.onsemi.com PACKAGE DIMENSIONS VCT28 3.5x3.5 CASE 601AE ISSUE A 3.5±0.08 3.5±0.08 TOP VIEW SIDE VIEW 0.8±0.05 0.15 LASER MARKED INDEX 0.05 S S (0.035) SIDE VIEW BOTTOM VIEW 0.4±0.05 0.19±0.05 (0.125) (0.09) 0.05 (C0.09) 0.4 (0.55) (Unit: mm) 3.20 3.20 0.19 0.40 0.70 SOLDERING FOOTPRINT* NOTE: The measurements are not to guarantee but for reference only. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 0.20
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