LC5500

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SANKEN ELECTRIC CO., LTD. Introduction The LC5500 series is the power IC for the isolated type LED driver which has an incorporated power MOSFET, designed for input capacitorless applications, and making it possible for systems to comply with the harmonics standard (IEC61000-3-2 class C). The controller adapts the average current control method for realizing high power factors, and the quasi-resonant topology contributes to high efficiency and low EMI noise. The series is housed in either DIP8 or TO-220F-7L packages, depending on output power capability. The rich set of protection features helps to real- ize low component counts, and high performance-to-cost power supply. Features and Benefits

• DIP8 package (LC551xD/LC552xD) and TO-220F-7L package (LC552xF)
• Integrated on-width control circuit (it realizes high power factor by average current control)
• Integrated startup circuit (no external startup circuit necessary)
• Integrated soft-start circuit (reduces power stress during start-up on the incorporated power MOSFET and output rectifier)
• Integrated bias assist circuit (improves the startup performance, suppresses V CC voltage droop during operation, allows reduction of VCC capacitor value as well as use of a ceramic capacitor)
• Integrated Leading Edge Blanking (LEB) circuit
• Integrated maximum on-width limit circuit LC5500 Series Single-Stage Power Factor Corrected Off-Line Switching Regulators

Figure 1. The LC5500 series packages for lower wattage versions

Application Information

LC5500-AN, Rev.1.2 TO-220F-7L (LF 3052) TO-220F-7L (LF 3054) TO-220F-7L (LF 3051)DIP8

• Dual-chip structure, with an avalanche-guaranteed power MOSFET (allows simplified surge suppressing circuits)
• Protection features: ▫ Overcurrent protection (OCP): pulse-by-pulse ▫ Overvoltage protection (OVP): auto restart, OVP- activating pins vary by product series: OVP-Activating Pins Series VCC ISENSE OVP OCP LC551xD × × – × LC552xD × – × × LC552xF × – × × ▫ Overload protection (OLP): auto restart ▫ Thermal shutdown (TSD): halts switching operation and latches in the off-state The product lineup for the LC5500 series provides the following options: Part Number MOSFET VDSS(min) (V) RDS(on) (max) (Ω) Isolation Package POUT* (W)

230 VAC Universal

(Wide) LC5511D 650

3.95 Non-

LC5513D 1.9 20 16 LC5521D 3.95 Isolated 13 10 LC5523D 1.9 20 16 LC5523F TO-220F- 60 40 LC5525F 1.1 80 55 *Based on the thermal rating; the allowable maximum output power can be up to 120% to 140% of this value. However, maximum output power may be limited in an applications with low output voltage or short duty cycle. Part Number Assignment LC55nna AB C D A Product series name B Indicates non-isolated or isolated: 1 – Non-isolated, 2 – Isolated C On-resistance of the incorporated MOSFET: 1 – 3.95 Ω, 3 – 1.9 Ω, 5 – 1.1 Ω D Indicates the package: D – DIP8, F – TO-220F-7L

SANKEN ELECTRIC CO., LTD. LC5500-AN, Rev.1.2 Table of Contents General Specifications 1 Block Diagrams and Pin Descriptions 3 Package Drawings 5 Electrical Characteristics 9 Application Circuit Examples 15 Operation Description 17 On-Width Control Operation 17 Startup Operation 19 Operation Modes at Startup 21 Soft-Start Function 21 Quasi-Resonant Operation and Bottom-On Timing 22 Latch Function 25 Overvoltage Protection (OVP) 26 Overload Protection (OLP) 30 Overcurrent Protection (OCP) 32 Input Compensation Function for Overcurrent Protection 33 OCP Threshold Voltage with and without the OCP Input Compensation Circuit 33 Thermal Shutdown Protection 35 Maximum On-Width Limiting Function 35 Design Considerations 35 Peripheral Components 35 Transformer Design 35 Trace and Component Layout Design 37

Figure 2. LC551xD series functional block diagram (for non-isolated DIP8 designs)

1 S/GND MOSFET source and GND terminal for the Controller chip

2 VCC Supply voltage input and Overvoltage protection (OVP) signal input

3 OCP Overcurrent Protection, quasi-resonant signal input terminal, and

4 COMP Feedback phase-compensation input

6 ISENSE Output current sensing voltage input and Overvoltage Protection

8 D/ST MOSFET drain terminal and input of the startup current

• LC551xD for non-isolated DIP8 designs
• LC552xD for isolated DIP8 designs
• LC552xF for isolated TO-220-7L designs D/ST ISENSE NF S/GND VCC OCP COMP Pin-out Diagram (LC551xD)

Figure 3. LC552xD series functional block diagram (for isolated DIP8 designs)

4 FB Feedback signal input and Overload Protection (OLP) signal input

6 OVP Overvoltage Protection (OVP) signal input

Figure 4. LC552xF series functional block diagram (for isolated TO-220F-7L designs)

1 D/ST MOSFET drain terminal and input of the startup current

2 S/GND MOSFET source and GND terminal for the Controller chip

3 NC No connection

4 VCC Supply voltage input and Overvoltage protection (OVP) signal input

5 OCP Overcurrent Protection, quasi-resonant signal input terminal, and

6 FB Feedback signal input and Overload Protection (OLP) signal input

7 OVP Overvoltage Protection (OVP) signal input

Figure 5. DIP8 package drawing

0.89 TYP

2.54 TYP

Figure 6. TO-220F-7L (Sanken leadform number 3051) package drawing compliant with the RoHS directive.

Figure 7. TO-220F-7L (Sanken leadform number 3052) package drawing compliant with the RoHS directive.

Figure 8. TO-220F-7L (Sanken leadform number 3054) package drawing compliant with the RoHS directive.

SANKEN ELECTRIC CO., LTD. LC5500-AN, Rev.1.2

Electrical Characteristics

This section provides separate sets of electrical characteristic data, using representative examples (refer to individual data- sheets for more details):

• LC551xD series (non-isolated): LC5513D is the example
• LC552xD series (isolated): LC5521D is the example
• LC552xF series (isolated): LC5523F is the example Current direction is sink is positive (+) and source is nega- tive (–) in reference to the IC. Characteristic Symbol Notes Pins Rating Unit Drain Current1 IDPeak Single pulse 8 – 1 4.0 A Single Pulse Avalanche Energy1 EAS ILPeak = 2.7 A, VDD = 99 V, L = 20 mH 8 – 1 86 mJ Supply Voltage for Controller Chip V CC 2 – 1 35 V OCP Pin Voltage V OCP 3 – 1 −2.0 to 5.0 V COMP Pin Voltage V COMP 4 – 1 −0.3 to 7.0 V ISENSE Pin Voltage V ISEN 6 – 1 −0.3 to 5.0 V Allowable Power Dissipation of MOSFET2 PD1 8 – 1 0.97 W Operating Ambient Temperature T OP ―− 55 to 125 °C Storage Temperature T stg ―− 55 to 125 °C Channel Temperature T ch ― 150 °C 1Refer to each individual product datasheet for details. 2Mounted on a 15 mm × 15 mm PCB. LC5513D ELECTRICAL CHARACTERISTICS (MOSFET) TA = 25°C, unless otherwise specified Characteristic Symbol Test Conditions Pins Min. Typ. Max. Unit Drain-to-Source Breakdown Voltage1 VDSS 8 – 1 650 ―― V Drain Leakage Current I DSS 8 – 1 ―― 300 μA On Resistance1 RDS(on) 8 – 1 ―― 1.9 Ω Switching Time1 tf 8 – 1 ―― 400 ns Thermal Resistance1,2 Rθch-c Between channel and case ――― 35.5 °C/W 1Refer to each individual product datasheet for details. 2The thermal resistance between the channels of the MOSFET and the case. TC measured at the center of the case top surface.

SANKEN ELECTRIC CO., LTD. LC5500-AN, Rev.1.2 LC5513D ELECTRICAL CHARACTERISTICS (Controller Chip) TA = 25°C, VCC = 20 V, unless otherwise specified Characteristic Symbol Test Conditions Pins Min. Typ. Max. Unit Startup Operation Operation Start Voltage V CC(ON) 2 – 1 13.8 15.1 17.3 V Operation Stop Voltage* V CC(OFF) 2 – 1 8.4 9.4 10.7 V Operating Current I CC(ON) 2 – 1 – – 3.7 mA Startup Circuit Operation Voltage V STARTUP 8 – 1 42 57 72 V Startup Current I CC(STARTUP) VCC = 13 V 2 – 1 −5.5 −3.0 −1.0 mA Startup Current Threshold Biasing Voltage-1* VCC(BIAS)1 2 – 1 9.5 11.0 12.5 V Startup Current Threshold Biasing Voltage-2 VCC(BIAS)2 2 – 1 14.4 16.6 18.8 V Normal Operation PWM Operation Frequency f OSC 8 – 1 11.0 14.0 18.0 kHz Maximum On-Width t ON(MAX) 8 – 1 30.0 40.0 50.0 μs COMP Pin Control Voltage Lower Limit VCOMP(MIN) 4 – 1 0.55 0.90 1.25 V Error Amplifier Reference Voltage V SEN(th) 6 – 1 0.27 0.30 0.33 V Error Amplifier Source Current I SEN(SOURCE) 4 – 1 −11 −7 −3 μA Error Amplifier Sink Current I SEN(SINK) 4 – 1 3 7 11 μA Leading Edge Blanking Time t ON(LEB) 3 – 1 − 500 − ns Quasi-Resonant Operation Threshold Voltage-1 VBD(TH1) 3 – 1 0.14 0.24 0.34 V Quasi-Resonant Operation Threshold Voltage-2 VBD(TH2) 3 – 1 0.12 0.17 0.22 V Protection Operation OCP Pin Overcurrent Protection (OCP) Threshold Voltage VOCP 3 – 1 −0.54 −0.60 −0.66 V OCP Pin Source Current I OCP 3 – 1 −120 −40 −10 μA OCP Pin Overvoltage Protection (OVP) Threshold Voltage VBD(OVP) 3 – 1 2.2 2.6 3.0 V Overload Protection (OLP) Threshold Voltage-1 VCOMP(OLP)1 4 – 1 5.0 5.5 6.0 V Overload Protection (OLP) Threshold Voltage-2 VCOMP(OLP)2 4 – 1 4.1 4.5 4.9 V ISENSE Pin OVP Threshold Voltage V ISEN(OVP) 6 – 1 1.6 2.0 2.4 V VCC Pin OVP Threshold Voltage V CC(OVP) 2 – 1 28.5 31.5 34.0 V Thermal Shutdown Activating Temperature TJ(TSD) – 135 – – °C *VCC(BIAS)1 > VCC(OFF) always.

SANKEN ELECTRIC CO., LTD. LC5500-AN, Rev.1.2 Characteristic Symbol Notes Pins Rating Unit Drain Current1 IDPeak Single pulse 8 – 1 2.5 A Single Pulse Avalanche Energy1 EAS ILPeak = 2.0 A, VDD = 99 V, L = 20 mH 8 – 1 47 mJ Supply Voltage for Controller Chip V CC 2 – 1 35 V OCP Pin Voltage V OCP 3 – 1 −2.0 to 5.0 V FB Pin Voltage V FB 4 – 1 −0.3 to 7.0 V OVP Pin Voltage V OVP 6 – 1 −0.3 to 5.0 V Allowable Power Dissipation of MOSFET2 PD1 8 – 1 0.97 W Operating Ambient Temperature T OP ―− 55 to 125 °C Storage Temperature T stg ―− 55 to 125 °C Channel Temperature T ch ― 150 °C 1Refer to each individual product datasheet for details. 2Mounted on a 15 mm × 15 mm PCB. LC5521D ELECTRICAL CHARACTERISTICS (MOSFET) TA = 25°C, unless otherwise specified Characteristic Symbol Test Conditions Pins Min. Typ. Max. Unit Drain-to-Source Breakdown Voltage1 VDSS 8 – 1 650 ―― V Drain Leakage Current I DSS 8 – 1 ―― 300 μA On Resistance1 RDS(on) 8 – 1 ―― 3.95 Ω Switching Time1 tf 8 – 1 ―― 250 ns Thermal Resistance1,2 Rθch-c Between channel and case ――― 42 °C/W 1Refer to each individual product datasheet for details. 2The thermal resistance between the channels of the MOSFET and the case. TC measured at the center of the case top surface.

SANKEN ELECTRIC CO., LTD. LC5500-AN, Rev.1.2 LC5521D ELECTRICAL CHARACTERISTICS (Controller Chip) TA = 25°C, VCC = 20 V, unless otherwise specified Characteristic Symbol Test Conditions Pins Min. Typ. Max. Unit Startup Operation Operation Start Voltage V CC(ON) 2 – 1 13.8 15.1 17.3 V Operation Stop Voltage* VCC(OFF) 2 – 1 8.4 9.4 10.7 V Operating Current I CC(ON) 2 – 1 – – 3.7 mA Startup Circuit Operation Voltage V STARTUP 8 – 1 42 57 72 V Startup Current I CC(STARTUP) VCC= 13 V 2 – 1 −5.5 −3.0 −1.0 mA Startup Current Threshold Biasing Voltage-1* VCC(BIAS)1 2 – 1 9.5 11.0 12.5 V Startup Current Threshold Biasing Voltage-2 VCC(BIAS)2 2 – 1 14.4 16.6 18.8 V Normal Operation PWM Operation Frequency f OSC 8 – 1 11.0 14.0 18.0 kHz Maximum On-Width t ON(MAX) 8 – 1 30.0 40.0 50.0 μs FB Pin Voltage Minimum Limit V FB(MIN) 4 – 1 0.55 0.90 1.25 V Maximum Feedback Current I FB(MAX) 4 – 1 −10 −25 −40 μA Leading Edge Blanking Time t ON(LEB) 3 – 1 − 500 − ns Quasi-Resonant Operation Threshold Voltage-1 VBD(TH1) 3 – 1 0.14 0.24 0.34 V Quasi-Resonant Operation Threshold Voltage-2 VBD(TH2) 3 – 1 0.12 0.17 0.22 V Protection Operation OCP Pin Overcurrent Protection (OCP) Threshold Voltage VOCP 3 – 1 −0.54 −0.60 −0.66 V OCP Pin Source Current I OCP 3 – 1 −120 −40 −10 μA OCP Pin Overvoltage Protection (OVP) Threshold Voltage VBD(OVP) 3 – 1 2.2 2.6 3.0 V Overload Protection (OLP) Threshold Voltage-1 VFB(OLP)1 4 – 1 5.0 5.5 6.0 V Overload Protection (OLP) Threshold Voltage-2 VFB(OLP)2 4 – 1 4.1 4.5 4.9 V OVP Pin OVP Threshold Voltage V OVP(OVP) 6 – 1 1.6 2.0 2.4 V VCC Pin OVP Threshold Voltage V CC(OVP) 2 – 1 28.5 31.5 34.0 V Thermal Shutdown Activating Temperature TJ(TSD) – 135 – – °C *VCC(BIAS)1 > VCC(OFF) always.

SANKEN ELECTRIC CO., LTD. LC5500-AN, Rev.1.2 LC5523F ELECTRICAL CHARACTERISTICS (MOSFET) TA = 25°C, unless otherwise specified Characteristic Symbol Test Conditions Pins Min. Typ. Max. Unit Drain-to-Source Breakdown Voltage1 VDSS 1 – 2 650 ―― V Drain Leakage Current I DSS 1 – 2 ―― 300 μA On Resistance1 RDS(on) 1 – 2 ―― 1.9 Ω Switching Time1 tf 1 – 2 ―― 400 ns Thermal Resistance1,2 Rθch-F Between channel and internal frame ――― 3.1 °C/W 1Refer to each individual product datasheet for details. 2The thermal resistance between the channels of the MOSFET and the case. TC measured at the center of the case top surface. Characteristic Symbol Notes Pins Rating Unit Drain Current* I DPeak Single pulse 1 – 2 9.2 A Single Pulse Avalanche Energy* E AS ILPeak = 2.9 A, VDD = 99 V, L = 20 mH 1 – 2 99 mJ Supply Voltage for Controller Chip V CC 4 – 2 35 V OCP Pin Voltage V OCP 5 – 2 −2.0 to 5.0 V FB Pin Voltage V FB 6 – 2 −0.3 to 7.0 V OVP Pin Voltage V OVP 7 – 2 −0.3 to 5.0 V Allowable Power Dissipation of MOSFET* PD1 With infinite heatsink 1 – 2 20.2 W Without heatsink 1 – 2 1.8 W Internal Frame Temperature in Operation TF ―− 20 to 115 °C Operating Ambient Temperature T OP ―− 55 to 115 °C Storage Temperature T stg ―− 55 to 125 °C Channel Temperature T ch ― 150 °C *Refer to each individual product datasheet for details.

SANKEN ELECTRIC CO., LTD. LC5500-AN, Rev.1.2 LC5523F ELECTRICAL CHARACTERISTICS (Controller Chip) TA = 25°C, VCC = 20 V, unless otherwise specified Characteristic Symbol Test Conditions Pins Min. Typ. Max. Unit Startup Operation Operation Start Voltage V CC(ON) 4 – 2 13.8 15.1 17.3 V Operation Stop Voltage* V CC(OFF) 4 – 2 8.4 9.4 10.7 V Operating Current I CC(ON) 4 – 2 – – 3.7 mA Startup Circuit Operation Voltage V STARTUP 1 – 2 42 57 72 V Startup Current I CC(STARTUP) VCC = 13 V 4 – 2 −5.5 −3.0 −1.0 mA Startup Current Threshold Biasing Voltage-1* VCC(BIAS)1 4 – 2 9.5 11.0 12.5 V Startup Current Threshold Biasing Voltage-2 VCC(BIAS)2 4 – 2 14.4 16.6 18.8 V Normal Operation PWM Operation Frequency f OSC 1 – 2 11.0 14.0 18.0 kHz Maximum On-Width t ON(MAX) 1 – 2 30.0 40.0 50.0 μs FB Pin Voltage Minimum Limit V FB(MIN) 6 – 2 0.55 0.90 1.25 V Maximum Feedback Current I FB(MAX) 6 – 2 −10 −25 −40 μA Leading Edge Blanking Time t ON(LEB) 5 – 2 – 500 – ns Quasi-Resonant Operation Threshold Voltage-1 VBD(TH1) 5 – 2 0.14 0.24 0.34 V Quasi-Resonant Operation Threshold Voltage-2 VBD(TH2) 5 – 2 0.12 0.17 0.22 V Protection Operation OCP Pin Overcurrent Protection (OCP) Threshold Voltage VOCP 5 – 2 −0.54 −0.60 −0.66 V OCP Pin Source Current I OCP 5 – 2 −120 −40 −10 μA OCP Pin Overvoltage Protection (OVP) Threshold Voltage VBD(OVP) 5 – 2 2.2 2.6 3.0 V Overload Protection (OLP) Threshold Voltage-1 VFB(OLP)1 6 – 2 5.0 5.5 6.0 V Overload Protection (OLP) Threshold Voltage-2 VFB(OLP)2 6 – 2 4.1 4.5 4.9 V OVP Pin OVP Threshold Voltage V OVP(OVP) 7 – 2 1.6 2.0 2.4 V VCC Pin OVP Threshold Voltage V CC(OVP) 4 – 2 28.5 31.5 34.0 V Thermal Shutdown Activating Temperature TJ(TSD) – 135 – – °C *VCC(BIAS)1 > VCC(OFF) always.

Figure 11. Isolated application circuit example, with LC552xF series device

Figure 17. Averaged input current waveform, LC552xD and LC552xF series Figure 18. VCC pin peripheral circuit Figure 19. VCC versus operation current, ICC eliminate its own power consumption. VCC(INIT) is the VCC pin initial voltage (V). 0.22 to 22 μF is generally recommended.

15.1 V , the Controller circuit operation begins and the operating

figure 18) voltage, rectified by diode D5, powers the VCC pin.

pin, in reference to the S/GND pin.

• While the COMP pin voltage (for LC551xD) and FB pin volt- age (for LC552xD and LC552xF), in reference to S/GND, are 0 to 0.9 V (the control voltage lower limit for the COMP pin, V COMP(MIN), and FB pin, VFB(MIN) ): During this period, on-width is fixed at the Leading Edge Blanking Time, tBW = 500 ns.
• Until the quasi-resonant signal (OCP pin voltage) reaches the Quasi-Resonant Operation Threshold V oltage-1, VBD(TH1) =

0.24 V: During this period, the output voltage is low; therefore,

switched to quasi-resonant operation (figure 26). MOSFET and secondary rectifier during the startup phase. period, the output power gradually increases.

• VCC pin voltage does not drop to the Operation Stop V oltage, V CC(OFF)
• Output current reaches the target value before the overload pro- tection (OLP) is activated by the COMP pin voltage reaching VCOMP(OLP)2 = 4.5 V VCC Pin Voltage COMP Pin Voltage Output (LED) Current, IOUT Drain Current, ID S/GND IC turn on S/GND GND(IOUT) Duration PWM (QR) VCOMP(MIN) = 0.90 V VCC(BIAS 1) = 11.0 V Soft-Start Period Target Current GND(ID ) Constant current operation tON= tBW(500 ns) VCC Pin Voltage FB Pin Voltage Output (LED) Current, IOUT Drain Current, ID S/GND IC turn on S/GND GND(IOUT) Duration PWM (QR) VFB (MIN) = 0.90 V VCC(BIAS 1) = 11.0 V Soft-Start Period Target Current GND(ID ) Constant current operation tON= tBW(500 ns)

Figure 24. Soft-start operation waveforms at startup (LC551xD) Figure 25. Soft-start operation waveforms at startup (LC552xD/ LC 552xF) Figure 26. OCP Pin Voltage (with time scale expanded)

• If the turn-on point is earlier than the bottom of the VDS signal, it causes higher switching losses. In that situation, delay the turn-on point by increasing the C7 value.
• In the converse situation, if the turn-on point is later than the V DS bottom point, it also causes higher switching losses, but in that case, advance the turn-on point by decreasing the C7 value. Latch Function Thermal shutdown (TSD) protection is latched. When the latch circuit is activated, the IC stops switching operation, and there- fore the VCC voltage declines. However, the startup circuit turns on again when V CC reaches VCC(BIAS)1 = 11.0 V , in order to avoid reaching the operation stop-

Figure 33. Effects of failure to turn on precisely at the VDS bottom point: (left) turn-on too early, (right) turn-on too late

• VCC Pin Overvoltage Protection. figure 34 shows the wave- forms of the OVP function on the VCC pin. When the VCC pin voltage with reference to the S/GND pin reaches and exceeds V CC(OVP) = 31.5 V , OVP is activated and the IC stops switching operation. During this function, the bias assist function is dis- abled, and the VCC voltage decreases to VCC(OFF) = 9.4 V . After that, the startup circuit is activated, and the operation begins intermittent operation by repeating the restart and operation pro- cess as long as the OVP condition remains. In addition, because VCC voltage is proportional to the output voltage, it can be used to detect an output overvoltage event, such as open load condition. In this situation, the detecting voltage is expressed by the formula below: =VOUT(OVP) 31.5 (V)VCC(normal operation) VOUT(normal operation) (4)

Figure 34. Waveforms when VCC pin OVP is being activated (LC551xD)

• VCC Pin Overvoltage Protection. figure 37 shows the wave- forms of the OVP function. When the VCC pin voltage with ref- erence to the S/GND pin reaches and exceeds V CC(OVP) = 31.5 V or more, OVP is activated and the IC stops switching operation. During this function, the the bias assist function is disabled, and the VCC voltage decreases to VCC(OFF) = 9.4 V . After that, the startup circuit is activated, and the operation begins intermittent operation by repeating the restart and operation process as long as the OVP condition remains. In addition, because VCC voltage is proportional to the output voltage, it can be used to detect output overvoltage events, such as open load condition. In this situation, the detecting voltage is expressed by equation 4.

Figure 37. Waveforms when VCC pin OVP is being activated (LC552xD and LC552xF)

1. The overcurrent detecting peak drain current, IDP(OCP) ,
2. On the other hand, the overcurrent detecting peak drain

limited by OCP at the minimum AC input voltage.

1. From equations 8 and 9, the compensation current, I, of the
2. The forward voltage, Efw1 , at C2 peak voltage EIN(PK)(max) is
3. Next, RX1 is expressed by the following, in order to let the

• AC input compensation circuit design example with universal input Here is an example of design specification and calculation: Given: AC input voltage: 85 to 265 V AC Output power: 40 W Transformer primary winding: 40 T Transformer auxiliary winding: 6 T R OCP = 0.2 Ω R 3 = 220 Ω D X1 forward voltage: 0.8 V Tentatively, OCP input compensation start voltage is set to the voltage of 100 to 130 V AC. At this time, OCP input compensation starting voltage is set to 120 V AC.

Figure 50. Compensated drain current waveforms

1. Calculate Efw1 at 120 V AC input:

Thus, select 27 V as the Zener value for DZX1.

1. The compensation current, I, is calculated using equation 10:
2. RX1 can be calculated using equation 14:

Thus, select RX1 = 27 kΩ out of the E12 series. fi gure 46, by the actual operation, and adjust them if necessary. then the IC stops switching operation in latch mode. sient periods such as at switching AC mains on or off. Take care to use properly rated and proper type of components.

• Output smoothing capacitor. Consider design margins for rat- ings of ripple current, voltage, and temperature in selecting the output capacitor. A low impedance capacitor, designed to be tolerant against high ripple current, is recommended.
• Transformer. Consider design margins for temperature rise, resulting from copper losses and core losses, in designing or selecting a transformer. Switching current contains a high frequency component that causes the skin effect; therefore, consider a current density of 3 to 4 A/mm 2 and select a wire gauge based on RMS current. In the event further temperature measurement is necessary and it is necessary to increase surface area of the wire, try the fol- lowing measures: ▫ Increase the quantity of parallel wires ▫ Use litz wire ▫ Increase the diameter of the wires
• Current detection resistor, R OCP . Choose a low equivalent series inductance and high surge tolerant type for the current detection resistor. If a high inductance type is used, it may cause malfunctioning because of the high frequency current running through it. Transformer Design The transformer design is the same as for an RCC (ringing choke converter, or self-oscillation flyback converter) transformer design. However, a quasi-resonant operation includes a certain delay to turn-on, so duty cycle must be compensated. ID VDS time time Maximum On-Time

Figure 51. Maximum on-width

Figure 52. Example of NI-Limit versus AL-Value characteristics

• Traces among the S/GND pin, C4(–), T1(auxiliary winding D), R1, D5, C4(+), and VCC pin: This trace is for supplying voltage to IC. Widen and shorten the traces as much as possible. If the IC and the electrolytic capacitor C4 are apart, place a film or ceramic capacitor (0.1 to 1.0 μF) as close to VCC pin and the S/GND pin as pos- sible.
• Current Detection Resistor R OCP: Place R OCP as close to the S/GND pin as possible. In addition, in order to avoid interference of the switching current with the control circuit, connect the ground of the control circuit to the S/GND pin as close as possible. Connect R3 as close to R OCP as possible (at the point A of figures 54, 55, and 56) with dedicated traces.
• Secondary side, traces among T1(secondary winding S), D8, and C10: The secondary-side switching current runs through this trace. Widen and shorten the traces as much as possible. Thin and long traces cause the series inductance to be high and it results in high surge voltage on the power MOSFET when it turns off. Therefore, proper layout pattern design helps to increase voltage margin of the power MOSFET to its break- down voltage and reduce power stress and loss of the clamping snubber circuit.

Figure 55. LC552xD (isolated designs) peripheral circuit connection example

Figure 56. LC552xF (isolated designs) peripheral circuit connection example

5 C17

SANKEN ELECTRIC CO., LTD. LC5500-AN, Rev.1.2

• The contents in this document are subject to changes, for improvement and other purposes, without notice. Make sure that this is the latest revision of the document before use.
• Application and operation examples described in this document are quoted for the sole purpose of reference for the use of the products herein and Sanken can assume no responsibility for any infringement of industrial property rights, intellectual property rights or any other rights of Sanken or any third party which may result from its use.
• Although Sanken undertakes to enhance the quality and reliability of its products, the occurrence of failure and defect of se miconductor products at a certain rate is inevitable. Users of Sanken products are requested to take, at their own risk, preventative measures including safety design of the equipment or systems against any possible injury, death, fires or damages to the society due to device failure or malfunction.
• Sanken products listed in this document are designed and intended for the use as components in general purpose electronic equ ipment or apparatus (home appliances, office equipment, telecommunication equipment, measuring equipment, etc.). When considering the use of Sanken products in the applications where higher reliability is required (transportation equipment and its control systems, traffic signal control systems or equipment, fire/crime alarm systems, various safety devices, etc.), and whenever long life expectancy is required even in general purpose electronic equipment or apparatus, please contact your nearest Sanken sales representative to discuss, prior to the use of the products herein. The use of Sanken products without the written consent of Sanken in the applications where extremely high reliability is required (aerospace equipment, nuclear power control systems, life support systems, etc.) is strictly prohibited.
• In the case that you use our semiconductor devices or design your products by using our semiconductor devices, the reliabilit y largely depends on the degree of derating to be made to the rated values. Derating may be interpreted as a case that an operation range is set by derating the load from each rated value or surge voltage or noise is considered for derating in order to assure or improve the reliability. In general, derating factors include electric stresses such as electric voltage, electric current, electric power etc., environmental stresses such as ambient temperature, humidity etc. and thermal stress caused due to self-heating of semiconductor devices. For these stresses, instantaneous values, maximum values and minimum values must be taken into consideration. In addition, it should be noted that since power devices or IC’s including power devices have large self-heating value, the degree of derating of junction temperature (Tj) affects the reliability significantly.
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