LC540A

SN54LVC540A_06 TI | Alldatasheet

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V CC OE2 SN54LVC540A . . . J OR W PACKAGE SN74LVC540A . . . DB, DGV, DW, NS, OR PW PACKAGE (TOP VIEW) 3 2 1 20 19 9 10 11 12 13 SN54LVC540A . . . FK PACKAGE (TOP VIEW) OE1 Y6 OE2 GND V CC SN54LVC540A, SN74LVC540A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS297M JANUARY 1993 REVISED MAY 2005 Operate From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max t pd of 5.3 ns at 3.3 V Typical V OLP (Output Ground Bounce) 0.8 V at V CC 3.3 T A C Typical V OHV (Output V OH Undershoot) V at V CC 3.3 T A C Support Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V V CC I off Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 250 mA Per JESD ESD Protection Exceeds JESD 2000-V Human-Body Model (A114-A) 1000-V Charged-Device Model (C101) The SN54LVC540A octal buffer/driver is designed for 2.7-V to 3.6-V V CC operation, and the SN74LVC540A octal buffer/driver is designed for 1.65-V to 3.6-V V CC operation. These devices are ideal for driving bus lines or buffer memory address registers. These devices feature inputs and outputs on opposite sides of the package that facilitate printed circuit board layout. ORDERING INFORMATION T A PACKAGE (1) ORDERABLE PART NUMBER TOP-SIDE MARKING Tube of SN74LVC540ADW SOIC DW LVC540A Reel of 2000 SN74LVC540ADWR SOP NS Reel of 2000 SN74LVC540ANSR LVC540A SSOP DB Reel of 2000 SN74LVC540ADBR LC540A C to C Tube of SN74LVC540APW TSSOP PW Reel of 2000 SN74LVC540APWR LC540A Reel of 250 SN74LVC540APWT TVSOP DGV Reel of 2000 SN74LVC540ADGVR LC540A CDIP J Tube of SNJ54LVC540AJ SNJ54LVC540AJ C to 125 C CFP W Tube of SNJ54LVC540AW SNJ54LVC540AW LCCC FK Tube of SNJ54LVC540AFK SNJ54LVC540AFK (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical

applications

sheet. PRODUCTION DATA information is current as of publication date. Copyright 1993 2005, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas On products compliant to MIL-PRF-38535, all parameters are Instruments standard warranty. Production processing does not tested unless otherwise noted. On all other products, production necessarily include testing of all parameters. processing does not necessarily include testing of all parameters.

www.ti.com DESCRIPTION/ORDERING INFORMATION (CONTINUED) OE1 OE2 To Seven Other Channels A1 Y1 2 18 SN54LVC540A, SN74LVC540A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS297M JANUARY 1993 REVISED MAY 2005 The 3-state control gate is a 2-input AND gate with active-low inputs so that, if either output-enable OE1 or OE2 input is high, all outputs are in the high-impedance state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. These devices are fully specified for partial-power-down I off The I off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. To ensure the high-impedance state during power up or power down, OE should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. FUNCTION TABLE INPUTS OUTPUT Y OE1 OE2 A L L L H L L H L H X X Z X H X Z LOGIC DIAGRAM (POSITIVE LOGIC)

www.ti.com Absolute Maximum Ratings (1) Recommended Operating Conditions (1) SN54LVC540A, SN74LVC540A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS297M JANUARY 1993 REVISED MAY 2005 over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT V CC Supply voltage range 0.5 6.5 V V I Input voltage range (2) 0.5 6.5 V V O Voltage range applied to any output in the high-impedance or power-off state (2) 0.5 6.5 V V O Voltage range applied to any output in the high or low state (2) (3) 0.5 V CC 0.5 V I IK Input clamp current V I mA I OK Output clamp current V O mA I O Continuous output current mA Continuous current through V CC or GND 100 mA DB package DGV package θ JA Package thermal impedance (4) DW package C/W NS package PW package T stg Storage temperature range 150 C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. (3) The value of V CC is provided in the recommended operating conditions table. (4) The package thermal impedance is calculated in accordance with JESD 51-7. SN54LVC540A SN74LVC540A UNIT MIN MAX MIN MAX Operating 3.6 1.65 3.6 V CC Supply voltage V Data retention only 1.5 1.5 V CC 1.65 V to 1.95 V 0.65 V CC V IH High-level input voltage V CC 2.3 V to 2.7 V 1.7 V V CC 2.7 V to 3.6 V V CC 1.65 V to 1.95 V 0.35 V CC V IL Low-level input voltage V CC 2.3 V to 2.7 V 0.7 V V CC 2.7 V to 3.6 V 0.8 0.8 V I Input voltage 5.5 5.5 V High or low state V CC V CC V O Output voltage V 3-state 5.5 5.5 V CC 1.65 V V CC 2.3 V I OH High-level output current mA V CC 2.7 V V CC V V CC 1.65 V V CC 2.3 V I OL Low-level output current mA V CC 2.7 V V CC V T A Operating free-air temperature 125 C (1) All unused inputs of the device must be held at V CC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs literature number SCBA004.

www.ti.com Electrical Characteristics Switching Characteristics SN54LVC540A, SN74LVC540A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS297M JANUARY 1993 REVISED MAY 2005 over recommended operating free-air temperature range (unless otherwise noted) SN54LVC540A SN74LVC540A PARAMETER TEST CONDITIONS V CC UNIT MIN TYP (1) MAX MIN TYP (1) MAX 1.65 V to 3.6 V V CC 0.2 I OH 100 µ A 2.7 V to 3.6 V V CC 0.2 I OH mA 1.65 V 1.2 V OH I OH mA 2.3 V 1.7 V 2.7 V 2.2 2.2 I OH mA V 2.4 2.4 I OH mA V 2.2 2.2 1.65 V to 3.6 V 0.2 I OL 100 µ A 2.7 V to 3.6 V 0.2 I OL mA 1.65 V 0.45 V OL V I OL mA 2.3 V 0.7 I OL mA 2.7 V 0.4 0.4 I OL mA V 0.55 0.55 I I V I to 5.5 V 3.6 V µ A I off V I or V O 5.5 V µ A I OZ V O to 5.5 V 3.6 V µ A V I V CC or GND I CC I O 3.6 V µ A 3.6 V V I 5.5 V (2) One input at V CC 0.6 Δ I CC 2.7 V to 3.6 V 500 500 µ A Other inputs at V CC or GND C i V I V CC or GND 3.3 V pF C o V O V CC or GND 3.3 V 5.5 5.5 pF (1) All typical values are at V CC 3.3 T A (2) This applies in the disabled state only. over recommended operating free-air temperature range (unless otherwise noted) (see Figure SN54LVC540A FROM TO V CC 3.3 V PARAMETER V CC 2.7 V UNIT (INPUT) (OUTPUT) 0.3 V MIN MAX MIN MAX t pd A Y 7.1 5.3 ns t en OE Y 6.6 ns t dis OE Y 8.2 7.4 ns

www.ti.com Switching Characteristics Operating Characteristics SN54LVC540A, SN74LVC540A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS297M JANUARY 1993 REVISED MAY 2005 over recommended operating free-air temperature range (unless otherwise noted) (see Figure SN74LVC540A FROM TO V CC 1.8 V V CC 2.5 V V CC 3.3 V PARAMETER V CC 2.7 V UNIT (INPUT) (OUTPUT) 0.15 V 0.2 V 0.3 V MIN MAX MIN MAX MIN MAX MIN MAX t pd A Y 16.4 7.8 7.1 1.4 5.3 ns t en OE Y 16.5 10.5 1.1 6.6 ns t dis OE Y 15.9 8.2 1.8 7.4 ns t sk(o) ns T A C V CC 1.8 V V CC 2.5 V V CC 3.3 V TEST PARAMETER UNIT CONDITIONS TYP TYP TYP Outputs enabled Power dissipation capacitance per C pd f MHz pF buffer/driver Outputs disabled

www.ti.com PARAMETER MEASUREMENT INFORMATION VM thtsu From Output Under Test CL (see Note A) LOAD CIRCUIT VLOAD Open GND RL RL Data Input Timing Input VI 0 V VI 0 V 0 V tw Input VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VOLTAGE WAVEFORMS PULSE DURATION tPLH tPHL tPHL tPLH VOH VOH VOL VOL VI 0 V Input Output Waveform 1 S1 at VLOAD (see Note B) Output Waveform 2 S1 at GND (see Note B) VOL VOH tPZL tPZH tPLZ tPHZ VLOAD/2 0 V VOL + VΔ VOH − VΔ ≈ 0 V VI VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING Output Output tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND TEST S1 NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω . D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Output Control VM VM VM VM VM VM VM VM VM VM VM VM VI VM VM 2.7 V 1 kΩ 500 Ω 500 Ω 500 Ω VCC RL 2 × VCC 2 × VCC 6 V 6 V VLOAD CL 30 pF 30 pF 50 pF 50 pF 0.15 V 0.15 V 0.3 V 0.3 V VΔ VCC VCC 2.7 V 2.7 V VI VCC/2 VCC/2 1.5 V 1.5 V VM tr/tf ≤ 2 ns ≤ 2 ns ≤ 2.5 ns ≤ 2.5 ns INPUTS SN54LVC540A, SN74LVC540A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS297M JANUARY 1993 REVISED MAY 2005 Figure Load Circuit and Voltage Waveforms

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) 5962-9759401Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type 5962-9759401QRA ACTIVE CDIP J 20 1 TBD A42 SNPB N / A for Pkg Type 5962-9759401QSA ACTIVE CFP W 20 1 TBD A42 N / A for Pkg Type SN74LVC540ADBLE OBSOLETE SSOP DB 20 TBD Call TI Call TI SN74LVC540ADBR ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC540ADBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC540ADGVR ACTIVE TVSOP DGV 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC540ADGVRE4 ACTIVE TVSOP DGV 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC540ADW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC540ADWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC540ADWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC540ADWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC540ANSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC540ANSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC540APW ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC540APWE4 ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC540APWLE OBSOLETE TSSOP PW 20 TBD Call TI Call TI SN74LVC540APWR ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC540APWRE4 ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC540APWT ACTIVE TSSOP PW 20 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC540APWTE4 ACTIVE TSSOP PW 20 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SNJ54LVC540AFK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type SNJ54LVC540AJ ACTIVE CDIP J 20 1 TBD A42 SNPB N / A for Pkg Type SNJ54LVC540AW ACTIVE CFP W 20 1 TBD A42 N / A for Pkg Type (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2006 Addendum-Page 1

(2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2006 Addendum-Page 2

MLCC006B – OCTOBER 1996 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 4040140/D 10/96

28 TERMINAL SHOWN

B 0.358 (9,09) MAX (11,63) 0.560 (14,22) 0.560 0.458 0.858 (21,8) 1.063 (27,0) (14,22) ANO. OF MINMAX 0.358 0.660 0.761 0.458 0.342 (8,69) MIN (11,23) (16,26) 0.640 0.739 0.442 (9,09) (11,63) (16,76) 0.962 1.165 (23,83) 0.938 (28,99) 1.141 (24,43) (29,59) (19,32)(18,78) 0.020 (0,51) TERMINALS 0.080 (2,03) 0.064 (1,63) (7,80) 0.307 (10,31) 0.406 (12,58) 0.495 (12,58) 0.495 (21,6) 0.850 (26,6) 1.047 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.035 (0,89) 0.010 (0,25) 121314151618 17 432 0.020 (0,51) 0.010 (0,25) 12826 27 B SQ A SQ 0.055 (1,40) 0.045 (1,14) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a metal lid. D. The terminals are gold plated. E. Falls within JEDEC MS-004

MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE

24 PINS SHOWN

3,70 3,50 4,90 5,10 20DIM PINS ** 4073251/E 08/00 1,20 MAX Seating Plane 0,05 0,15 0,25 0,50 0,75 0,23 0,13 11 2 24 13 4,30 4,50 0,16 NOM Gage Plane A 7,90 7,70 382416 4,90 5,103,70 3,50 A MAX A MIN 6,60 6,20 11,20 11,40 9,60 9,80 0,08 M0,070,40 0°–8° NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. D. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194

MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 4040065 /E 12/01

28 PINS SHOWN

8,20 7,40 0,55 0,95 0,25 12,90 12,30 10,50 8,50 Seating Plane 9,907,90 10,50 9,90 0,38 5,60 5,00 0,22 A 2016 6,506,50 0,05 MIN 5,905,90 DIM A MAX A MIN PINS ** 2,00 MAX 6,90 7,50 0,65 M0,15 0°–/C02578° 0,10 0,09 0,25 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-150

MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

14 PINS SHOWN

0,65 M0,10 0,10 0,25 0,50 0,75 0,15 NOM Gage Plane 9,80 9,60 7,90 7,70 2016 6,60 6,40 4040064/F 01/97 0,30 6,60 6,20 0,19 4,30 4,50 0,15 A 1,20 MAX 5,10 4,90 3,10 2,90 A MAX A MIN DIM PINS ** 0,05 4,90 5,10 Seating Plane 0°–8° NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-153

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