LB1980JH ONSEMI | Alldatasheet
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62707 MS IM / 80906 / 13006 MH IM 20051205-S00014 No.A0231-1/7 http://onsemi.com Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Oper ating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Semiconductor Components Industries, LLC, 2013 May, 2013 LB1980JH Overview The LB1980JH is a 3-phase brushless motor driver that is particularly appropriate for automotive. Functions
- 3-phase full-wave drive
- Built-in torque ripple correction circuit (variable correction ratio)
- Current limiter circuit
- Upper and lower side output stage over-saturation prevention circuit that does not require external capacitors.
- FG amplifier
- Thermal shutdown circuit Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit VCC max 7V Maximum supply voltage VS max 24 V Maximum output current I O max 1.3 A Mounted on a board * 1.81 W Allowable power dissipation Pd max Independent IC 0.77 W Operating temperature Topr -30 to 85 °C Storage temperature Tstg -55 to +150 °C * Mounted on a 76.1mm×114.3mm×1.6mm, glass epoxy printed circuit board. Monolithic Digital IC 3-Phase Brushless Motor Driver
No.A0231-2/7 Allowable Operating Ranges at Ta = 25°C Parameter Symbol Conditions Ratings Unit VS 5 to 22 V Supply voltage VCC 4.5 to 5.5 V Hall input amplitude V HALL Between the hall inputs ±30 to ±80 mVo-p GSENSE pin input range V GSENSE With respect to the control system ground -0.20 to +0.20 V Electrical Characteristics at Ta = 25°C, VCC = 5V,VS = 15V Ratings Parameter Symbol Conditions min typ max Unit VCC supply current I CC R L=∞, VCTL=0V, VLIM=0V (Quiescent) 12 18 mA Outputs VO sat1 I O=500mA, Rf=0.5Ω, Sink+Source VCTL=VLIM=5V(With saturation prevention) 2.1 2.6 V Output saturation voltage VO sat2 I O=1.0mA, Rf=0.5Ω, Sink+Source VCTL=VLIM=5V(With saturation prevention) 2.6 3.5 V Output leakage current I O leak 1.0 mA FR FR pin input threshold voltage V FSR 2.25 2.50 2.75 V FR pin input bias current I B(FSR) -5.0 mA Control CTLREF pin voltage V CREF 2.05 2.15 2.25 V CTLREF pin input range V CREFIN 1.50 3.50 V CTL pin input bias current I B(CTL) With V CTL=5V and the CTLREF pin open 4.0 μA CTL pin control start voltage V CTL(ST) With Rf=0.5 Ω, VLIM=5V, IO≥10mA, Hall input logic fixed (U, V, W=H, H, L) 2.00 2.15 2.30 V CTL pin control Gm Gm(CTL) With Rf=0.5 Ω, ΔIO=200mA, Hall input logic fixed (U, V, W=H, H, L) 0.46 0.58 0.70 A / V Current Limiter LIM current limit offset voltage Voff(LIM) With Rf=0.5 Ω, VCTL=5V, IO≥10mA, Hall input logic fixed (U, V, W=H, H, L) 140 200 260 mV LIM pin input bias current I B(LIM) With V CTL=5V and the VCREF pin open -2.5 μA LIM pin current control level I LIM With Rf=0.5 Ω, VCTL=5V, VLIM=2.06V Hall input logic fixed (U, V, W=H, H, L) 830 900 970 mA Hall Amplifier Hall amplifier input offset voltage Voff(HALL) -6 +6 mA Hall amplifier input bias current I B(HALL) 1.0 3.0 μA Hall amplifier common-mode input voltage range VCM(HALL) 1.3 3.3 V TRC Torque ripple correction ratio TRC For the high and low peaks in the Rf waveform when IO=200mA. (Rf=0.5Ω, with the ADJ pin open) *1 9 % ADJ pin voltage V ADJ 2.37 2.50 2.63 V FG Amplifier FG amplifier input offset voltage Voff(FG) -8 +8 mV FG amplifier input bias current I B(FG) -100 nA FG amplifier output saturation voltage VO sat (FG) Sink side, for the load provided by the internal pull-up resistor 0.5 V FG amplifier voltage gain V G(FG) For the open loop state with f=10kHz 41.5 44.5 47.5 dB FG amplifier common-mode input voltage VGM(FG) 0.5 4.0 V Saturation Saturation prevention circuit lower side voltage setting VO sat(DET) The voltages between each OUT and Rf pair when IO=10mA, Rf=0.5Ω, and VCTL=VLIM=5V 0.175 0.25 0.325 V TSD TSD operating temperature TSD Design target value *2 180 °C Hysteresis width ΔTSD Design target value *2 20 °C Notes : *1. The torque ripple correction ratio is determined as follows from the Rf voltage waveform. *2. Parameters that are indicated as design target values in the conditions column are not tested.
No.A0231-3/7 For each Hall logic setting Vp Vb Ground level Correction ratio = 25(Vp--Vb) 1005(%)Vp--Vb WOUT NC NC RF(SENSE) GSENSE FR GND FGIN- FGIN+ FGOUT CTL CTLREF LIM FC VOUT UOUT NC NC RF(PWR) ADJ VS VCC WIN- WIN+ VIN- VIN+ UIN- UIN+ FRAME GND FRAME GND LB1980JH 28 27 26 25 24 23 22 1234567 8 9 10 11 12 13 14 21 20 19 18 17 16 15 Top view Package Dimensions unit : mm (typ) 3233B Pin Assignment SANYO : HSOP28H(375mil) 15.2 (6.2) 0.3 7.9 (4.9) 10.5 2.7 0.8 2.0(0.8) 1 14 1528 0.65 0.25 2.45max 0.1 (2.25) HEAT SPREADER Ambient temperature, Ta -- °C Allowable power dissipation, Pd max -- W ILB01756 0.4 0.8 1.2 1.6 1.81 0.77 2.0 -30 -20 0 20 40 60 80 100 Pd max -- Ta Independent IC 0.94 0.40 Mounted on a 76.1mm×114.3mm×1.6 mm glass epoxy printed circuit board
No.A0231-4/7 U UIN+ UIN- V VIN+ VIN- W WIN+ WIN- About 0.435VCC LIMREF CTL CTLREF LIM FR GND VCC Differential distribution and torque ripple correction block Upper side saturation prevention control Feedback amplifier FG amplifier Bandgap 1.2V Reference voltage Control amplifier Forward / reverse selection Drive distribution circuit and lower side saturation prevention circuit W gm gm V U VOUT UOUT VS Output stage WOUT Rf(PWR) ADJ GSENSE FGIN- FGIN+ FGOUT Rf(SENSE) Antilogarithm conversion and differential distribution TSD FC + + 7 10 Hall input synthesis block (linear matrix) Synthesized output logarithmic compression block Block Diagram
No.A0231-5/7 Pin Function Pin No. Pin Name Function Equivalent circuit UOUT VOUT WOUT U phase output, Spark killer diodes are built-in. V phase output, Spark killer diodes are built-in. W phase output, Spark killer diodes are built-in. Rf (SENSE) Rf (PWR) Output current detection. The control block current limiter operates using the resistor Rf connected between these pins and ground. Also, the lower side saturation prevention circuit and the torque ripple correction circuit operate based on the voltages across this resistor. It is especially important to note that, since the saturation prevention level is set using this voltage, the lower side saturation prevention circuit will become less effective in the high current region if the value of Rf is lowered excessively. Also, the PWR and SENSE pins must be connected together.
22 V S Output block power supply
150μA VS VCC OUT Rf (PWR) Rf (SENSE) 30kΩ 200Ω 200Ω Lower side saturation prevention circuit input block 10μA VCC 5 GSENSE Ground sensing. The in fluence of the common ground impedance on Rf can be excluded by connecting this pin to nearest ground for the Rf resistor side of the motor ground wiring that includes Rf. (This pin must not be left open.) 6 FR Forward / reverse selection. The voltage applied to this pin selects the motor direction (forward or reverse). (Vth=2.5V at VCC=5V (typical))
23 ADJ Used for external adjustment of the torque ripple
correction ratio. Apply a voltage externally with a low-impedance circuit to the ADJ pin to adjust the correction ratio. The correction ratio falls as the applied voltage is increased, and increases as the applied voltage decreases. The torque ripple correction ratio can be modified by factors in the range 0 to 2 times the ratio that applies when his pin is left open. (The pin voltage is set to about VCC / 2 internally, and the input impedance is about 5kΩ.) 200μA VCC VCC VCC VCC FR 200Ω VCC 10kΩ 10kΩ 6kΩ6kΩ 500Ω 10kΩ 10kΩ ADJ 20μA 6 23 7 GND Ground for all circuits other than the output transistors. The lowest potential of the output transistors is that of the Rf pin.
8 FG IN- Input used when the FG amplifier is used as an inverting
input. A feedback resistor must be connected between FGOUT and this pin.
9 FG IN+ Non-inverting input used when the FG amplifier is used as
a differential input amplifier. No bias is applied internally. 5μA VCC 300Ω FGIN(+)FGIN(−) 300Ω 10 FG OUT FG amplifier output. There is an internal resistive load. 14 FC Speed control loop frequency characteristics correction. VCCVCC FC 10kΩ 2kΩ VCC FGOUT 300Ω Continued on next page.
No.A0231-6/7 IOUT IOUT VLIM=5V CTLREF: OPEN Gm1=0.58A / V typ 2.10V typ Control Characteristics VCTL 0 123 4 5 VCTL=5V CTLREF: OPEN Control Limiter Characteristics VLIM 01 2 3 4 200mA / V typ Slope: 0.50A / V typ Continued from preceding page. Pin No. Pin Name Function Equivalent circuit 11 CTL Speed control input. The control implemented is fixed current drive controlled by current feedback from Rf. Gm=0.58 / V (typical) when Rf=0.5W 12 CTLREF Control reference voltage. While this pin is set to about 0.43×VCC internally, this voltage can be modified by applying a voltage from a low-impedance circuit. (The input impedance is about 4.3kΩ). 13 LIM Current limiter function cont rol. The output current can be varied linearly by applying a voltage to this pin. The slope is 0.5A / V (typical) when Rf=0.5Ω. CTL CTLREF VCC VCC VCC 7.5kΩ 10kΩ 200Ω 200Ω LIM 200Ω 100μA 200μA max11 UIN+ UIN- VIN+ VIN- WIN+ WIN- U phase Hall element inputs. Logic high is defined as states where IN+>IN-. V phase Hall element inputs. Logic high is defined as states where IN+>IN-. W phase Hall element inputs. Logic high is defined as states where IN+>IN-. 200Ω 100μA 200Ω (+) input (--) input
21 V CC Power supply for all internal blocks other than the output
block. This voltage must be stabilized so that noise and ripple do not enter the IC. Truth Table and Control Functions Hall input Source → Sink U V W FR Phase V → Phase W H Phase W → Phase V H H L L Phase U → Phase W H Phase W → Phase U H L L L Phase U → Phase V H Phase V → Phase U H L H L Phase W → Phase V H Phase V → Phase W L L H L Phase W → Phase U H Phase U → Phase W L H H L Phase V → Phase U H Phase U → Phase V L H L L Note: Since the drive technique adopted is a 180° technique, phases other than the sink and source phase do not turn off. Control Function and Current Limiter Function Note: In the FR column, “H” refers to a voltage of 2.75V or higher, and “L” refers to 2.25V or lower (when VCC=5V .) Note: In the Hall input column, “H” refers to the state in the corresponding phase where the +input is at a potential at least 0.01V higher than the -input, and “L” refers to the state where the -input is at a potential at least 0.01V higher than the +input.
PS No.A0231-7/7 WOUT NC NC RF(SENSE) GSENSE FR GND FGIN- FGIN+ FGOUT CTL CTLREF LIM FC VOUT UOUT NC NC RF(PWR) ADJ VS VCC WIN- WIN+ VIN- VIN+ UIN- UIN+ FRAME GND FRAME GND LB1980JH 28 27 26 25 24 23 22 1234567 8 9 10 11 12 13 14 21 20 19 18 17 16 15 0.1μF 0.1μF 0.1μF L Hall output Hall output Hall output GaAs Hall devices are recommended. L L VCC 0.5Ω Power system ground VS Voltage applied to the ADJ pin VCC Current limiter setting voltage pin CTLREF voltage pin Torque command voltage pin Forward / reverse command voltage pin VCC / 2 bias MR 0.1μF 75kΩ1kΩ0.1μF Hall input R Application Circuit Example ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequentia l or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s techn ical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC productsfor any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, anddistributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture oft h e part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.