LB1945H ONSEMI | Alldatasheet

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30409 MS / 82799RM(KI) No.6193-1/7 http://onsemi.com Semiconductor Components Industries, LLC, 2013 June, 2013 LB1945H Overview The LB1945H is a PWM current control type stepping motor driver. Feature

  • PWM current control (external excitation)
  • Load current digital selection (1-2, W1-2, and 2 phase excitation drives possible)
  • Built-in upper/lower diode
  • Simultaneous ON prevention function (feed-through current prevention)
  • Built-in thermal shutdown circuit
  • Built-in noise canceler Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit Maximum motor supply voltage V BB max 30 V Output peak current I O peak t w ≤ 20μs 1.0 A Output continuous current I O max 0.8 A Logic supply voltage V CC max 6.0 V Logic input voltage range V IN max -0.3 to VCC V Emitter output voltage V E max 1.0 V Allowable power dissipation Pd max Mounted on a specified board * 1.9 W Operating temperature Topr -20 to +90 °C Storage temperature Tstg -55 to +150 °C * Specified board: 114.3mm × 76.1mm × 1.6mm, glass epoxy board. Monolithic Digital IC PWM Current Control Type Stepping Motor Driver Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Oper ating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

No.6193-2/7 Allowable Operating Ranges at Ta = 25°C Parameter Symbol Conditions Ratings Unit Motor supply voltage V BB 10 to 28 V Logic supply voltage V CC 4.75 to 5.25 V Reference voltage V REF 1.5 to 5.0 V Electrical Characteristics at Ta = 25°C, VBB = 24V, VCC = 5V, VREF = 5.0V Ratings Parameter Symbol Conditions min typ max Unit Output Block IBB OFF ENABLE = 3.2V 0.2 mA VOsat1 I O = +0.5A, sink 0.3 0.5 V VOsat2 I O = +0.8A, sink 0.5 0.7 V VOsat3 I O = -0.5A, source 1.6 1.8 V Output saturation voltage VOsat4 I O = -0.8A, source 1.8 2.0 V IO1(leak) V O = VBB, sink 50 μA Output leakage current IO2(leak) V O = 0V, source -50 μA Output sustain voltage V SUS L = 3.9mH, I O = 1.0A, Design guarantee value * 30 V Logic Block ICC ON I 1 = 0.8V, I2 = 0.8V, ENABLE = 0.8V 50 70 92 mA Logic supply current ICC OFF ENABLE = 3.2V 7 10 13 mA VIH 3.2 V Input voltage VIL 0.8 V IIH V IH = 3.2V 35 50 65 μA Input current IIL V IL = 0.8V 7 10 13 μA I1 = 0.8V, I2 = 0.8V 9.5 10 10.5 I1 = 3.2V, I2 = 0.8V 13.5 15 16.5 Set current control threshold value Vref/Vsen I1 = 0.8V, I2 = 3.2V 25.5 30 34.5 CR pin current I CR CR = 1.0V -1.0 mA Thermal shutdown temperature T-TSD Design guarantee value * 170 °C Temperature hysteresis width Ts hys 40 °C * Design guarantee value, Do not measurement.

No.6193-3/7 Package Dimensions unit : mm (typ) 3233B Pin Assignment 1OUTA 2OUTA 3NC 4NC 5E1 6D-GND 7VBB1 OUTB NC NC VBB2 D-GND VCC PHASE1 ENABLE1 IA2 IA1 VREF1 GND CR PHASE2 ENABLE2 IB2 IB1 VREF2 S-GND OUTB LB1945H SANYO : HSOP28H(375mil) 15.2 (6.2) 0.3 7.9 (4.9) 10.5 2.7 0.8 2.0(0.8) 1 14 1528 0.65 0.25 2.45max 0.1 (2.25) HEAT SPREADER -20 0 20 40 60 80 1000 2.4 1.6 1.2 0.8 0.4 Pd max -- Ta 2.0 1.9 0.91 Ambient temperature, Ta -- °C Allowable power dissipation, Pd max -- W Specified board: 114.3×76.1×1.6mm3 glass epoxy board.

No.6193-4/7 Block Diagram OUTAOUTA OUTBOUTBVBB1 PHASE1 ENABLE1 IA1 IA2 VREF1 GND PHASE2 ENABLE2 IB1 IB2 VREF2 VCC E1 E2 VBB2 D-GND D-GND S-GND 5 6 22 23 242728721 OSC CR Control logic ciruit Control logic ciruit Thermal shutdown circuit Current select circuit Current select circuit Blanking time Blanking time

No.6193-5/7 Truth Table ENABLE PHASE OUT A OUT A L H H L L L L H H − OFF OFF I1 I 2 Output current L L Vref / (10 × RE) = IOUT H L Vref / (15 × RE) = IOUT × 2/3 L H Vref / (30 × RE) = IOUT × 1/3 H H 0 Note: Output is OFF when ENABLE = H or when I1 = I2 = H. Pin Function Pin No. Pin name Function 7 V BB1 Output stage power supply voltage pin. 24 V BB2 Cathode pin for the upper-side diodes. Insert resistor RE between these pins and ground to control set current. OUTA OUTA OUTB OUTB Output pins. 14 GND Ground pin. 15 S-GND Sense ground pin. D-GND D-GND Lower-side internal diode ground (anode). 21 CR Triangular wave chopping with CR constant setting. Triangular wave OFF time is noise cancel time. VREF1 VREF2 Output current setting pins. (Output current is set by inputting a 1.5V to 7.5V voltage.) PHASE1 PHASE2 Output phase select input pin. High input: OUTA = H, OUTA = L Low input: OUTA = L, OUTA = H ENABLE1 ENABLE2 Output ON/OFF setting input pins. High input: output OFF Low input: output ON 12,11 17,18 IA1,IA2 IB1,IB2 Output current setting digital input pins. Current is set to 1/3, 2/3, 1 by High and Low combinations. 8 V CC Logic block power supply voltage pin.

No.6193-6/7 Application Circuit Example

2 OUT A

6 D-GND

0.51Ω(1W) 24V 47μF 10μF 0.1μF L 820pF 0.51Ω(1W) 82kΩ L Logic input Logic input Voltage from 1.5 to 5V can be applied. The fin on the bottom of HSOP-28H package and the fins between pins 7 and 8 and 21 and 22 should be grounded.

PS No.6193-7/7 Usage Notes 1. VREF pin Because the VREF pin is used as reference voltage input pin for the current setting, care must be taken to prevent noise from affecting the input. 2. GND pin Because this IC switches large currents, the ground pattern must be designed with care. The fin on the bottom of the package and the fins between pins 7 and 8 and 21 and 22 should be grounded. Low-impedance patterns should be used in blocks where large currents flow, and these blocks should be separated from low-level signal blocks. In particular, the ground of the sense resistor RE at pin E should be located close to the IC ground. Pattern layout should be designed so that the capacitors between VCC and ground and VBB and ground are close to VCC and VBB. ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequentia l or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s techn ical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC productsfor any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, anddistributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture oft h e part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.