LB1845 ONSEMI | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 9

Technical content

Features

  • PWM current control (fixed off time scheme)
  • Digital load current selection function
  • Sustained output voltage: 45V
  • Built-in thermal shutdown circuit Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit Motor supply voltage V BB max 45 V Peak output current I O peak tW ≤ 20μs 1.75 A Continuous output current I O max 1.5 A Logic block supply voltage V CC 7.0 V Logic input voltage range V IN -0.3 to VCC V Emitter output voltage V E 1.0 V Pd max1 Independent IC 3.0 W Allowable power dissipation Pd max2 With an arbitrarily large heat sink 20.0 W Operating temperature Topr -20 to +85 °C Storage temperature Tstg -55 to +150 °C Monolithic Digital IC PWM Current Controlling Stepping Motor Driver Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Oper ating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

No.5505-2/9 Recommended Operating Ranges at Ta = 25°C Parameter Symbol Conditions Ratings Unit Motor supply voltage V BB 10 to 44.5 V Logic block supply voltage V CC 4.75 to 5.25 V Reference voltage V REF 1.5 to 7.5 V Electrical Characteristics at Ta = 25°C, VBB = 38V, VCC = 5V, VREF = 5V Ratings Parameter Symbol Conditions min typ max unit [Output Block] IBB ON 12 16Output stage supply current IBB OFF 0.7 0.9 mA VO(sat)1 I O = +1.0A Sink 1.2 1.4 VO(sat)2 I O = +1.5A Sink 1.4 1.7 VO(sat)3 I O = -1.0A Source 1.1 1.3 Output saturation voltage 1 VO(sat)4 I O = -1.5A Source 1.3 1.6 V IO(leak)1 V O = VBB Sink 50Output leakage current IO(leak)2 V O = 0V Source -50 μA Sustained output voltage V(sus) * 45 V [Logic Block] ICC ON I 0 = 0.8V, I1 = 0.8V 19.5 25.3Logic supply current ICC OFF I 0 = 2.4V, I1 = 2.4V 15.5 20.1 mA VIH 2.4 Input voltage VIL 0.8 V IIH VIH = 2.4V 10Input current IIL V IL = 0.8V -10 μA I0 = 0.8V, I1 = 0.8V 9.5 10 10.5 I0 = 2.4V, I1 = 0.8V 13.5 15 16.5 Current control threshold voltage VREF/VSENSE I0 = 0.8V, I1 = 2.4V 25.5 30 34.5 Thermal shutdown temperature TS 170 °C * Note: Design guaranteed value. Package Dimensions unit: mm (typ) 3147C SANYO : DIP28H(500mil) 1 14 28 15 0.4 0.6 4.04.0 26.75 20.0 R1.7 8.4 (1.81) 1.78 1.0 12.7 11.2

No.5505-3/9 Truth Table ENABLE PHASE OUTA OUTB L H H L L L L H H - OFF OFF I0 I 1 Output Current L L V REF/(10×RE) = IOUT H L V REF/(15×RE) = IOUT×2/3 L H V REF/(30×RE) = IOUT×1/3 H H 0 Note: Outputs is OFF when ENABLE is high or in the I0 = I1 = high state. Pin Assignment ILB00880 Pd max - Ta Allowable Power Dissipation, Pd max - W Ambient Temperature, Ta- °C 10.4 1.56 --20 0 20 40 60 80 100 With an arbitrarily large heat sink Independent IC LB1845 123456 9 1 0 1 1 1 2 1 3 1 4 78 ILB00881 24 1823 22 16 21 1520 1926 25 1728 27 ENABLE1 PHASE2 I11 I01 RC2 I02 GND I12 ENABLE2 VREF1 PHASE1 VREF2 VCC RC1 NC D-GND OUT 1B OUT 1A SENSE2 OUT 2B VBB OUT 2A NC D-GND VBB SENSE1

No.5505-4/9 Block Diagram Application Circuit Diagram ILB00882 Current control block PHASE1 VREF1 ENABLE1 VCC ONE SHOT 470pF 330pF 56kΩ 0.82Ω(1W) 1kΩ SENSE1 SENSE2E1 RC1 D-GND GND VBB VBB SBDSBD OUT 1AOUT 1B I01 I11 PHASE2 VREF2 ENABLE2ONE SHOT 56kΩ 0.82Ω(1W) 470pF 330pF 1kΩ RC2 VBB SBD SBD OUT 2B OUT 2A I02 I12 Output block Thermal shutdown Output block Output block Output block Output blockOutput block Output blockOutput block Current control block SENSE1 VBB D-GND NC OUT1B OUT1A OUT2B OUT2A NC D-GND SENSE2 VBB ILB00883 Re=0.82Ω(1W) VREF=5V Rt=56kΩ Ct=470pF Rc=1kΩ Cc=330pF Cbb=100μF VREF1 RC1 VCC PHASE1 ENABLE1 I11 I01 I02 I12 ENABLE2 PHASE2 VREF2 RC2 GND Off time setting values toff≈CtRt Digital control signals Digital control signals Cc Rc Re Rc SBD SBD SBD SBD Re Cc Motor Cbb100μF Ccc Ct Ct Rt PWM2 PWM1

No.5505-5/9 Pin Description Pin No Pin Function 1, 14 V BB Output stage power-supply voltage SENSE1 SENSE2 Set current detection pins. Connect these pins, fed back through noise filters, to E1 and E2. The set current is controlled by the resistors Re inserted between these pins and ground. 4, 11 D-GND Internal diode anode connection OUT1B OUT1A OUT2B OUT2A Outputs

15 GND Ground

Used to set the output off time for the switched output signal. The fixed off times are set by the capacitors and resistors connected to these pins. toff = CR. VREF1 VREF2 Output current settings The output current is determined by the voltage (in the range 1.5 to 7.5V) input to these pins. PHASE1 PHASE2 Output phase switching inputs. High-level input: OUTA = high, OUTB = low Low-level input: OUTA = low, OUTB = high ENABLE1 ENABLE2 Output on/off settings High-level input: output off Low-level input: output on 22, 23 21, 20 I01, I11 I02, I12 Digital inputs that set the output current The output currents can be set to 1/3, 2/3, or full by setting these pins to appropriate combinations of high and low levels.

28 V CC Logic block power supply

Timing chart for pin switching operations during PWM drive Figure 1 Switching Waveforms toff: Output off time. Determined by external capacitor and resistor Ct and Rt. (toff ≈ Ct × Rt) td: Delay time between the point the set current is sensed at the SENSE pin and the point the output turns off. ILB00884 RC pin E pin SENSE pin VOUT pin td Spike noise toff

No.5505-6/9 Usage Notes 1. External diode Since this IC adopts a system based on lower side transistor switching drive, an external diode for the regenerative current that occurs during switching is required between VBB and VOUT. Use a Schottky barrier diode with a low feedthrough current. 2. Noise filters Since spike noise (see Figure 1) occurs when switching to the on state due to the external diode’s feedthrough current, applications must remove noise from the SENSE pin with a noise filter (Cc, Rc) between the E pin and the SENSE pin. However, note that if the values of Cc and Rc are too large, the SENSE voltage rise will be slowed, and the current setting will be shifted towards a higher current level. 3. VREF pin It is possible to change the output current continuously by continuously changing the VREF pin voltage. However, this voltage cannot be set to 0V. The VREF pin input impedance is 26kΩ (±30%) when VREF is 5V. Since this pin is used to set the output current, applications must be designed so that noise does not appear on this pin's input. 4. GND pin Since this IC switches large currents, care must be taken to avoid ground loops when the IC is mounted in the application. The section of the PCB that handles large currents should be designed with a low-impedance pattern, and must be separated from the small signal sections of the circuit. In particular, the ground for the sense resistor Re must be as close as possible to the IC ground. 5. Operation in hold mode There are cases where a current somewhat larger than the current setting may flow in hold mode (light load mode). Since this IC adopts a lower side switching, lower side sense system, the emitter voltage falls and the sense voltage goes to 0 when the switching state goes to off. The circuit then always turns the output on after the toff period has elapsed. At this time, due to the light load, the existence of the time td, and the fact that the output goes on even if the output current is higher than the set current, the output current will be somewhat higher than the set current. Applications should set the current setting somewhat lower than required if this occurs. 6. Function for preventing the upper and lower outputs being on at the same time This IC incorporates a built-in circuit that prevents the through currents that occur when the phase is switched. The table lists the output on and off delay times when PHASE and EANBLE are switched. Sink side Source side On delay time 10 μs 9 μs When PHASE is switched Off delay time 1.5 μs 3 μs On delay time 9 μs 9 μs When ENABLE is on Off delay time 1.5 μs 6.5 μs 7. 1-2 phase excitation and the double 1-2 phase excitation control sequence To reduce the vibration that occurs when the motor turns, this IC supports 1-2 phase excitation and double 1-2 phase excitation by using the output current setting digital input pins I0 and I1 without changing the VREF pin voltage. Tables 1 and 2 list that control sequence, and Figure 2 and Figure 3 present the composite vector diagram for this sequence.2. Noise filters

No.5505-8/9 ILB00887 IBB - VBB Output Stage Supply Current, IBB - mA Output Stage Power-Supply Voltage, VBB - V 0 4 8 12 16 20 24 28 32 36 40 44 46 VCC=5V VREF=5V ILB00888 ICC, IBB - VCC 567438012 ILB00890 VO(sat) - IOUT Output Current, IOUT - A 0.4 0.8 1.2 1.6 VBB=38V VREF=5V Output off IBB Output off IBB Output on ICC IBB ILB00889 ICC, IBB - VCC Logic Block Supply Current, ICC - mA Logic Block Supply Voltage, VCC - V 567438012 VBB=38V VREF=5V Output on VBB=45V VCC=5V VREF=5V ICC IBB ILB00891 VO(sat) -- IOUT Output Saturation Voltage, VO(sat) - V Output Current, IOUT - A 0.4 0.8 1.2 1.6 VBB=45V VCC=5V VREF=5V (Source side) (Sink side) Output Saturation Voltage, VO(sat) - V Output Stage Supply Current, IBB - mA Logic Block Supply Voltage, VCC - V Logic Block Supply Current, ICC - mA Output Stage Supply Current, IBB - mA

No.5505-9/9 PS ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequentia l or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s techn ical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC productsfor any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, anddistributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture oft h e part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.