LB176Q

SN55LBC176 TI | Alldatasheet

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/C0083/C0078/C0053/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0044 /C0083/C0078/C0054/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0044 /C0083/C0078/C0054/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0081/C0044 /C0083/C0078/C0055/C0053/C0076/C0066/C0067/C0049/C0055/C0054 /C0068/C0073/C0070/C0070/C0069/C0082/C0069/C0078/C0084/C0073/C0065/C0076 /C0066/C0085/C0083 /C0084/C0082/C0065/C0078/C0083/C0067/C0069/C0073/C0086/C0069/C0082/C0083 /C0261 /C0261 SLLS067G − AUGUST 1990 − REVISED APRIL 2006 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068Bidirectional Transceiver /C0068Meets or Exceeds the Requirements of ANSI Standard TIA/EIA−485−A and ISO 8482:1987(E) /C0068High-Speed Low-Power LinBiCMOS  Circuitry /C0068Designed for High-Speed Operation in Both Serial and Parallel Applications /C0068Low Skew /C0068Designed for Multipoint Transmission on Long Bus Lines in Noisy Environments /C0068Very Low Disabled Supply Current ...2 0 0 µA Maximum /C0068Wide Positive and Negative Input/Output Bus Voltage Ranges /C0068Thermal-Shutdown Protection /C0068Driver Positive-and Negative-Current Limiting /C0068Open-Circuit Failsafe Receiver Design /C0068Receiver Input Sensitivity... ±200 mV Max /C0068Receiver Input Hysteresis. . . 50 mV Typ /C0068Operates From a Single 5-V Supply /C0068Glitch-Free Power-Up and Power-Down Protection /C0068Available in Q-Temp Automotive HighRel Automotive Applications Configuration Control / Print Support Qualification to Automotive Standards

description

The SN55LBC176, SN65LBC176, SN65LBC176Q, and SN75LBC176 differential bus transceivers are monolithic, integrated circuits designed for bidirectional data communi- cation on multipoint bus-transmission lines. They are designed for balanced transmission lines and meet ANSI Standard TIA/EIA−485−A (RS-485) and ISO 8482:1987(E). Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. R RE DE D VCC B A GND D, JG, OR P PACKAGE (TOP VIEW) 3212 0 1 9 91 0 1 1 1 2 1 3 NC B NC A NC NC RE NC DE NC FK PACKAGE (TOP VIEW)NC R NC GND NC V NC NC D NC NC−No internal connection CC /C0261 /C0080/C0082/C0079/C0068/C0085/C0067/C0084/C0073/C0079/C0078 /C0068/C0065/C0084/C0065 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0105/C0115 /C0099/C0117/C0114/C0114/C0101/C0110/C0116 /C0097/C0115 /C0111/C0102 /C0112/C0117/C0098/C0108/C0105/C0099/C0097/C0116/C0105/C0111/C0110 /C0100/C0097/C0116/C0101/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0110/C0102/C0111/C0114/C0109 /C0116/C0111 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0112/C0101/C0114 /C0116/C0104/C0101 /C0116/C0101/C0114/C0109/C0115 /C0111/C0102 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0115/C0116/C0097/C0110/C0100/C0097/C0114/C0100 /C0119/C0097/C0114/C0114/C0097/C0110/C0116/C0121/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 Copyright  2000−2006, Texas Instruments Incorporated LinBiCMOS and LinASIC are trademarks of Texas Instruments Incorporated. /C0079/C0110 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0109/C0112/C0108/C0105/C0097/C0110/C0116 /C0116/C0111 /C0077/C0073/C0076/C0262/C0080/C0082/C0070/C0262/C0051/C0056/C0053/C0051/C0053/C0044 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115 /C0097/C0114/C0101 /C0116/C0101/C0115/C0116/C0101/C0100 /C0117/C0110/C0108/C0101/C0115/C0115 /C0111/C0116/C0104/C0101/C0114/C0119/C0105/C0115/C0101 /C0110/C0111/C0116/C0101/C0100/C0046 /C0079/C0110 /C0097/C0108/C0108 /C0111/C0116/C0104/C0101/C0114 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0115/C0044 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 INPUT D H L X ENABLE DE H H L OUTPUTS A B H L L H Z Z DRIVER DIFFERENTIAL INPUTS VID = VIA−V IB VID ≥ 0.2 V −0.2 V < VID < 0.2 V VID ≤ −0.2 V X Open ENABLE RE L L L H L OUTPUT R H L Z H RECEIVER H = high level, L = low level, ? = indeterminate, X = irrelevant, Z = high impedance (off) Function Tables

/C0083/C0078/C0053/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0044 /C0083/C0078/C0054/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0044 /C0083/C0078/C0054/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0081/C0044 /C0083/C0078/C0055/C0053/C0076/C0066/C0067/C0049/C0055/C0054 /C0068/C0073/C0070/C0070/C0069/C0082/C0069/C0078/C0084/C0073/C0065/C0076 /C0066/C0085/C0083 /C0084/C0082/C0065/C0078/C0083/C0067/C0069/C0073/C0086/C0069/C0082/C0083 /C0261 /C0261 SLLS067G − AUGUST 1990 − REVISED APRIL 2006

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description (continued) The SN55LBC176, SN65LBC176, SN65LBC176Q, and SN75LBC176 combine a 3-state, differential line driver and a differential input line receiver, both of which operate from a single 5-V power supply. The driver and receiver have active-high and active-low enables, respectively, which can externally connect together to function as a direction control. The driver differential outputs and the receiver differential inputs connect internally to form a differential input/output (I/O) bus port that is designed to offer minimum loading to the bus whenever the driver is disabled or V CC = 0. This port features wide positive and negative common-mode voltage ranges, making the device suitable for party-line applications. Very low device supply current can be achieved by disabling the driver and the receiver. These transceivers are suitable for ANSI Standard TIA/EIA−485 (RS-485) and ISO 8482 applications to the extent that they are specified in the operating conditions and characteristics section of this data sheet. Certain limits contained in TIA/EIA−485−A and ISO 8482:1987 (E) are not met or cannot be tested over the entire military temperature range. The SN55LBC176 is characterized for operation from −55°C to 125°C. The SN65LBC176 is characterized for operation from −40°C to 85°C, and the SN65LBC176Q is characterized for operation from −40°C to 125°C. The SN75LBC176 is characterized for operation from 0°C to 70°C. logic symbol† logic diagram (positive logic) EN1 B A R D RE D RE R 7 B A Bus EN2 DE DE † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. AVAILABLE OPTIONS TA PACKAGE PART NUMBER PART MARKING 0°C to 70°C SOP SN75LBC176D 7LB176 0°C to 70°C PDIP SN75LBC176P 75LBC176 −40°C to 85°C SOP SN65LBC176D 6LB176 −40°C to 85°C PDIP SN65LBC176P 65LBC176 −40°C to 110°C SOP SN65LBC176QD LB176Q −40°C to 110°C SOP SN65LBC176QDR LB176Q −55°C to 125°C LCCC SNJ55LBC176FK SNJ55LBC176FK −55°C to 125°C CDIP SNJ55LBC176JG SNJ55LBC176

/C0083/C0078/C0053/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0044 /C0083/C0078/C0054/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0044 /C0083/C0078/C0054/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0081/C0044 /C0083/C0078/C0055/C0053/C0076/C0066/C0067/C0049/C0055/C0054 /C0068/C0073/C0070/C0070/C0069/C0082/C0069/C0078/C0084/C0073/C0065/C0076 /C0066/C0085/C0083 /C0084/C0082/C0065/C0078/C0083/C0067/C0069/C0073/C0086/C0069/C0082/C0083 /C0261 /C0261 SLLS067G − AUGUST 1990 − REVISED APRIL 2006 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 schematics of inputs and outputs Input VCC EQUIVALENT OF D, RE , and DE INPUTS TYPICAL OF RECEIVER OUTPUT Output VCC VCC 100 kΩ NOM A Port Only 18 kΩ NOM 3 kΩ NOM A or B 100 kΩ NOM B Port Only 1.1 kΩ NOM TYPICAL OF A AND B I/O PORTS absolute maximum ratings† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values, except differential I/O bus voltage, are with respect to network ground terminal. DISSIPATION RATING TABLE PACKAGE THERMAL MODEL TA < 25°C POWER RATING DERATING FACTOR ABOVE T A = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING TA = 110°C POWER RATING D Low K† 526 mW 5.0 mW/°C 301 mW 226 mW — D High K‡ 882 mW 8.4 mW/ °C 504 mW 378 mW — P 840 mW 8.0 mW/°C 480 mW 360 mW — JG 1050 mW 8.4 mW/°C 672 mW 546 mW 210 mW FK 1375 mW 11.0 mW/°C 880 mW 715 mW 440 mW † In accordance with the low effective thermal conductivity metric definitions of EIA/JESD 51−3. ‡ In accordance with the high effective thermal conductivity metric definitions of EIA/JESD 51−7.

/C0083/C0078/C0053/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0044 /C0083/C0078/C0054/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0044 /C0083/C0078/C0054/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0081/C0044 /C0083/C0078/C0055/C0053/C0076/C0066/C0067/C0049/C0055/C0054 /C0068/C0073/C0070/C0070/C0069/C0082/C0069/C0078/C0084/C0073/C0065/C0076 /C0066/C0085/C0083 /C0084/C0082/C0065/C0078/C0083/C0067/C0069/C0073/C0086/C0069/C0082/C0083 /C0261 /C0261 SLLS067G − AUGUST 1990 − REVISED APRIL 2006

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recommended operating conditions MIN NOM MAX UNIT Supply voltage, VCC 4.75 5 5.25 V Voltage at any bus terminal (separately or common mode), VI or VIC −7 12 V High-level input voltage, VIH D, DE, and RE 2 V Low-level input voltage, VIL D, DE, and RE 0.8 V Differential input voltage, VID (see Note 2) −12 12 V High-level output current, IOH Driver −60 mA High-level output current, IOH Receiver −400 µA Low-level output current, IOL Driver 60 mALow-level output current, IOL Receiver 8 mA Junction temperature, TJ 140 °C SN55LBC176 −55 125 Operating free-air temperature, TA SN65LBC176 −40 85 °COperating free-air temperature, TA SN65LBC176Q −40 125 SN75LBC176 0 70 NOTE 2: Differential input/output bus voltage is measured at the noninverting terminal A with respect to the inverting terminal B.

/C0083/C0078/C0053/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0044 /C0083/C0078/C0054/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0044 /C0083/C0078/C0054/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0081/C0044 /C0083/C0078/C0055/C0053/C0076/C0066/C0067/C0049/C0055/C0054 /C0068/C0073/C0070/C0070/C0069/C0082/C0069/C0078/C0084/C0073/C0065/C0076 /C0066/C0085/C0083 /C0084/C0082/C0065/C0078/C0083/C0067/C0069/C0073/C0086/C0069/C0082/C0083 /C0261 /C0261 SLLS067G − AUGUST 1990 − REVISED APRIL 2006 5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DRIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN MAX UNIT VIK Input clamp voltage II = −18 mA −1.5 V VO Output voltage IO = 0 0 6 V | VOD1 | Differential output voltage IO = 0 1.5 6 V 55LBC176, | VOD2 | Differential output voltage R L = 54 Ω, See Figure 1, 55LBC176, 65LBC176, 1.1 V| VOD2 | Differential output voltage R L = 54 Ω, See Note 3 See Figure 1, 65LBC176, 65LBC176Q 1.1 VOD2 See Note 3 75LBC176 1.5 5 V = −7 V to 12 V, See Figure 2, 55LCB176, 65LCB176, 1.1 VOD3 Differential output voltage Vtest = −7 V to 12 V, See Note 3 See Figure 2, 65LCB176, 65LBC176Q 1.1 VOD3 See Note 3 75LBC176 1.5 5 ∆| VOD | Change in magnitude of differential output voltage† −0.2 0.2 V VOC Common-mode output voltage R L = 54 Ω or 100 Ω, See Figure 1 −1 3 V ∆| VOC | Change in magnitude of common-mode output voltage† R L = 54 Ω or 100 Ω, See Figure 1 −0.2 0.2 V IO Output current Output disabled, VO = 12 V 1 mAIO Output current Output disabled, See Note 4 VO = −7 V −0.8 mA IIH High-level input current VI = 2.4 V −100 µA IIL Low-level input current VI = 0.4 V −100 µA VO = −7 V −250 IOS Short-circuit output current VO = 0 −150 mAIOS Short-circuit output current VO = VCC 250 mA VO = 12 V 250 Receiver disabled 55LBC176, 65LBC176Q 1.75 ICC Supply current VI = 0 or VCC , Receiver disabled and driver enabled 65LBC176, 75LBC176 1.5 mAICC Supply current VI = 0 or VCC , No load Receiver and driver 55LBC176, 65LBC176Q 0.25 mA Receiver and driver disabled 65LBC176, 75LBC176 0.2 † ∆ | VOD | and ∆ | VOC | are the changes in magnitude of VOD and VOC , respectively, that occur when the input changes from a high level to a low level. NOTES: 3. This device meets the VOD requirements of TIA/EIA−485−A above 0°C only. 4. This applies for both power on and off; refer to TIA/EIA−485−A for exact conditions.

/C0083/C0078/C0053/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0044 /C0083/C0078/C0054/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0044 /C0083/C0078/C0054/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0081/C0044 /C0083/C0078/C0055/C0053/C0076/C0066/C0067/C0049/C0055/C0054 /C0068/C0073/C0070/C0070/C0069/C0082/C0069/C0078/C0084/C0073/C0065/C0076 /C0066/C0085/C0083 /C0084/C0082/C0065/C0078/C0083/C0067/C0069/C0073/C0086/C0069/C0082/C0083 /C0261 /C0261 SLLS067G − AUGUST 1990 − REVISED APRIL 2006

6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

switching characteristics over recommended ranges of supply voltage and operating free-air temperature PARAMETER TEST CONDITIONS SN55LBC176 SN65LBC176Q SN65LBC176 SN75LBC176 UNITPARAMETER TEST CONDITIONS MIN TYP MAX MIN TYP † MAX UNIT td(OD) Differential output delay time R L = 54 Ω C L = 50 pF, 8 31 8 25 ns tt(OD) Differential output transition timeR L = 54 Ω, See Figure 3 C L = 50 pF, 12 12 ns tsk(p) Pulse skew (| td(ODH) − td(ODL)|) See Figure 3 6 0 6 ns tPZH Output enable time to high levelR L = 110 Ω, See Figure 4 65 35 ns tPZL Output enable time to low levelR L = 110 Ω, See Figure 5 65 35 ns tPHZ Output disable time from high levelR L = 110 Ω, See Figure 4 105 60 ns tPLZ Output disable time from low levelR L = 110 Ω, See Figure 5 105 35 ns † All typical values are at VCC = 5 V, TA = 25°C. SYMBOL EQUIVALENTS DATA SHEET PARAMETER RS-485 VO Voa, Vob | VOD1 | Vo | VOD2 | Vt (RL = 54 Ω) | VOD3 | Vt (test termination measurement 2) VOC | Vos | IOS None IO Iia, Iib

/C0083/C0078/C0053/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0044 /C0083/C0078/C0054/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0044 /C0083/C0078/C0054/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0081/C0044 /C0083/C0078/C0055/C0053/C0076/C0066/C0067/C0049/C0055/C0054 /C0068/C0073/C0070/C0070/C0069/C0082/C0069/C0078/C0084/C0073/C0065/C0076 /C0066/C0085/C0083 /C0084/C0082/C0065/C0078/C0083/C0067/C0069/C0073/C0086/C0069/C0082/C0083 /C0261 /C0261 SLLS067G − AUGUST 1990 − REVISED APRIL 2006 7POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 RECEIVER SECTION electrical characteristics over recommended ranges of common-mode input voltage, supply voltage, and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP † MAX UNIT VIT+ Positive-going input threshold voltage VO = 2.7 V, IO = −0.4 mA 0.2 V VIT− Negative-going input threshold voltage VO = 0.5 V, IO = 8 mA −0.2‡ V Vhys Hysteresis voltage (VIT+ − VIT−) (see Figure 4) 50 mV VIK Enable-input clamp voltage II = −18 mA −1.5 V VOH High-level output voltage VID = 200 mV, IOH = −400 µA, 2.7 VVOH High-level output voltage VID = 200 mV, See Figure 6 IOH = −400 µA, 2.7 V VOL Low-level output voltage VID = −200 mV, IOL = 8 mA, 0.45 VVOL Low-level output voltage VID = −200 mV, See Figure 6 IOL = 8 mA, 0.45 V IOZ High-impedance-state output current VO = 0.4 V to 2.4 V −20 20 µA II Line input current Other input = 0 V,VI = 12 V 1 mAII Line input current Other input = 0 V, See Note 5 VI = −7 V −0.8 mA IIH High-level enable-input currentVIH = 2.7 V −100 µA IIL Low-level enable-input current VIL = 0.4 V −100 µA rI Input resistance 12 kΩ Receiver enabled and driver disabled 3.9 mA ICC Supply current VI = 0 or VCC , No load Receiver and SN55LBC176, SN65LBC176, 0.25ICC Supply current No load Receiver and driver disabled SN65LBC176, SN65LBC176Q 0.25 mAdriver disabled SN75LBC176 0.2 † All typical values are at VCC = 5 V, TA = 25°C. ‡ The algebraic convention, in which the less-positive (more-negative) limit is designated minimum, is used in this data sheet. NOTE 5: This applies for both power on and power off. Refer to ANSI Standard RS-485 for exact conditions. switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 15 pF PARAMETER TEST CONDITIONS SN55LBC176 SN65LBC176Q SN65LBC176 SN75LBC176 UNITPARAMETER TEST CONDITIONS MIN MAX MIN TYP † MAX UNIT tPLH Propagation delay time, low- to high-level single-ended output VID = −1.5 V to 1.5 V, 11 37 11 33 ns tPHL Propagation delay time, high- to low-level single-ended output VID = −1.5 V to 1.5 V, See Figure 7 11 37 11 33 ns tsk(p) Pulse skew (| tPLH − tPHL |) 10 3 6 ns tPZH Output enable time to high level See Figure 8 35 35 ns tPZL Output enable time to low level See Figure 8 35 30 ns tPHZ Output disable time from high level See Figure 8 35 35 ns tPLZ Output disable time from low level See Figure 8 35 30 ns † All typical values are at VCC = 5 V, TA = 25°C.

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Figure 1. Driver VOD and VOC Figure 2. Driver VOD3

1.5 VInput

Figure 3. Driver Test Circuit and Voltage Waveforms

0 V or 3 V

Figure 4. Driver Test Circuit and Voltage Waveforms

3 V or 0 V

Figure 5. Driver Test Circuit and Voltage Waveforms B. C L includes probe and jig capacitance.

10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Figure 8. Receiver Test Circuit and Voltage Waveforms B. C L includes probe and jig capacitance.

ΘJA can be used to compare the thermal performance of packages if the specific test conditions are defined and used. from die, through the mold compound into the copper block. junction temperatures are backed out. It can be used with ΘJB in 1-dimensional thermal simulation of a package system. defined for the high-k test card. Figure 1. Thermal Resistance

/C0083/C0078/C0053/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0044 /C0083/C0078/C0054/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0044 /C0083/C0078/C0054/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0081/C0044 /C0083/C0078/C0055/C0053/C0076/C0066/C0067/C0049/C0055/C0054 /C0068/C0073/C0070/C0070/C0069/C0082/C0069/C0078/C0084/C0073/C0065/C0076 /C0066/C0085/C0083 /C0084/C0082/C0065/C0078/C0083/C0067/C0069/C0073/C0086/C0069/C0082/C0083 /C0261 /C0261 SLLS067G − AUGUST 1990 − REVISED APRIL 2006

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D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

14 PINS SHOWN

0.228 (5,80) 0.244 (6,20) 0.069 (1,75) MAX 0.010 (0,25) 0.004 (0,10) 0.014 (0,35) 0.020 (0,51) A 0.157 (4,00) 0.150 (3,81) 0.044 (1,12) 0.016 (0,40) Seating Plane 0.010 (0,25) PINS ** 0.008 (0,20) NOM A MIN A MAX DIM Gage Plane 0.189 (4,80) (5,00) 0.197 (8,55) (8,75) 0.337 0.344 (9,80) 0.394 (10,00) 0.386 0.004 (0,10) M0.010 (0,25) 0.050 (1,27) 0°−/C0257 8° NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). D. Falls within JEDEC MS-012

/C0083/C0078/C0053/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0044 /C0083/C0078/C0054/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0044 /C0083/C0078/C0054/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0081/C0044 /C0083/C0078/C0055/C0053/C0076/C0066/C0067/C0049/C0055/C0054 /C0068/C0073/C0070/C0070/C0069/C0082/C0069/C0078/C0084/C0073/C0065/C0076 /C0066/C0085/C0083 /C0084/C0082/C0065/C0078/C0083/C0067/C0069/C0073/C0086/C0069/C0082/C0083 /C0261 /C0261 SLLS067G − AUGUST 1990 − REVISED APRIL 2006 13POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL INFORMATION FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 4040140/C 11/95

28 TERMINALS SHOWN

B 0.358 (9,09) MAX (11,63) 0.560 (14,22) 0.560 0.458 0.858 (21,8) 1.063 (27,0) (14,22) ANO. OF MINMAX 0.358 0.660 0.761 0.458 0.342 (8,69) MIN (11,23) (16,26) 0.640 0.740 0.442 (9,09) (11,63) (16,76) 0.962 1.165 (23,83) 0.938 (28,99) 1.141 (24,43) (29,59) (19,32)(18,78) 0.020 (0,51) TERMINALS 0.080 (2,03) 0.064 (1,63) (7,80) 0.307 (10,31) 0.406 (12,58) 0.495 (12,58) 0.495 (21,6) 0.850 (26,6) 1.047 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.035 (0,89) 0.010 (0,25) 121314151618 17 432 0.020 (0,51) 0.010 (0,25) 12826 27 B SQ A SQ 0.055 (1,40) 0.045 (1,14) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a metal lid. D. The terminals are gold-plated. E. Falls within JEDEC MS-004

/C0083/C0078/C0053/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0044 /C0083/C0078/C0054/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0044 /C0083/C0078/C0054/C0053/C0076/C0066/C0067/C0049/C0055/C0054/C0081/C0044 /C0083/C0078/C0055/C0053/C0076/C0066/C0067/C0049/C0055/C0054 /C0068/C0073/C0070/C0070/C0069/C0082/C0069/C0078/C0084/C0073/C0065/C0076 /C0066/C0085/C0083 /C0084/C0082/C0065/C0078/C0083/C0067/C0069/C0073/C0086/C0069/C0082/C0083 /C0261 /C0261 SLLS067G − AUGUST 1990 − REVISED APRIL 2006

14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE PACKAGE 0.310 (7,87) 0.290 (7,37) 0.014 (0,36) 0.008 (0,20) Seating Plane 4040107/C 08/96 0.065 (1,65) 0.045 (1,14) 0.020 (0,51) MIN 0.400 (10,20) 0.355 (9,00) 0.015 (0,38) 0.023 (0,58) 0.063 (1,60) 0.015 (0,38) 0.200 (5,08) MAX 0.130 (3,30) MIN 0.245 (6,22) 0.280 (7,11) 0.100 (2,54) 0°−15° NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification only on press ceramic glass frit seal only. E. Falls within MIL-STD-1835 GDIP1-T8

/C0077/C0069/C0067/C0072/C0065/C0078/C0073/C0067/C0065/C0076 /C0068/C0065/C0084/C0065 MPDI001A − JANUARY 1995 − REVISED JUNE 1999 15POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL INFORMATION P (R-PDIP-T8) PLASTIC DUAL-IN-LINE 0.015 (0,38) Gage Plane 0.325 (8,26) 0.300 (7,62) 0.010 (0,25) NOM MAX 0.430 (10,92) 4040082/D 05/98 0.200 (5,08) MAX 0.125 (3,18) MIN 0.355 (9,02) 0.020 (0,51) MIN 0.070 (1,78) MAX 0.240 (6,10) 0.260 (6,60) 0.400 (10,60) 0.015 (0,38) 0.021 (0,53) Seating Plane M0.010 (0,25) 0.100 (2,54) NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) 5962-9318301Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type 5962-9318301QPA ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type SN65LBC176D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65LBC176DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65LBC176DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65LBC176DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65LBC176P ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN65LBC176PE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN65LBC176QD ACTIVE SOIC D 8 75 TBD CU NIPDAU Level-1-220C-UNLIM SN65LBC176QDR ACTIVE SOIC D 8 2500 TBD CU NIPDAU Level-1-220C-UNLIM SN75LBC176D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75LBC176DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75LBC176DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75LBC176DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75LBC176P ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN75LBC176PE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SNJ55LBC176FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type SNJ55LBC176JG ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder PACKAGE OPTION ADDENDUM www.ti.com 12-Jan-2007 Addendum-Page 1

temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 12-Jan-2007 Addendum-Page 2

MCER001A – JANUARY 1995 – REVISED JANUARY 1997 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE 0.310 (7,87) 0.290 (7,37) 0.014 (0,36) 0.008 (0,20) Seating Plane 4040107/C 08/96 0.065 (1,65) 0.045 (1,14) 0.020 (0,51) MIN 0.400 (10,16) 0.355 (9,00) 0.015 (0,38) 0.023 (0,58) 0.063 (1,60) 0.015 (0,38) 0.200 (5,08) MAX 0.130 (3,30) MIN 0.245 (6,22) 0.280 (7,11) 0.100 (2,54) 0°–15° NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification. E. Falls within MIL STD 1835 GDIP1-T8

MLCC006B – OCTOBER 1996 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 4040140/D 10/96

28 TERMINAL SHOWN

B 0.358 (9,09) MAX (11,63) 0.560 (14,22) 0.560 0.458 0.858 (21,8) 1.063 (27,0) (14,22) ANO. OF MINMAX 0.358 0.660 0.761 0.458 0.342 (8,69) MIN (11,23) (16,26) 0.640 0.739 0.442 (9,09) (11,63) (16,76) 0.962 1.165 (23,83) 0.938 (28,99) 1.141 (24,43) (29,59) (19,32)(18,78) 0.020 (0,51) TERMINALS 0.080 (2,03) 0.064 (1,63) (7,80) 0.307 (10,31) 0.406 (12,58) 0.495 (12,58) 0.495 (21,6) 0.850 (26,6) 1.047 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.035 (0,89) 0.010 (0,25) 121314151618 17 432 0.020 (0,51) 0.010 (0,25) 12826 27 B SQ A SQ 0.055 (1,40) 0.045 (1,14) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a metal lid. D. The terminals are gold plated. E. Falls within JEDEC MS-004

MPDI001A – JANUARY 1995 – REVISED JUNE 1999 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 P (R-PDIP-T8) PLASTIC DUAL-IN-LINE 0.015 (0,38) Gage Plane 0.325 (8,26) 0.300 (7,62) 0.010 (0,25) NOM MAX 0.430 (10,92) 4040082/D 05/98 0.200 (5,08) MAX 0.125 (3,18) MIN 0.355 (9,02) 0.020 (0,51) MIN 0.070 (1,78) MAX 0.240 (6,10) 0.260 (6,60) 0.400 (10,60) 0.015 (0,38) 0.021 (0,53) Seating Plane M0.010 (0,25) 0.100 (2,54) NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm

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