L9997ND STMICROELECTRONICS | Alldatasheet

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Technical content

HALF BRIDGE OUTPUTS WITH TYPICAL R ON = 0.7Ω OUTPUT CURRENT CAPABILITY ±1.2A OPERATING SUPPLY VOLTAGE RANGE 7V TO 16.5V SUPPLY OVERVOLTAGE PROTECTION FUNCTION FOR V VS UP TO 40V VERY LOW QUIESCENT CURRENT IN STANDBY MODE < 1 µA CMOS COMPATIBLE INPUTS WITH HYS- TERESIS OUTPUT SHORT-CIRCUIT PROTECTION THERMAL SHUTDOWN REAL TIME DIAGNOSTIC: THERMAL OVER- LOAD, OVERVOLTAGE

DESCRIPTION

The L9997ND is a monolithic integrated driver, in BCD technology intended to drive various loads, including DC motors. The circuit is optimized for automotive electronics enviromental conditions. April 1999 OUT1 OUT2 GND IN1 IN2 EN DIAG 9 2 VS VS VS VS PROTECTION FUNCTIONS REFERENCE BIAS DRIVER 1 DRIVER 2 ENABLE M BLOCK DIAGRAM SO20 (12+4+4) ORDERING NUMBERS: L9997ND L9997ND013TR MULTIPOWER BCD TECHNOLOGY

Symbol Parameter Value Unit V VSDC DC Supply Voltage -0.3 to 26 V VVSP Supply Voltage Pulse (T < 400ms) 40 V IOUT DC Output Current ±1.8 A VIN1,2 DC Input Voltage -0.3 to 7 V V EN Enable Input Voltage -0.3 to 7 V VDIAG DC Output Voltage -0.3 to 7 V IOUT DC Output Short-circuit Current -0.3V < VOUT <V S + 0.3V internally limited IDIAG DC Sink Current -0.3V < VDG < 7V internally limited THERMAL DATA Symbol Parameter Value Unit TjTS Thermal Shut-down Junction Temperature 165 °C TjTSH Thermal Shut-down Threshold Hysteresis 25 K R th j-amb Thermal Resistance Junction-Ambient(1) 50 K/W R th j-pins Thermal Resistance Junction-Pins 15 K/W (1) With 6cm2 on board heatsink area. VS OUT2 N.C. GND GND GND GND N.C. IN2 IN1 N.C. GND GND GND GND N.C. OUT1 N.C.1 EN DIAG D95AT166 PIN CONNECTION (Top view) PIN FUNCTIONS N. Name Function

1 VS Supply Voltage

2 OUT2 Channel 2: Push-Pull power output with intrinsic body diode

3, 8, 13, 18,20 NC NC: Not Connected 4t o7 , 14 to 17 GND Ground: signal - and power - ground, heat sink

9 IN2 Input 2: Schmitt Trigger input with hysteresis (non-inverting signal control)

10 EN Enable: LOW or not connected on this input switches the device into standby mode and the

11 DIAG Diagnostic: Open Drain Output that switches LOW if overvoltage or overtemperature is

12 IN1 Input 1: Schmitt Trigger input with hysteresis (non-inverting signal control)

Table 1. Table function.

1 L X X Tristate Tristate OFF Standby Mode

2 H H H SRC SRC OFF Recommended for braking

3 H H L SRC SNK OFF

4 H L H SNK SRC OFF

5 H L L SNK SNK OFF

6 H X X Tristate Tristate ON Overvoltage or Overtemperature

The device is activated with enable input voltage HIGH. For enable input floating (not connected) or LOW the device is in Standby Mode. Very low quiescent current is defined for VEN < 0.3V. When activating or disactivating the device by the en- able input a wake-up time of 50µs is recom- mended. For braking of the motor the status 2 is recom- mended. The reason for this recommendation is that the device features higher threshold for ini- tialisation of parasitic structures than in state 5. The inputs IN1, IN2 features internal sink current generators of 10µA, disabled in standby mode. With these input current generators the input level is forced to LOW for inputs open. In this condition the outputs are in SNK state. The circuit features an overvoltage disable func- tion referred to the supply voltage V VS . This func- tion assures disabling the power outputs, when the supply voltage exceeds the over voltage threshold value of 19V typ. Both outputs are forced to tristate in this conditionand the diagnos- tic output is ON. The thermal shut-down disables the outputs (tris- tate) and activates the diagnostic when the junc- tion temperature increases above the thermal shut-down threshold temperature of min. 150°C. For the start of a heavy loaded motor, if the motor current reaches the max. value, it is necessary to respect the dynamical thermal resistance junction to ambient. The outputs OUT1 and OUT2 are pro- tected against short circuit to GND or V S, for sup- ply voltages up to the overvoltage disable thresh- old. The output power DMOS transistors works in lin- ear mode for an output current less than 1.2A. In- creasing the output load current (> 1.2A) the out- put transistor changes in the current regulation mode, see Fig.6, with the typical output current value below 2A. The SRC output power DMOS transistors requires a voltage drop ~3V to activate the current regulation. Below this voltage drop is the device also protected. The output current heat up the power DMOS transistor, the R DSON in- creases with the junction temperature and de- creases the output current. The power dissipation in this condition can activate the thermal shut- down . In the case of output disable due to ther- mal overload the output remains disabled untill the junction temperature decreases under the thermal enable threshold. Permanent short circuit condition with power dis- sipation leading to chip overheating and activation of the thermal shut-down leads to the thermal os- cillation. The junction temperature difference be- tween the switch ON and OFF points is the ther- mal hysteresis of the thermal protection. This hysteresis together with the thermal impedance and ambient temperature determines the fre- quency of this thermal oscillation, its typical val- ues are in the range of 10kHz. The open drain diagnostic output needs an exter- nal pull-up resistor to a 5V supply. In systems with several L9997ND the diagnostic outputs can be connected together with a common pull-up re- sistor. The DIAG output current is internally lim- ited. Fig. 1 shows a typical application diagram for the DC motor driving. To assure the safety of the cir- cuit in the reverse battery condition a reverse pro- tection diode D 1 is necessary. The transient pro- tection diode D2 must assure that the maximal supply voltage VVS during the transients at the VBAT line will be limited to a value lower than the absolute maximum rating for VVS . M VS C S IN1 IN2 GND DIAG1 CONTROL LOGIC 47KΩ IDIAG1 IIN1 IIN2 IEN EN D 2 VBAT D 1Is L9997ND OUT1 IM VM IOUT1 IOUT2 OUT2 GND Figure 1:Application Circuit Diagram. L9997ND

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics  1999 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com L9997ND