STL75NH3LL STMICROELECTRONICS | Alldatasheet

Document overview

  • Manufacturer or author: pROVIDED bY alldatasheet.com(free datasheet download site)
  • PDF pages: 12

Technical content

Datasheet sections

  • 1 Electrical ratings
  • 2 Electrical characteristics
  • 2.1 Electrical characteristics (curves)
  • 3 Test circuits
  • 4 Package mechanical data
  • 5 Revision history

Features

■ Improved die-to-footprint ratio ■ Very low profile package (1mm max) ■ Very low thermal resistance ■ Very low gate charge ■ Low threshold device Application ■ Switching applications

Description

This application specific Power MOSFET is the latest generation of STMicroelectronics unique “STripFET™” technology. The resulting transistor is optimized for low on-resistance and minimal gate charge. The chip-scaled PowerFLAT™ package allows a significant board space saving, still boosting the performance. Figure 1. Internal schematic diagram

  1. This value is according R thj-pcb

Table 1. Device summary

1 Electrical ratings

Table 2. Absolute maximum ratings

  1. The value is rated according R thj-C
  2. This value is according R thj-pcb
  3. Pulse width limited by safe operating area

Table 3. Thermal resistance

  1. When mounted on FR-4 board of 1inch 2, 2 oz Cu, t < 10 sec

2 Electrical characteristics

Table 4. On/off states Table 5. Dynamic

Table 6. Switching times Table 7. Source drain diode

  1. Pulsed: Pulse duration = 300µs, duty cycle 1.5%

2.1 Electrical characterist ics (curves)

Figure 2. Safe operating area Figure 3. Thermal impedance Figure 4. Output characteristics Figure 5. Transfer characteristics Figure 6. Normalized B VDSS vs temperature Figure 7. Static drain-source on resistance

3 Test circuits

Figure 13. Switching times test circuit for Figure 14. Gate charge test circuit Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test Figure 17. Unclamped inductive wavefo rm Figure 18. Switching time waveform

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com

DIM. mm. inch A1 0.02 0.05 0.0007 0.0019 A3 0.20 0.007 D 5.00 0.196 D1 4.75 0.187 E 6.00 0.236 E1 5.75 0.226 e 1.27 0.050 PowerFLAT™ (6x5) MECHANICAL DATA

5 Revision history

Table 8. Document revision history