L6728_0706 STMICROELECTRONICS | Alldatasheet
Document overview
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Technical content
Features
■ Flexible power supply from 5 V to 12 V ■ Power conversion input as low as 1.5 V ■ 0.8 V internal reference ■ 0.8 % output voltage accuracy ■ High-current integrated drivers ■ Power Good output ■ Sensorless and programmable OCP across low-side RDS(on) ■ OV / UV protections ■ VSEN disconnection protection ■ Oscillator internally fixed at 300 kHz ■ LSless to manage pre-bias start-up ■ Adjustable output voltage ■ Disable function ■ Internal soft-start ■ DFN10 package
Applications
■ Memory and termination supply ■ Subsystem power supply (MCH, IOCH, PCI...) ■ CPU and DSP power supply ■ Distributed power supply ■ General DC-DC converters
Description
L6728 is a single-phase step-down controller with integrated high-current drivers that provides complete control logic and protection to realize in a simple way general DC-DC converters by using a compact DFN10 package. Device flexibility allows managing conversions with power input V IN as low as 1.5 V and device supply voltage ranging from 5 V to 12 V. L6728 provides simple control loop with voltage mode EA. The integrated 0.8 V reference allows regulating output voltages with ±0.8 % accuracy over line and temperature variations. Oscillator is internally fixed to 300 kHz. L6728 provides programmable dual level over current protection as well as over and under voltage protection. Current information is monitored across the low-side MOSFET R DS(on) saving the use of expensive and space- consuming sense resistors. PGOOD output easily provides real-time information on output voltage status, through VSEN dedicated output monitor. DFN10 Table 1. Device summary
1 Typical application circuit and block diagram
1.1 Application circuit
Figure 1. Typical application circuit
1.2 Block diagram
Figure 2. Block diagram
2 Pin description and connection diagrams
2.1 Pin descriptions
Figure 3. Pin connection (top view) Table 2. Pins description and provide necessary bootstrap diode from VCC.
2 PHASE
HS driver return path, current-reading and adaptive-dead-time monitor. monitor when HS MOSFET is OFF . 3 UGATE HS driver output. Connect directly to HS MOSFET gate.
4 LGATE / OC
LGATE. LS driver output. Connect directly to LS MOSFET gate. VCC rising over UVLO threshold, a 10 µA current is sourced from this pin. threshold to be set at the maximum value. 5G N D All internal references, logic and drivers are connected to this pin. Connect to the PCB ground plane. 6V C C Device and drivers power supply. Operative range from 5 V to 12 V. Filter with at least 1 nF MLCC to GND.
7 COMP / DIS
compensate the device control loop. DIS. The device can be disabled by pushing this pin lower than 0.75 V(typ). Setting free the pin, the device enables again. Error amplifier inverting input. divider may be used to regulate voltages higher than the reference.
3 Thermal data
Table 3. Thermal data
9 VSEN
Regulated voltage sense pin for OVP and UVP protections and PGOOD. the regulated voltage is higher than the reference.
10 PGOOD
is outside the relative window. Pull up to a voltage equal or lower than VCC. If not used it can be left floating. Table 2. Pins description (continued)
4 Electrical specifications
4.1 Absolute maximum ratings
Table 4. Absolute maximum ratings
4.2 Electrical characteristics
Table 5. Electrical characteristics
- Guaranteed by design, not subject to test.
Table 5. Electrical characteristics (continued)
5 Device description
L6728 is a single-phase PWM controller with embedded high-current drivers that provides complete control logic and protections to realize in an easy and simple way a general DC- DC step-down converter. Designed to drive N-channel MOSFETs in a synchronous buck topology, with its high level of integration this 10-pin device allows reducing cost and size of the power supply solution also providing real-time PGOOD in a compact DFN10 3x3 mm. L6728 is designed to operate from a 5 V or 12 V supply. The output voltage can be precisely regulated to as low as 0.8 V with ±0.8 % accuracy over line and temperature variations. The switching frequency is internally set to 300 kHz. This device provides a simple control loop with a voltage-mode error-amplifier. The error- amplifier features a 15 MHz gain-bandwidth product and 8V/µs slew rate, allowing high regulator bandwidth for fast transient response. To avoid load damages, L6728 provides over current protection as well as over voltage, under voltage and feedback disconnection protection. The over current trip threshold is programmable by a simple resistor connected from Lgate to GND. Output current is monitored across low-side MOSFET R DS(on), saving the use of expensive and space- consuming sense resistor. Output voltage is monitored through dedicated VSEN pin. L6728 implements soft-start increasing the internal reference in closed loop regulation. Low-side-less feature allows the device to perform soft-start over pre-biased output avoiding high current return through the output inductor and dangerous negative spike at the load side. L6728 is available in a compact DFN10 3x3 mm package with exposed pad.
6 Driver section
The integrated high-current drivers allow using different types of power MOSFET (also multiple MOSFETs to reduce the equivalent RDS(on)), maintaining fast switching transition. The driver for the high-side MOSFET uses BOOT pin for supply and PHASE pin for return. The driver for low-side MOSFET uses the VCC pin for supply and GND pin for return. The controller embodies an anti-shoot-through and adaptive dead-time control to minimize low side body diode conduction time, maintaining good efficiency while saving the use of Schottky diode:
- to check high-side MOSFET turn off, PHASE pin is sensed. When the voltage at PHASE pin drops down, the low-side MOSFET gate drive is suddenly applied;
- to check low-side MOSFET turn off, LGATE pin is sensed. When the voltage at LGATE has fallen, the high-side MOSFET gate drive is suddenly applied. If the current flowing in the inductor is negative, voltage on PHASE pin will never drop. To allow the low-side MOSFET to turn-on even in this case, a watchdog controller is enabled: if the source of the high-side MOSFET doesn't drop, the low side MOSFET is switched on so allowing the negative current of the inductor to recirculate. This mechanism allows the system to regulate even if the current is negative. Power conversion input is flexible: 5 V, 12 V bus or any bus that allows the conversion (See maximum duty cycle limitations) can be chosen freely.
6.1 Power dissipation
L6728 embeds high current MOSFET drivers for both high side and low side MOSFETs: it is then important to consider the power that the device is going to dissipate in driving them in order to avoid overcoming the maximum junction operative temperature. Two main terms contribute in the device power dissipation: bias power and drivers' power.
- Device bias power (PDC) depends on the static consumption of the device through the supply pins and it is simply quantifiable as follow (assuming to supply HS and LS drivers with the same VCC of the device):
- Drivers power is the power needed by the driver to continuously switch on and off the external MOSFETs; it is a function of the switching frequency and total gate charge of the selected MOSFETs. It can be quantified considering that the total power P SW dissipated to switch the MOSFETs (easy calculable) is dissipated by three main factors: external gate resistance (when present), intrinsic MOSFET resistance and intrinsic driver resistance. This last term is the important one to be determined to calculate the device power dissipation. The total power dissipated to switch the MOSFETs results: External gate resistors helps the device to dissipate the switching power since the same power P SW will be shared between the internal driver impedance and the external resistor resulting in a general cooling of the device. PDC VCC ICC IBOOT+()⋅= PSW FSW QgHS VBOOT QgLS VCC⋅+⋅()⋅=
7 Soft-start
charging the output capacitors to the final regulation voltage. side gates. This condition is latched, cycle VCC to recover. and over current threshold setting phase has been completed.
7.1 Low-side-less start up (LSLess)
output to the final regulation value. view: protections by-pass this turning ON the LS MOSFET in case of need. Figure 4. LSLess start up (left) vs non-LSLess start up (right)
Over current protection L6728
8 Over current protection
The over current function protects the converter from a shorted output or overload, by sensing the output current information across the low side MOSFET drain-source on- resistance, RDS(on). This method reduces cost and enhances converter efficiency by avoiding the use of expensive and space-consuming sense resistors. The low side RDS(on) current sense is implemented by comparing the voltage at the PHASE node when LS MOSFET is turned on with the programmed OCP thresholds voltages, internally held. If the monitored voltage is bigger than these thresholds, an over current event is detected. For maximum safety and load protection, L6728 implements a dual level over current protection system:
- 1st level threshold: it is the user externally set threshold. If the monitored voltage on PHASE exceeds this threshold, a 1st level over current is detected. If four 1st level OC events are detected in four consecutive switching cycles, over current protection will be triggered.
- 2nd level threshold: it is an internal threshold whose value is equal to 1st level threshold multiplied by a factor 1.5. If the monitored voltage on PHASE exceeds this threshold, over current protection will be triggered immediately. When over current protection is triggered, the device turns off both LS and HS MOSFETs in a latched condition. To recover from over current protection triggered condition, VCC power supply must be cycled.
L6728 Over current protection
8.1 Over current threshold setting
L6728 allows to easily program a 1st level over current threshold ranging from 50 mV to 550 mV, simply by adding a resistor (ROCSET) between LGATE and GND. 2nd level threshold will be automatically set accordingly. During a short period of time (about 5 ms) following VCC rising over UVLO threshold, an internal 10 µA current (IOCSET) is sourced from LGATE pin, determining a voltage drop across ROCSET. This voltage drop will be sampled and internally held by the device as 1st level over current threshold. The OC setting procedure overall time length is about 5 ms. Connecting a ROCSET resistor between LGATE and GND, the programmed 1st level threshold will be: the programmed 2nd level threshold will be: ROCSET values range from 5 kΩ to 55 kΩ. In case ROCSET is not connected, the device sets the OCP thresholds to the maximum values: an internal safety clamp on LGATE is triggered as soon as LGATE voltage reaches 600 mV, setting the maximum threshold and suddenly ending OC setting phase. IOCth1 IOCSET ROCSET⋅ RdsON IOCth2 1.5 IOCSET ROCSET⋅ RdsON
Output voltage setting and protections L6728
9 Output voltage setting and protections
L6728 is capable to precisely regulate an output voltage as low as 0.8 V. In fact, the device comes with a fixed 0.8 V internal reference that guarantee the output regulated voltage to be within ±0.8 % tolerance over line and temperature variations (excluding output resistor divider tolerance, when present). Output voltage higher than 0.8 V can be easily achieved by adding a resistor R OS between FB pin and ground. Referring to Figure 1, the steady state DC output voltage will be: where VREF is 0.8 V. L6728 monitors the voltage at VSEN pin and compares it to internal reference voltage in order to provide under voltage and over voltage protections as well as PGOOD signal. According to the level of VSEN, different actions are performed from the controller:
- PGOOD If the voltage monitored through VSEN exits from the PGOOD window limits, the device de-asserts the PGOOD signal still continuing switching and regulating. PGOOD is asserted at the end of the soft-start phase.
- Under voltage protection If the voltage at VSEN pin drops below UV threshold, the device turns off both HS and LS MOSFETs, latching the condition. Cycle VCC to recover.
- Over voltage protection If the voltage at VSEN pin rises over OV threshold (1 V typ), over voltage protection turns off HS MOSFET and turns on LS MOSFET. The LS MOSFET will be turned off as soon as VSEN goes below Vref/2 (0.4 V). The condition is latched, cycle VCC to recover. Notice that, even if the device is latched, the device still controls the LS MOSFET and can switch it on whenever VSEN rises above OV threshold.
- Feedback disconnection protection In order to provide load protection even if VSEN pin is not connected, a 100 nA bias current is always sourced from this pin. If VSEN pin is not connected, this current will permanently pull it up causing the device to detect an OV: thus LS will be latched on preventing output voltage from rising out of control. VOUT VREF 1 RFB ROS ⎛⎞⋅=
10.1 Compensation network
can be neglected in control loop calculation). amplitude. This waveform is filtered by the output filter. Figure 5. PWM control loop function ideally equal to -ZF/ZFB. high bandwidth and good phase margin. has to cross 0 dB axis with -20 dB/decade slope. As an example, Figure 6 shows an asymptotic bode plot of a type III compensation.
Figure 6. Example of type III compensation
- Open loop converter singularities:
- Compensation network singularities frequencies: To place the poles and zeroes of the compensation network, the following suggestions may be followed: a) Set the gain R F/RFB in order to obtain the desired closed loop regulator bandwidth according to the approximated formula (suggested values for RFB are in the range of some kΩ): Gain [dB] Log (Freq)0dB open loop EA gain closed loop gain compensation gain open loop converter gain FLC FESR FZ1 FZ2 FP1 FP2 20log (RF/RFB) 20log (VIN/∆VOSC) F0dB FLC 2π LC OUT⋅ FESR FZ1 FZ2 FP1 2π RF CF CP⋅ ⎛⎞⋅⋅ FP2 RF RFB F0dB FLC VIN
b) Place F Z1 below FLC (typically 0.5*FLC): c) Place F P1 at FESR: d) Place F Z2 at FLC and FP2 at half of the switching frequency: e) Check that compensation network gain is lower than open loop EA gain before F0dB; f) Check phase margin obtained (it should be greater than 45°) and repeat if necessary.
10.2 Layout guidelines
L6728 provides control functions and high current integrated drivers to implement high- current step-down DC-DC converters. In this kind of application, a good layout is very important. The first priority when placing components for these applications has to be reserved to the power section, minimizing the length of each connection and loop as much as possible. To minimize noise and voltage spikes (EMI and losses) power connections (highlighted in Figure 7) must be a part of a power plane and anyway realized by wide and thick copper traces: loop must be anyway minimized. The critical components, i.e. the power MOSFETs, must be close one to the other. The use of multi-layer printed circuit board is recommended. The input capacitance (C IN), or at least a portion of the total capacitance needed, has to be placed close to the power section in order to eliminate the stray inductance generated by the copper traces. Low ESR and ESL capacitors are preferred, MLCC are suggested to be connected near the HS drain. Use proper VIAs number when power traces have to move between different planes on the PCB in order to reduce both parasitic resistance and inductance. Moreover, reproducing the same high-current trace on more than one PCB layer will reduce the parasitic resistance associated to that connection. Connect output bulk capacitors (C OUT) as near as possible to the load, minimizing parasitic inductance and resistance associated to the copper trace, also adding extra decoupling capacitors along the way to the load when this results in being far from the bulk capacitors bank. CF CP CF RS RFB FSW 2F⋅ LC CS
11.1 Inductor design
inductor, with VIN = 5 V and VIN = 12 V. has not finished its charging time, the output current is supplied by the output capacitors. reached, the response time is limited by the time required to change the inductor current. Figure 9. Inductor current ripple vs output voltage
Application information L6728
11.2 Output capacitor(s)
The output capacitors are basic components to define the ripple voltage across the output and for the fast transient response of the power supply. They depend on the output voltage ripple requirements, as well as any output voltage deviation requirement during a load transient. During steady-state conditions, the output voltage ripple is influenced by both the ESR and capacitive value of the output capacitors as follow: Where ∆I L is the inductor current ripple. In particular, the expression that defines ∆VOUT_C takes in consideration the output capacitor charge and discharge as a consequence of the inductor current ripple. During a load variation, the output capacitors supplies the current to the load or absorb the current stored into the inductor until the converter reacts. In fact, even if the controller recognizes immediately the load transient and sets the duty cycle at 80 % or 0 %, the current slope is limited by the inductor value. The output voltage has a drop that also in this case depends on the ESR and capactive charge/discharge as follow: Where ∆V L is the voltage applied to the inductor during the transient response ( for the load appliance or V OUT for the load removal). MLCC capacitors have typically low ESR to minimize the ripple but also have low capacitance that do not minimize the voltage deviation during dynamic load variations. On the contrary, electrolytic capacitors have big capacitance to minimize voltage deviation during load transients while they does not show the same ESR values of the MLCC resulting then in higher ripple voltages. For these reasons, a mix between electrolytic and MLCC capacitor is suggeted to minimize ripple as well as reducing voltage deviation in dynamic mode.
11.3 Input capacitors
The input capacitor bank is designed considering mainly the input rms current that depends on the output deliverable current (I OUT) and the duty-cycle (D) for the regulation as follow: The equation reaches its maximum value, IOUT/2, with D = 0.5. The losses depends on the input capacitor ESR and, in worst case, are: ∆VOUT_ESR ∆IL ESR⋅= ∆VOUT_C ∆IL ∆VOUT_ESR ∆IOUT ESR⋅= ∆VOUT_C ∆IOUT L ∆IOUT⋅ DMAX VIN VOUT–⋅ Irms IOUT D1 D –()⋅⋅= PE S R I OUT 2⁄() 2⋅=
20 A demonstration board L6728
Figure 13. 20 A demonstration board schematic
Table 6. 20 A demonstration board - bill of material
1 C10 MLCC, 100 nF , 16V, X7R SMD0603
2 C14, C38 MLCC, 1 µF , 16V, X7R SMD0805
1 C35 MLCC, 68 pF , X7R
4 R1, R2, R20, R17 Resistor, 3R3, 1/16W, 1 % SMD0603
4 R3, R5, R11, R16 Resistor, 0R, 1/8W, 1 %
1 R4 Resistor, 1R8, 1/8W, 1 %
2 R6, R9 Resistor, 2K2, 1/16W, 1 %
2 R8, R13 Resistor, 3K9, 1/16W, 1 %
1 R7 Resistor, 18K, 1/16W, 1 %
1 R19 Resistor, 22K, 1/16W, 1 %
1 R18 Resistor, 20K, 1/16W, 1 %
1 D1 Diode, 1N4148 or BAT54 SOT23
1 Q5 STD70N02L
1 Q7 STD95NH02LT4
1 U1 Controller, L6728 DFN10, 3x3 mm
12.1 Board description
12.1.1 Power input (Vin)
input. This voltage can range from 1.5 V to 12 V bus. and in this case the R16 (0 Ω) resistor must be present.
12.1.2 Output (Vout)
12.1.3 Signal input (Vcc)
Using the input voltage Vin to supply the controller no power is required at this input. input (4.5-12 V) and, in this case, the R16 (0 Ω) resistor must be unsoldered.
12.1.4 Test points
– HGATE: High-side gate pin of the device.
12.1.5 Board characterization
Figure 14. 20 A demonstration board efficiency
5 A demonstration board L6728
Figure 17. 5 A demonstration board schematic
Table 7. 5 A demonstration board - bill of material
13.1 Board description
13.1.1 Power input (Vin)
input. This voltage can range from 1.5 V to 12 V bus.
2 C12, C51 MLCC, 10 µF, 2 5 V, X 5 R
1 C10 MLCC, 100 nF , 16 V, X7R SMD0603
2 C14, C38 MLCC, 1 µF , 16 V, X7R SMD0805
1 C35 MLCC, 220 pF , X7R
3 R1, R2, R17 Resistor, 3R3, 1/16 W, 1 % SMD0603
3 R3, R5, R16 Resistor, 0R, 1/16 W, 1 % SMD0603
1 R4 Resistor, 1R8, 1/8 W, 1 % SMD0805
1 R14 Resistor, 15R, 1/16 W, 1 % SMD0603
2 R6, R9 Resistor, 2K2, 1/16 W, 1 %
2 R8, R13 Resistor, 3K9, 1/16 W, 1 %
1 R7 Resistor, 4K7, 1/16 W, 1 %
1 R19 Resistor, 22K, 1/16 W, 1 %
1 R18 Resistor, 10K, 1/16 W, 1 %
1 D1 Diode, BAT54 SOT23
1 Q5 STS9D8NH3LL SO8
and in this case the R16 (0Ω) resistor must be present.
13.1.2 Output (Vout)
13.1.3 Signal input (Vcc)
Using the input voltage Vin to supply the controller no power is required at this input. input (4.5-12 V) and, in this case, the R16 (0 Ω) resistor must be unsoldered.
13.1.4 Test points
– HGATE: High-side gate pin of the device.
13.1.5 Board characterization
Figure 18. 5 A demonstration board efficiency
conditions are also marked on the inner box label. ECOPACK is an ST trademark. Figure 19. Package dimensions Table 8. DFN10 mechanical data
Table 9. Document revision history