L6564TD STMICROELECTRONICS | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 33
Technical content
Datasheet sections
- 1 Description
- 2 Maximum ratings
- 2.1 Absolute maximum ratings
- 2.2 Thermal data
- 3 Pin connection
- 4 Electrical characteristics
- 5 Typical electrical performance
- 6 Application information
- 6.1 Overvoltage protection
- 6.2 Feedback failure protection (FFP)
- 6.3 Voltage feedforward
- 6.4 THD optimizer circuit
- 6.5 Inductor saturation detection
- 6.6 Power management/housekeeping functions
- 7 Application examples and ideas
- 8 Package mechanical data
- 9 Ordering codes
- 10 Revision history
Features
■ Guaranteed for extreme temperature range (outdoor) ■ Fast “bi-directional” input voltage feedforward (1/V 2 correction) ■ Accurate adjustable output overvoltage protection ■ Protection against feedback loop disconnection (latched shutdown) ■ Inductor saturation protection ■ AC brownout detection ■ Low (≤ 100 µA) startup current ■ 6 mA max. operating bias current ■ 1% (@ TJ = 25 °C) internal reference voltage ■ -600/+800 mA totem pole gate driver with active pull-down during UVLO ■ SSOP10 package
Applications
■ PFC pre-regulators for: – High-end AC-DC adapter/charger – Desktop PC, server, web server – IEC61000-3-2 or JEITA-MITI compliant SMPS ■ SMPS for LED luminaires Figure 1. Block diagram
1 Description
The L6564T is a current-mode PFC controller operating in transition mode (TM) and represents the compact version of the L6563S as it embeds the same driver, reference and control stages in a very compact 10-pin SO package. The highly linear multiplier, along with a special correction circuit that reduces crossover distortion of the mains current, allows wide-range-mains operation with an extremely low THD even over a large load range. The output voltage is controlled by means of a voltage-mode error amplifier and an accurate (1% @T J = 25 °C) internal voltage reference. The loop stability is optimized by the voltage feedforward function (1/V2 correction), which in this IC uses a proprietary technique that also considerably improves line transient response in case of both mains drops and surges (“bidirectional”). In addition to overvoltage protection able to control the output voltage during transient conditions, the IC also provides protection against feedback loop failures or erroneous settings. Other on-board protection functions allow brownout conditions and boost inductor saturation to be safely handled. The totem-pole output stage, capable of a 600 mA source and 800 mA sink current, is suitable for a high power MOSFET or IGBT drive. This, combined with the other features and the possibility to operate with ST's proprietary fixed-off-time control, makes the device an excellent solution for SMPS up to 400 W that requires compliance with EN61000-3-2 and JEITA-MITI standards.
2 Maximum ratings
2.1 Absolute maximum ratings
2.2 Thermal data
Table 1. Absolute maximum ratings Table 2. Thermal data
3 Pin connection
Figure 2. Pin connection Table 3. Pin description regulator is fed into the pin through a resistor divider. The pin normally features high impedance. 1) to achieve stability of the voltage control loop and ensure high power factor and low THD. below 2.4 V the gate driver output is inhibited (burst-mode operation). also to derive the information on the RMS mains voltage. converter and limits the stress of the power components. voltage on pin MULT (3), compensates the control loop gain dependence on the mains voltage. at the pin goes above 0.88 V.
voltage of the PFC pre-regulator through a resistor divider and is used for protection purposes. voltage on the pin must go above 0.27 V. This can be used as a remote on/off control input. edge triggers MOSFET’s turn-on. 8 GND Ground. Current return for both the signal part of the IC and the gate driver. clamped at about 12 V to avoid excessive gate voltages.
10 Vcc
Table 3. Pin description (continued)
4 Electrical characteristics
RFF = 1 MΩ between pin VFF and GND; unless otherwise specified. Table 4. Electrical characteristics
Table 4. Electrical characteristics (continued)
- Parameters tracking each other.
- The multiplier output is given by:
- Parameters tracking each other.
5 Typical electrical performance
Figure 3. IC consumption vs. V CC Figure 4. IC consumption vs. T J Figure 5. Vcc Zener voltage vs. T J Figure 6. Startup and UVLO vs. T J
6 Application information
6.1 Overvoltage protection
larger than the maximum Vo that can be expected. Figure 27. Output voltage setting, OVP and FFP functions: internal block diagram
6.2 Feedback failure protection (FFP)
The OVP function described above handles “normal” overvoltage conditions, i.e. those resulting from an abrupt load/line change or occurring at startup. In case the overvoltage is generated by a feedback disconnection, for instance when the upper resistor of the output divider (R1) fails to open, the comparator detects the voltage at pin INV. If the voltage is lower than 1.66 V and the OVP is active, the FFP is triggered, the gate drive activity is immediately stopped, the device is shut down, its quiescent consumption is reduced below 180 µA and the condition is latched as long as the supply voltage of the IC is above the UVLO threshold. To restart the system it is necessary to recycle the input power, so that the Vcc voltage of the L6564T goes below 6 V. The pin PFC_OK doubles its function as a not-latched IC ‘Disable’: a voltage below 0.23 V shuts down the IC, reducing its consumption below 2 mA. To restart the IC simply let the voltage at the pin go above 0.27 V. Note that these functions offer complete protection against not only feedback loop failures or erroneous settings, but also against a failure of the protection itself. Either resistor of the PFC_OK divider failing short or open or a PFC_OK pin floating results in shutting down the IC and stopping the pre-regulator.
6.3 Voltage feedforward
The power stage gain of PFC pre-regulators varies with the square of the RMS input voltage. So does the crossover frequency FC of the overall open-loop gain because the gain has a single pole characteristic. This leads to a large trade-off in the design. For example, setting the gain of the error amplifier to get FC = 20 Hz @ 264 Vac means having FC 4 Hz @ 88 Vac, resulting in a sluggish control dynamics. Additionally, the slow control loop causes large transient current flow during rapid line or load changes that are limited by the dynamics of the multiplier output. This limit is considered when selecting the sense resistor to let the full load power pass under minimum line voltage conditions, with some margin. But a fixed current limit allows excessive power input at high line, whereas a fixed power limit requires the current limit to vary inversely with the line voltage. Voltage feedforward can compensate for the gain variation with the line voltage and allow the minimizing of all the above-mentioned issues. It consists in deriving a voltage proportional to the input RMS voltage, feeding this voltage into a squarer/divider circuit (1/V corrector) and providing the resulting signal to the multiplier that generates the current reference for the inner current control loop (see Figure 28).
Figure 28. Voltage feedforward: squarer/divider (1/V 2) block diagram and transfer characteristic significantly improves dynamic behavior at low line and simplifies loop design. voltage changes. Clearly a trade-off was required.
must be lower than the minimum line drop detection threshold (∆VFF_min = 40 mV). floating or connected directly to ground. Figure 29. R FF·CFF as a function of 3rd harmonic distortion introduced in the input
3 CRf2
6.4 THD optimizer circuit
current flow to temporarily stop. near the line voltage zero-crossings as compared to that commanded by the control loop. discharging the high-frequency filter capacitor after the bridge. Figure 30 shows the internal block diagram of the THD optimizer circuit. Figure 30. THD optimizer circuit
Figure 31. THD optimization: standard TM PFC controller (left side) and L6564T (right side) offset added to the output of the multiplier in the proximity of the line voltage zero-crossings. high line where the energy transfer gets worse. PFC controller are compared to those of this chip. effectiveness of the optimizer circuit.
6.5 Inductor saturation detection
power, which leads to a catastrophic failure after few switching cycles.
demand. This happens when the restart occurs at an unfavorable line voltage phase, i.e. current and, furthermore, there is little or no voltage available for demagnetization. and boost diode. Hence, the system safety is considerably increased. Figure 32. Effect of boost inductor saturation on the MOSFET current and detection method
6.6 Power management/housekeeping functions
Figure 32. Needless to say, both controllers and enables/disables the operation of the PFC stage. Figure 33. Interface circuits that let DC-DC converter's controller IC disable the mentioned working conditions that cause the device to stop operating.
Table 5. Summary of L6564 idle states
7 Application examples and ideas
Figure 34. Demonstration board EVL6564-100W, wide-range mains: electrical schematic
8 Package mechanical data
specifications, grade definitions and product status are available at: www.st.com. Table 6. SSO10 mechanical data
Figure 39. SSO10 package dimensions
9 Ordering codes
Table 7. Ordering information
Table 8. Document revision history