LMH6514 NSC | Alldatasheet

Document overview

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Technical content

Features

■ Adjustable gain with a 42 dB range ■ Precise 6.02 dB gain steps ■ Parallel 3 bit gain control ■ On chip register gain setting ■ Fully differential signal path ■ Single ended to differential capable ■ 200Ω input impedance ■ Small footprint (4 mm x 4 mm) LLP package Key Specifications ■ 600 MHz bandwidth at 100Ω load ■ 39 dBm OIP3 at 75 MHz, 200Ω load ■ 26 dB to 38 dB maximum gain ■ Selectable output impedance of 200Ω or 400Ω. ■ 8.3 dB noise figure ■ 5 ns gain step switching time ■ 100 mA supply current

Applications

■ Cellular base stations ■ IF sampling receivers ■ Instrumentation ■ Modems ■ Imaging ■ Differential line receiver Typical Application 30042901 LMH™ is a trademark of National Semiconductor Corporation. © 2008 National Semiconductor Corporation 300429 www.national.com LMH6514 600 MHz, Digital Controlled, Variable Gain Amplifier

Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 2) Human Body Model 2 kV Machine Model 150V Positive Supply Voltage (Pin 3) −0.6V to 5.5V Output Voltage (Pin 14,15) −0.6V to 6.8V Differential Voltage between Any Two Grounds <200 mV Analog Input Voltage Range −0.6V to VCC Digital Input Voltage Range −0.6V to 3.6V Output Short Circuit Duration (one pin to ground) Infinite Junction Temperature +150°C Storage Temperature Range −65°C to +150°C Soldering Information Infrared or Convection (20 sec) 235°C Wave Soldering (10 sec) 260°C Operating Ratings (Note 1) Supply Voltage (Pin 3) 4V to 5.25V Output Voltage Range (Pin 14, 15) 1.4V to 6.4V Differential Voltage Between Any Two Grounds <10 mV Analog Input Voltage Range, AC Coupled ±1.4V Temperature Range (Note 3) −40°C to +85°C Package Thermal Resistance (θJA) 16-Pin LLP 47°C/W The following specifications apply for single supply with VCC = 5V, Maximum Gain , RL = 100Ω (200Ω external || 200Ω internal), VOUT = 2 VPP, fin = 150 MHz. Boldface limits apply at temperature extremes. Symbol Parameter Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units Dynamic Performance SSBW −3 dB Bandwidth Average of all Gain Settings 600 MHz Noise and Distortion Third Order Intermodulation Products f = 75 MHz, V OUT = 2 VPP −70 dBc f = 150 MHz, V OUT = 2 VPP −66 f = 250 MHz, V OUT = 2 VPP −60 f = 450 MHz, V OUT = 2 VPP −52 OIP3 Output Third Order Intercept Point f = 75 MHz, V OUT = 2 VPP, Tone Spacing = 0.5 MHz dBm f = 150 MHz, V OUT = 2 VPP, Tone Spacing = 2 MHz f = 250 MHz, V OUT = 2 VPP, Tone Spacing = 2 MHz f = 75 MHz, RL= 200Ω, V OUT = 2 VPP Tone Spacing = 0.5 MHz f = 150 MHz, RL = 200Ω, V OUT = 2 VPP, Tone Spacing = 2 MHz f = 250 MHz, RL = 200Ω, V OUT = 2 VPP, Tone Spacing = 2 MHz P1 dB Output Level for 1 dB Gain Compression f = 75 MHz, R L = 200Ω 16.7 dBmf = 250 MHz, R L = 200Ω 14.7 f = 75 MHz 14.5 f = 450 MHz 13.2 VNI Input Noise Voltage Maximum Gain, f = 40 MHz 1.8 nV/ VNO Output Noise Voltage Maximum Gain, f = 40 MHz 36 nV/ NF Noise Figure Maximum Gain 8.3 dB Analog I/O Differential Input Resistance 165 158 188 220 230 Ω Input Common Mode Resistance 825 785 955 1120 1160 Ω www.national.com 2 LMH6514

Symbol Parameter Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units Differential Output Resistance Low Gain Option 186 ΩHigh Gain Option 330 325 370 420 425 Internal Load Resistors Between Pins 13, 14 and Pins 15, 16 165 158 187 215 225 Ω Input Signal Level (AC Coupled) Max Gain, VO = 2 VPP, RL = 1 kΩ 63 mVPP Maximum Differential Input Signal AC Coupled 5.6 VPP Input Common Mode Voltage Self Biased 1.3 1.1 1.4 1.5 1.7 V Input Common Mode Voltage Range Driven Externally 0.9 to 2.0 V Minimum Input Voltage DC 0 V Maximum Input Voltage DC 3.3 V Maximum Differential Output Voltage Swing VCC = 5V, Output Common Mode = 5V 5.5 VPP VOS Output Offset Voltage All Gain Settings −21 mV CMRR Common Mode Rejection Ratio Maximum Gain 81 dB PSRR Power Supply Rejection Ratio Maximum Gain 63 81 dB Gain Parameters Maximum Gain DC, Internal RL = 186Ω, External RL = 1280Ω 29.3 28.7 30 30.3 30.9 dB Minimum Gain DC, Internal RL = 186Ω, External RL = 1280Ω −12.75 −13.15 −12 −11.85 −11.45 dB Gain Step Size DC 6.02 dB Gain Step Error DC 0.02 dBf = 150 MHz 0.07 Cumulative Gain Step Error DC, Gain Step 7 to Gain Step 0 −0.35 −0.50 0.02 0.30 0.45 dB Gain Step Switching Time 5 ns Digital Inputs/Timing Logic Compatibility CMOS Logic 3.3 V VIL Logic Input Low Voltage 0.8 V VIH Logic Input High Voltage 2.0 V IIH Logic Input High Input Current Digital Input Voltage = 3.3V 33 40 μA TSU Setup Time 3 ns THOLD Hold Time 3 ns TPW Minimum Latch Pulse Width 10 ns Power Requirements ICC Total Supply Current VOUT = 0V Differential, VOUT Common Mode = 5V 107 124 134 mA Amplifier Supply Current Pin 3 Only 56 66 74 mA Output Stage Bias Currents Pins 13, 14 and Pins 15, 16; VOUT Common Mode = 5 V 51 58 60 mA 3 www.national.com LMH6514

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications, see the Electrical Characteristics tables. Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC). Note 3: The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board. Note 4: Electrical Table values apply only for factory testing conditions at the temperature indicated. No guarantee of parametric performance is indicated in the electrical tables under conditions different than those tested Note 5: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. Note 6: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control (SQC) methods. Note 7: Negative input current implies current flowing out of the device. Note 8: Drift determined by dividing the change in parameter at temperature extremes by the total temperature change. Connection Diagram 16-Pin LLP 30042904 Top View Gain Control Pins Pin Number Pin Name Gain Step Size 11 GAIN_0 6.02 dB 10 GAIN_1 12.04 dB 9 GAIN_2 24.08 dB

Ordering Information

Package Part Number Package Marking Transport Media NSC Drawing 16-Pin LLP LMH6514SQ L6514SQ 1k Units Tape and Reel SQA16ALMH6514SQX 4.5k Units Tape and Reel www.national.com 4 LMH6514

Pin Number Symbol Description Analog I/O 6 IN+ Non-inverting analog input. Internally biased to 1.4V. Input voltage should not exceed VCC or go below GND by more than 0.5V. 7 IN− Inverting analog input. Internally biased to 1.4V. Input voltage should not exceed VCC or go below GND by more than 0.5V. If using amplifier single ended this input should be capacitively coupled to ground. 15 OUT− Open collector inverting output. This pin is an output that also requires a power source. This pin should be connected to 5V through either an RF choke or an appropriately sized inductor that can form part of a filter. See application section for details. 14 OUT+ Open collector non-inverting output. This pin is an output that also requires a power source. This pin should be connected to 5V through either an RF choke or an appropriately sized inductor that can form part of a filter. See application section for details. 16 LOAD− Internal 200Ω resistor connection to pin 15. This pin can be left floating for higher gain or shorted to pin 13 for lower gain and lower effective output impedance. See application section for details. 13 LOAD+ Internal 200Ω resistor connection to pin 14. This pin can be left floating for higher gain or shorted to pin 16 for lower gain and lower effective output impedance. See application section for details. Power 3 VCC 5V power supply pin. Use ceramic, low ESR bypass capacitors. This pin powers everything except the output stage. 5,8 GND Ground pins. Connect to low impedance ground plane. All pin voltages are specified with respect to the voltage on these pins. The exposed thermal pad is also a ground connection. Digital Inputs 11,10,9 GAIN_0 to GAIN_2 Gain setting pins. See above table for gain step sizes for each pin. These pins are 3.3V CMOS logic compatible. 5V inputs may cause damage. 2 LATCH This pin controls the function of the gain setting pins mentioned above. With LATCH in the logic HIGH state the gain is fixed and will not change. With the LATCH in the logic LOW state the gain is set by the state of the gain control pins. Any changes in gain made with the LATCH pin in the LOW state will take effect immediately. This pin is 3.3V CMOS logic compatible. 5V inputs may cause damage. 1,4,12 NC These pins are not connected. They can be grounded or left floating. 5 www.national.com LMH6514

Typical Performance Characteristics VCC = 5V Frequency Response All Gain Settings 30042922 Frequency Response over Temperature, Maximum Gain 30042949 Frequency Response over Temperature, Minimum Gain 30042950 OIP3 High Gain Mode 30042943 OIP3 Low Gain Mode 30042942 OIP3 Over Temperature 30042926 www.national.com 6 LMH6514

HD2 vs. Frequency 30042936 HD3 vs. Frequency 30042939 HD2 vs. Frequency 30042938 HD3 vs. Frequency 30042937 7 www.national.com LMH6514

Noise Figure for All Gain Settings 30042914 Noise Figure vs. Frequency 30042917 Differential Output Noise 30042918 Maximum Gain vs. Supply Voltage 30042927 Gain vs. External Load 30042912 Maximum Gain over Temperature 30042944 www.national.com 8 LMH6514

Worst Case Gain Step Error vs Frequency 30042945 Gain Steps over Temperature 30042961 Worst Case Gain Step Error over Temperature 30042951 Input Impedance (S11) at Maximum Gain 30042964 Input Impedance (S11) at Minimum Gain 30042966 Output Impedance (S22) at Maximum Gain Low Gain Mode 30042965 9 www.national.com LMH6514

Output Impedance (S22) at Maximum Gain High Gain Mode 30042967 Digital Crosstalk 30042947 Digital Crosstalk 30042948 Digital Pin to Output Isolation 30042919 Minimum Gain to Maximum Gain Switching Using Latch Pin 30042930 Maximum Gain to Minimum Gain Switching Using Latch Pin 30042935 www.national.com 10 LMH6514

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Power On Timing, Maximum Gain 30042953 Power On Timing, Minimum Gain 30042954 Power Off Timing, Maximum Gain 30042956 Power Off Timing, Minimum Gain 30042955 www.national.com 12 LMH6514

gain when an external load is added. LMH6514 input will need to be AC coupled. LMH6514 with very consistent gain. and will result in poor performance. FIGURE 9. Bandpass Filter compromise between bandwidth, noise rejection and cost. C14V155KDRB High IF Receiver reference design board. ble High Speed Analog to Digital Converters table.

250 MHz

FIGURE 10. Sample Filter Digital Control section for details.

Compatible High Speed Analog to Digital Converters Product Number Max Sampling Rate (MSPS) Resolution Channels ADC12L063 62 12 SINGLE ADC12DL065 65 12 DUAL ADC12L066 66 12 SINGLE ADC12DL066 66 12 DUAL CLC5957 70 12 SINGLE ADC12L080 80 12 SINGLE ADC12DL080 80 12 DUAL ADC12C080 80 12 SINGLE ADC12C105 105 12 SINGLE ADC12C170 170 12 SINGLE ADC12V170 170 12 SINGLE ADC14C080 80 14 SINGLE ADC14C105 105 14 SINGLE ADC14DS105 105 14 DUAL ADC14155 155 14 SINGLE ADC14V155 155 14 SINGLE ADC08D500 500 8 DUAL ADC08500 500 8 SINGLE ADC08D1000 1000 8 DUAL ADC081000 1000 8 SINGLE ADC08D1500 1500 8 DUAL ADC081500 1500 8 SINGLE ADC08(B)3000 3000 8 SINGLE ADC08L060 60 8 SINGLE ADC08060 60 8 SINGLE ADC10DL065 65 10 DUAL ADC10065 65 10 SINGLE ADC10080 80 10 SINGLE ADC08100 100 8 SINGLE ADCS9888 170 8 SINGLE ADC08(B)200 200 8 SINGLE ADC11C125 125 11 SINGLE ADC11C170 170 11 SINGLE www.national.com 18 LMH6514

Physical Dimensions inches (millimeters) unless otherwise noted 16-Pin Package 19 www.national.com LMH6514

LMH6514 600 MHz, Digital Controlled, Variable Gain Amplifier For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Design Support Amplifiers www.national.com/amplifiers WEBENCH www.national.com/webench Audio www.national.com/audio Analog University www.national.com/AU Clock Conditioners www.national.com/timing App Notes www.national.com/appnotes Data Converters www.national.com/adc Distributors www.national.com/contacts Displays www.national.com/displays Green Compliance www.national.com/quality/green Ethernet www.national.com/ethernet Packaging www.national.com/packaging Interface www.national.com/interface Quality and Reliability www.national.com/quality LVDS www.national.com/lvds Reference Designs www.national.com/refdesigns Power Management www.national.com/power Feedback www.national.com/feedback Switching Regulators www.national.com/switchers LDOs www.national.com/ldo LED Lighting www.national.com/led PowerWise www.national.com/powerwise Serial Digital Interface (SDI) www.national.com/sdi Temperature Sensors www.national.com/tempsensors Wireless (PLL/VCO) www.national.com/wireless THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS, IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT NATIONAL’S PRODUCT WARRANTY. EXCEPT WHERE MANDATED BY GOVERNMENT REQUIREMENTS, TESTING OF ALL PARAMETERS OF EACH PRODUCT IS NOT NECESSARILY PERFORMED. NATIONAL ASSUMES NO LIABILITY FOR APPLICATIONS ASSISTANCE OR BUYER PRODUCT DESIGN. BUYERS ARE RESPONSIBLE FOR THEIR PRODUCTS AND APPLICATIONS USING NATIONAL COMPONENTS. PRIOR TO USING OR DISTRIBUTING ANY PRODUCTS THAT INCLUDE NATIONAL COMPONENTS, BUYERS SHOULD PROVIDE ADEQUATE DESIGN, TESTING AND OPERATING SAFEGUARDS. EXCEPT AS PROVIDED IN NATIONAL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NATIONAL ASSUMES NO LIABILITY WHATSOEVER, AND NATIONAL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO THE SALE AND/OR USE OF NATIONAL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other brand or product names may be trademarks or registered trademarks of their respective holders. Copyright© 2008 National Semiconductor Corporation For the most current product information visit us at www.national.com National Semiconductor Americas Technical Support Center Email: new.feedback@nsc.com Tel: 1-800-272-9959 National Semiconductor Europe Technical Support Center Email: europe.support@nsc.com German Tel: +49 (0) 180 5010 771 English Tel: +44 (0) 870 850 4288 National Semiconductor Asia Pacific Technical Support Center Email: ap.support@nsc.com National Semiconductor Japan Technical Support Center Email: jpn.feedback@nsc.com www.national.com