L6451 STMICROELECTRONICS | Alldatasheet

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28 CHANNEL INK JET DRIVER

ESD OUTPUT PROTECTION WITH CLAMP- ING DIODES VERY LOW QUIESCENT CURRENT PLCC44 OR PQFP44 (10 x 10mm)

DESCRIPTION

The L6451 is realized in Multipower BCD Tech- nology which combines isolated DMOS power transistors with CMOS and Bipolar circuits on the same IC. By using mixed technology it has been possible to optimize the logic circuitry and the power stage to achieve the best possible perform- ances. Intended to be used in ink jet Printer Applications as 4 to 28 (2 x 14) lines selectable decoder/driver, the L6451 device driver has the advantages of low power CMOS inputs and logic, with 28 high current and high voltage DMOS outputs capable of sustaining a maximum of 40V. On system power up the output drivers are locked out using the chip enable function; two enable in- puts are available for the different driver banks. An internal power-on system is implemented in order to avoid wrong output commutation during the supply voltage transients. Using a mask option during manufacturing allows a different decoding. Control of the energy delivered to the print head is made by means of a special circuitry. All driver outputs are capable of withstanding a contact discharge of±8kV with the IC biased. This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice. May 1995 BLOCK DIAGRAM (case of 4 bit) PQFP44 PLCC44 MULTIPOWER BCD TECHNOLOGY

PQFP44 PIN CONNECTION (Top view) PLCC44 PIN CONNECTION (Top view) L6451

VDD 5V Logic Supply. GND Logic and Power Ground. OUT0 to OUT27 DMOS Outputs. CLAMP This pin has to be connected to the power supply voltage of the head resistors. Each of the output DMOS have their drain connected with the anode of a protection diode, all the cathodes of the protection diodes are connected to the clamp pin. In order to have the device supplied, the CLAMP pin needs to be connected to the power.. INA, INB, INC, IND Decoder inputs. COM1, COM2 A low logic input on these pins enables the outputs selected by the decoder inputs. CHIP ENABLE A logic high enable the chip. THERMAL DATA Symbol Parameter PQFP44 PLCC44 Unit R th j-amb Thermal Resistance Junction-Ambient Max. 55 (*) 65 (*) °C/W (*) device mounted on PCB. ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VOUT Output Voltage 40 V VCLAMP Output Clamping Voltage 40 V IOUT Output Continuous Current 0.8 A IPEAK Output Peak Current (with duty cycle = 10% TON =4 µs) 2 A TJ Junction Temperature 150 °C VDD Logic Supply Voltage 7 V VIN Input Voltage Range -0.3V to V S +0.3 V Tamb Operating Temperature Range 0 to 70 °C Tstg Storage Temperature Range -55 to 150 °C L6451

D.C. ELECTRICAL CHARACTERISTICS at Tamb =2 5°C, VDD =5 V ,Vclamp= 18V (unless otherwise specified). Symbol Parameter Test Condition Min. Typ. Max. Unit VDD Logic Supply Voltage 4.75 5 5.25 V VCLAMP Clamping Voltage 9 38 V VIL Low Level Input Voltage 1.2 V VIH High Level Input Current V DD -1.2 V ILL Low Level Input Current V IN =V IL -200 µA ILH High Level Input Current V IN =V IH 10 µA IDD Logic Supply Current (Independent from the output conditions) 5m A VOUT Output Saturation Voltage Tj 25 °C D.C. 0.4A Tj 25°C D.C. 0.5A Tj 90°C D.C. 0.4A Tj 90°C D.C. 0.5A 0.9 1.1 1.4 1.7 V V V V Δ V CE Output saturation absolute voltage variation around the typ. values for extended temperature ranges Tj = 25°Ct o9 0°C D.C.: 0.4A Tj = 25°Ct o9 0°C D.C.: 0.5A ±0.2 ±0.25 V V R DS ON 2.2 Ω A.C. ELECTRICAL CHARACTERISTICS at Tamb =2 5°C, VDD = 5V. Symbol Signal Name Parameter Test Condition Min. Typ. Max. Unit TS INA, INB, INC, IND Vs COMn SET - UP Time 30 ns TH INA, INB, INC, IND Vs COMn HOLD Time 0 ns Ton COM1,2,3,4 VS OUT 0 to N TURN - ON Time I OUT = 0.5A, RL =3 9Ω Tj =2 5t o9 0°C 150 ns Toff COM1,2,3,4 VS OUT 0 to N TURN - OFF Time I OUT = 0.5A, RL =3 9Ω Tj =2 5t o9 0°C 150 ns tr Rise Time 100 ns tf Fall Time 100 ns Twout Output Pulse Width T win = 3.5µsR L =4 0Ω IOUT = 0.5A -2 0 T win +8 0 n s ΔPD Maximum allowable variation of the output power transmitted by each driver to the resistive load R L =3 9Ω VCLAMP = 18V ±4% ΔPD Maximum allowable variation of the output power transmitted by each driver to the resistive load R L =4 0Ω Vclamp = 18V æ4 % L6451

Figure 1:Timing Waveforms OUTPUT SELECTION Decoder Truth Table IND INC INB INA (LSB) OUTPUTS 0.27 1.26 2.25 3.24 4.23 5.22 6.21 7.20 8.19 9.18 10.17 11.16 12.15 13.14 ALL OFF ALL OFF L6451

Figure 2:Application Circuit Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications men- tioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without ex- press written approval of SGS-THOMSON Microelectronics.  1993 SGS-THOMSON Microelectronics - Printed in Italy - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - United Kingdom - U.S.A. L6451

PQFP44 (14 x 14) PACKAGE MECHANICAL DATA DIM. mm inch A 3.40 0.134 A1 0.25 0.0098 B 0.35 0.50 0.0138 0.0197 C 0.13 0.23 0.005 0.009 D3 10.00 0.394 e 1.00 0.039 E3 10.00 0.394 L1 1.60 0.063 K 0°(min.), 7°(max.) A A1B Seating Plane C 2333 E D e K B PQFP44 L 0.10mm .004 L6451

PLCC44 PACKAGE MECHANICAL DATA DIM. mm inch A 17.4 17.65 0.685 0.695 B 16.51 16.65 0.650 0.656 C 3.65 3.7 0.144 0.146 D 4.2 4.57 0.165 0.180 d1 2.59 2.74 0.102 0.108 d2 0.68 0.027 E 14.99 16 0.590 0.630 e 1.27 0.050 e3 12.7 0.500 F 0.46 0.018 F1 0.71 0.028 G 0.101 0.004 M 1.16 0.046 M1 1.14 0.045 L6451

Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications men- tioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without ex- press written approval of SGS-THOMSON Microelectronics.  1995 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thaliand - United Kingdom - U.S.A. L6451