L6374

L6374 STMICROELECTRONICS | Alldatasheet

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INDUSTRIAL QUAD LINE DRIVER ADVANCE DATA FOUR INDEPENDENT LINE DRIVERS WITH 100 mA UP TO 35V OUTPUTS INPUT SIGNALS BETWEEN -7V AND +35V, WITH PRESETTABLE THRESHOLD PUSH-PULL OUTPUTS WITH THREE STATE CONTROL AND TRUE ZERO CURRENT BE- TWEEN V S AND GROUND CURRENT LIMITING ON EACH OUTPUT EF- FECTIVE IN THE FULL ”GROUND TO V S” OUTPUT VOLTAGE RANGE OUTPUT VOLTAGE CLAMP TO V S AND TO GROUND OVERTEMPERATURE AND UNDERVOL- TAGE PROTECTIONS DIAGNOSTIC FOR OVERTEMPERATURE, UNDERVOLTAGE AND OVERCURRENT PRESETTABLE DELAY FOR OVERCUR- RENT DIAGNOSTIC HIGH SPEED OPERATION: UP TO 300kHz WITH 35V SWING

DESCRIPTION

The L6374 is especially designed to be used as a line driver in industrial control systems based on the 24V signal levels (IEC1131, 24VDC). This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice. December 1994 BLOCK DIAGRAM ORDERING NUMBER: L6374DP (POWERDIP 16+2+2) L6374FP (SO 16+2+2) POWERDIP 16+2+2 SO 16+2+2

Symbol Pin Parameter Value Unit VS 1 Supply Voltage (tW < 10ms) 50 V Supply Voltage (DC) 40 V Vilog 12, 13 Logic Input Voltage (DC) -0.3 to 7 V Iilog Logic Input forced current, per pin ±1m A Ii 7, 8, 9, 10 Channel Input Current (forced) ±2m A Vi Channel Input Voltage - 7 to 35 V Iout 3, 4, 17, 18 Output Current (forced, apart from inductive load) ±100 mA Output Current (forced, apart from inductive load) same tW < 10ms ±1A Vout Output Voltage (forced, not resulting from an inductive kick) -0.3 to VS +0.3 V Iset 11 Setting pin forced current ±1m A Vset Setting pin forced voltage -0.3 to 5 V Vdiag 14 External voltage -0.3 to 35 V Idiag Externally forced current -10 to 10 mA VC3 13 Voltage on the delay capacitor, externally forced -0.3 to 4.5 V Top Ambient temperature, operating range -25 to 85 °C Tj Junction temperature, operating range (see Overtemperature Protection) -25 to 125 °C Tstg Storage temperature -55 to 150 °C PIN CONNECTION (Top view) L6374

ELECTRICAL CHARACTERISTICS (VS = 24V; Tj= -25 to 125°C; unless otherwise specified.) DC OPERATION Symbol Pin Parameter Test Condition Min. Typ. Max. Unit VS 1 Supply Voltage 10.8 35 V Vsh UV UpperThreshold 9 10.8 V H ys1 UV Hysteresis 250 450 650 mV Iqsc Quiescent Current Outputs Open 3 5 mA Vref 11 Input Comparators Reference Voltage Reference pin Floating 1.05 1.25 1.35 V Iref Sink/Source Current on Reference Pin Vref= 0V -30 -20 -10 µA Vref=5 V 1 0 2 0 3 0 µA Vth 7, 8, 9, 10 Comparator Threshold with External Bias VS = 9 to 12V -0.2 2.0 V VS = 12 to 35V -0.2 5.0 V Vil Input Low Level V REF Externally Biased -7 V REF -0.2 V Pin VREF Floating -7 0.8 V Vih Input High Level V REF Externally Biased V REF +0.2 35 V Pin VREF Floating 2 35 V Vi Input Voltage (Operative Range) -7 35 V Ibias Input Bias Current 0 < V i<V S -1 1 µA H ys2 Input Comparators Hysteresis See Analog Inputs Sections 100 200 350 mV Th OVT Upper Threshold 170 °C H T OVT Hysteresis 20 °C Isc 3, 4, 17, 18 Current Limit V i =- 7t oVS ;Vout= 0 to VS ; 110 200 300 mA Von Internal Voltage Drop @ Rated Current Iout= ±100mA; Sourced @ High Output, Sunk @ Low Output Tj= 125°C 400 600 mV Same, Tj=2 5°C 250 400 mV Ilkg Output 3-State Leakage Current Vout = 0 to VS -25 25 µA Vin 12 Push-Pull Mode Request -0.2 0.8 V 3-State Mode Request 2 5.5 V Iin Input Current V i =0 V 1 0 2 5 µA Idlkg 14 Diagnostic Output Leakage Diagnostic Off; V diag= 24V 5 µA Vdiag Diagnostic Output Voltage Drop Idiag=5mA 200 500 mV AC OPERATION (VS = 10.8 to 35V; Tj = -25 to 125°C; Iout = 100mA; unless otherwise specified; see switching waveforms diagrams) Symbol Pin Parameter Test Condition Min. Typ. Max. Unit tdr 7t o4 8t o3 9 to18 10 to17 Delay Time on Rising Edge R lto ground 1000 1500 ns R lto VS 500 1000 ns tdf Delay Time on Falling Edge R lto ground 500 1000 ns R lto VS 1000 1500 ns tr 3, 4, 17, 18 Rise Time R lto ground 120 250 ns R lto VS 120 250 ns tf Fall Time R lto ground 150 300 ns R lto VS 150 300 ns L6374

POWERDIP. The thermal resistance is referred to the thermal path from the dissipating region on the top surface of the silicon chip, to the points along the four central pins of the pack- age, at a distance of 1.5 mm away from the stand-offs. SO. Similarly, the reference point is the knee on the four central pins, where the pins are up- wardly bent and the soldering joint with the PCB footprint can be made. R th j-amb1 If a dissipating surface, thick at least 35µm, and with a surface similar or bigger than the one shown, is created making use of the printed circuit. Such heatsinking surface is considered on the bottom side of an horizontalPCB (worst case). R th j-amb2 If the power dissipating pins (the four central ones), as well as the others, have a minimum thermal connection with the external world (very thin strips only) so that the dissipation takes place through still air and through the PCB itself. It is the same situation of point above, without any heatsinking surface created on purpose on the board. Additional data for the PowerDip package can be found in: Application Note 9030: Thermal Characteristics of the PowerDip 20,24 Packages Soldered on 1,2,3 oz. Copper PCB THERMAL DATA Symbol Parameter DIP20 SO20 Unit R th j-pin Thermal Resistance, Junction to Pin 12 17 °C/W R th j-amb1 Thermal Resistance, Junction to Ambient (see Thermal Characteristics) 40 65 °C/W R th j-amb2 Thermal Resistance, Junction to Ambient (see Thermal Characteristics) 50 80 °C/W Figure 1:Printed Heatsink L6374

3 STATE / PUSH-PULL INPUT

The input 3st/Pp is instead intended for a digital incoming signal. It has an internal threshold set at 1.26V; an internal bias circuit (10µA typical) simu- lates a high level (three-state) if the pin is discon- nected. THE SWITCHING OF THE OUTPUT STAGE The cross conduction of the two transistors of an output stage of the L6374 would be significantly noisy, because the transistors here can carry peak currents in excess of 100mA, and even more in the few nanoseconds before the current limiting circuits are really effective. Consequently the device has been designed so as to avoid such cross conduction. At every switching transition, first of all the transistor in conduction is turned off. Then, after a safe inter- val of around 200ns, the other transistor is turned on. When analyzing the switching cycle, and the as- sociated switching times, it is useful to identify some subsequent phases: - delay from the input pin to the output reaction; - off transition in the output stage; - dead time; - on transition in the output stage. Figure 4 helps understand such sequence. In Figure 4:V S = 35V, 350Ω connected to VS/2. Vref V i Vs Vout H ys2 H ys2 D94IN073 Figure 3:Input Comparator Threshold L6374

It is recommended not to leave the Ref pin (pin 11) floating: if not used with an external volt- age reference, it is better to connect an external capacitor (of at least 10nF) between this pin and ground. This capacitor filters the voltage reference against voltage spikes that can be generated by the com- mutation of the output stages. This is very common using capacitive loads: in fact, the initial transient of such loads behaves like a short circuit, so the current flowing through the outputs presents very high spikes. Moreover, if the device is used as a line receiver. (i.e. the input signals can go below ground) it is required not to leave the Ref pin (pin 11) floating: in this case, the pin can be connected to ground or to a fixed external voltage reference. L6374

DIP20 PACKAGE MECHANICAL DATA DIM. mm inch a1 0.51 0.020 B 0.85 1.40 0.033 0.055 b 0.50 0.020 b1 0.38 0.50 0.015 0.020 D 24.80 0.976 E 8.80 0.346 e 2.54 0.100 e3 22.86 0.900 F 7.10 0.280 I 5.10 0.201 L 3.30 0.130 Z 1.27 0.050 L6374

SO20 PACKAGE MECHANICAL DATA DIM. mm inch A 2.65 0.104 a1 0.1 0.3 0.004 0.012 a2 2.45 0.096 b 0.35 0.49 0.014 0.019 b1 0.23 0.32 0.009 0.013 C 0.5 0.020 c1 45 (typ.) D 12.6 13.0 0.496 0.512 E 10 10.65 0.394 0.419 e 1.27 0.050 e3 11.43 0.450 F 7.4 7.6 0.291 0.299 L 0.5 1.27 0.020 0.050 M 0.75 0.030 S 8 (max.) L6374

Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications men- tioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without ex- press written approval of SGS-THOMSON Microelectronics.  1994 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thaliand - United Kingdom - U.S.A. L6374