L6229 STMICROELECTRONICS | Alldatasheet
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2 DESCRIPTION
Motor Driver with Overcurrent Protection. CMOS and bipolar circuits on the same chip. Power MOSFETs and thermal shutdown. Figure 1. Package Table 1. Order Codes
Figure 2. Block Diagram Table 2. Absolute Maximum Ratings
Table 3. Recommended Operating Condition Table 4. Thermal Data (1) Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the bottom side of 6 cm 2 (with a thickness of 35 µm). (2) Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the top side of 6 cm 2 (with a thickness of 35 µm). 16 via holes and a ground layer. (4) Mounted on a multi-layer FR4 PCB without any heat-sinking surface on the board.
Figure 3. Pin Connections (Top view) (5) The slug is internally connected to pins 1, 18, 19 and 36 (GND pins). Table 5. Pin Description 11 0 H 1 Sensor Input Single Ended Hall Effect Sensor Input 1. detected or during Thermal Protection. Power Ground through a sensing power resistor. the slug is connected on these pins.
Input of the Sense Comparator is connected. If not used, it has to be connected to GND or +5V .. If not used, it has to be connected to +5V . 13 28 VREF Logic Input Current Controller Reference Voltage. Do not leave this pin open or connect to GND. If not used, it has to be connected to +5V . connected to the supply voltage together with pin VSA. 20 4 VS A Power Supply Half Bridge 1 and Half Bridge 2 Power Supply Voltage. 21 5 OUT 2 Power Output Output 2. 22 7 VCP Output Charge Pump Oscillator Output. 23 8 H 2 Sensor Input Single Ended Hall Effect Sensor Input 2. 24 9 H 3 Sensor Input Single Ended Hall Effect Sensor Input 3. Table 6. Electrical Characteristics Table 5. Pin Description (continued)
Table 6. Electrical Characteristics (continued)
3 CIRCUIT DESCRIPTION
3.1 POWER STAGES and CHARGE PUMP
Pins VSA and VSB MUST be connected together to the supply voltage (VS). pump circuit are shown in Table 7. Table 7. Charge Pump External Component Values. Figure 6. Charge Pump Circuit
3.2 LOGIC INPUTS
information for selecting the values can be found in the Overcurrent Protection section.
Figure 7. Logic Input Internal Structure Figure 8. Pin EN Open Collector Driving Figure 9. Pin EN Push-Pull Driving
3.3 PWM CURRENT CONTROL
tor current recirculates around the upper half of the bridge in Slow Decay Mode as described in the next section. the monostable time plus the dead time. the output stage configuration are included in the next section.
comparator output so that the current spike cannot prematurely retrigger the monostable. Figure 10. PWM Current Controller Simplified Schematic Figure 11. Output Current Regulation Waveforms
0 Slow Decay Slow Decay
Figure 13. Area where tON can vary maintaining the PWM regulation.
3.4 SLOW DECAY MODE
some delay set by the Dead Time to prevent cross conduction. Figure 14. Slow Decay Mode Output Stage Configurations
3.5 DECODING LOGIC
versal IC without dedicating pins to select the sensor configuration. tion 3a is the same than 3b and analogously output configuration 6a is the same than 6b. the motor with all the four conventions by changing the direction set. Table 8. 60 and 120 Electrical Degree Decoding Logic in Forward Direction. Figure 15. 120° Hall Sensor Sequence.
Figure 16. 60° Hall Sensor Sequence.
3.6 TACHO
- For component values refer to Application Information section.
where CPUL should be chosen in the range 1nF … 100nF and R PUL in the range 20KΩ … 100K Ω. reference voltage VREF, which sets the speed of the motor. Figure 17. Tacho Operation Waveforms.
3.7 NON-DISSIPATIVE OVERCURRENT DETECTION and PROTECTION
a simplified schematic for the overcurrent detection circuit. capability of 4mA connected to pin DIAG is turned on. by connecting it to pin EN and adding an external R-C (see REN, CEN). Figure 20. Overcurrent Protection Simplified Schematic be chosen according to the desired Disable Time. are respectively 100KΩ and 5.6nF that allow obtaining 200µs Disable Time.
4 APPLICATION INFORMATION
Signal Ground separated on PCB. Table 9. Component Values for Typical Application. Figure 24. Typical Application
4.1 OUTPUT CURRENT CAPABILITY AND IC POWER DISSIPATION
erating junction temperature (125°C maximum). Figure 25. IC Power Dissipation versus Output Power.
4.2 THERMAL MANAGEMENT
PowerSO36, PowerDIP24 and SO24 packages. can be reduced down to 15°C/W. Figure 26. PowerSO36 Junction-Ambient thermal resistance versus on-board copper area.
Figure 30. PowerSO36 Mechanical Data & Package Dimensions Note: “D and E1” do not include mold flash or protusions.
- Critical dimensions are "a3", "E" and "G".
Figure 31. PDIP-24 Mechanical Data & Package Dimensions
Figure 32. SO24 Mechanical Data & Package Dimensions
Table 10. Revision History January 2004 2 Migration from ST-Press dms to EDOCS. October 2004 3 Updated the style graphic form.
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publicati on are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectro nics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners © 2004 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Ital y - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America L6229