L6226Q_10 STMICROELECTRONICS | Alldatasheet
Document overview
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- PDF pages: 29
Technical content
Datasheet sections
- 1 Electrical data
- 1.1 Absolute maximum ratings
- 1.2 Recommended operating conditions
- 1.3 Thermal data
- 2 Pin connection
- 3 Electrical characteristics
- 4 Circuit description
- 4.1 Power stages and charge pump
- 4.2 Logic inputs
- 4.3 Truth table
- 4.4 Non-dissipative overcurrent detection and pr otection
- 4.5 Thermal protection
- 5 Application information
- 6 Paralleled operation
- 7 Output current capability and IC power dissipation
- 8 Thermal management
- 9 Package mechanical data
- 10 Order codes
- 11 Revision history
Features
■ Operating supply voltage from 8 to 52 V ■ 2.8 A output peak current (1.4 A DC) ■ RDS(on) 0.73 Ω typ. value @ TJ = 25 °C ■ Operating frequency up to 100 kHz ■ Programmable high side overcurrent detection and protection ■ Diagnostic output ■ Paralleled operation ■ Cross conduction protection ■ Thermal shutdown ■ Under voltage lockout ■ Integrated fast free wheeling diodes
Applications
■ Bipolar stepper motor ■ Dual or quad DC motor
Description
The L6226Q is a DMOS dual full bridge designed for motor control applications, realized in BCDmultipower technology, which combines isolated DMOS power transistors with CMOS and bipolar circuits on the same chip. Available in QFN32 5x5 package, the L6226Q features thermal shutdown and a non-dissipative overcurrent detection on the high side power MOSFETs plus a diagnostic output that can be easily used to implement the overcurrent protection. Figure 1. Block diagram
1 Electrical data
1.1 Absolute maximum ratings
1.2 Recommended operating conditions
Table 1. Absolute maximum ratings Table 2. Recommended operating conditions
1.3 Thermal data
Table 3. Thermal data
- Mounted on a double-layer FR4 PCB with a dissipating copper surface of 0.5 cm2 on the top side plus 6
cm2 ground layer connected through 18 via holes (9 below the IC).
2 Pin connection
Figure 2. Pin connection (top view) Note: 1 The pins 2 to 8 are connected to die PAD. 2 The die PAD must be connected to GND pin.
Table 4. Pin description 1, 21 GND GND Signal ground terminals. 9 OUT1B Power output Bridge B output 1.
11 OCDB Open drain
through a sensing power resistor.
13 IN1B Logic input Bridge B input 1
14 IN2B Logic input Bridge B input 2
15 PROGCLB R pin
pin and ground sets the programmable current limiting value for the bridge B.
16 ENB Logic input
If not used, it has to be connected to +5 V.
17 VBOOT Supply
19 OUT2B Power output Bridge B output 2. 23 OUT2A Power output Bridge A output 2. 24 VCP Output Charge pump oscillator output.
25 ENA Logic input
If not used, it has to be connected to +5 V.
26 PROGCLA R pin
pin and ground sets the programmable current limiting value for the bridge A. 27 IN1A Logic input Bridge A logic input 1. 28 IN2A Logic input Bridge A logic input 2. through a sensing power resistor.
30 OCDA Open drain
31 OUT1A Power output Bridge A output 1.
3 Electrical characteristics
Table 5. Electrical characteristics
Figure 3. Switching char acteristic definition
- Tested at 25 °C in a restricted r ange and guaranteed by characterization.
Table 5. Electrical characteristics (continued)
Figure 4. Overcurrent de tection timing definition
4 Circuit description
4.1 Power stages and charge pump
off and switch on of two power MOS in one leg of a bridge. Figure 5. Charge pump circuit Table 6. Charge pump external components values
4.2 Logic inputs
thresholds are respectively Vthon = 1.8 V and Vthoff = 1.3 V. Figure 7. If the driver is a standard push-pull structure the resistor REN and the capacitor Figure 6. Logic inputs internal structure Figure 7. EN Figure 8. EN A and ENB pins push-pull driving
4.3 Truth table
4.4 Non-dissipative overcurrent detection and protection
current sense resistor normally used and its associated power dissipation are eliminated. Figure 9 shows a simplified schematic of the overcurrent detection circuit for the bridge A. bridge B is provided of an analogous circuit. capability of 4 mA connected to OCD pin is turned on. Figure 10 shows the OCD operation.
- Isover = 2.8 A ± 30 % at -25 °C < TJ < 125 °C if RCL = 0 Ω (PROGCL connected to GND)
- Isover = ±10 % at -25 °C < T J < 125 °C if 5 kΩ < RCL < 40 kΩ Figure 11 shows the output current protection threshold versus RCL value in the range 5 kΩ to 40 kΩ. The disable time tDISABLE before recovering normal operation can be easily programmed by means of the accurate thresholds of the logic inputs. It is affected whether by CEN and REN
Table 7. Truth table
- High Z = High impedance output
magnitude is reported in Figure 13. Delay Time and the REN value should be chosen according to the desired Disable Time. Figure 9. Overcurrent protection simplified schematic
Circuit description L6226Q 16/29 Doc ID 14335 Rev 5
4.5 Thermal protection
In addition to the overcurrent detection, the L6226Q integrates a thermal protection for preventing the device destruction in case of junction over temperature. It works sensing the die temperature by means of a sensible element integrated in the die. The device switch-off when the junction temperature reaches 165 °C (typ. value) with 15 °C hysteresis (typ. value).
5 Application information
recommended to keep power ground and Signal Ground separated on PCB. Table 8. Component values for typical application
Figure 14. Typical application
6 Paralleled operation
bridge in parallel does not increase the over current detection threshold. Figure 15. The current in the two devices connected in parallel will share very well since the DS(on) of the devices on the same die is well matched. CLA or RCLB in Figure 15. It is recommended to use RCLA = RCLB. In this configuration the resulting bridge has the following characteristics.
- Equivalent device: full bridge
- RDS(on) 0.37 Ω typ. value @ TJ = 25 °C
- 2.8 A max RMS load current
- 5.6 A max OCD threshold
Figure 15. Parallel connection for higher current will be reduced, but the peak current rating is not increased. resistor RCLB sets the threshold when outputs OUT1B and OUT2B are high. It is recommended to use RCLA = RCLB. In this configuration, the resulting bridge has the following characteristics.
- Equivalent device: FULL BRIDGE
- RDS(on) 0.37 Ω typ. value @ TJ = 25 °C
- 1.4 A max RMS load current
- 2.8 A max OCD threshold
Figure 17. Paralleling the four half bridges
7 Output current capability and IC power dissipation
- One full bridge ON at a time (Figure 18) in which only one load at a time is energized.
- Two full bridges ON at the same time (Figure 19) in which two loads at the same time are energized. For a given output current and driving type the power dissipated by the IC can be easily evaluated, in order to establish which package should be used and how large must be the on-board copper dissipating area to guarantee a safe operating junction temperature (125 °C maximum).
Figure 18. IC power dissipation vs output current with one full bridge ON at a time Figure 19. IC power dissipation vs output current with two full bridges ON at the
8 Thermal management
In most applications the power dissipation in the IC is the main factor that sets the maximum current that can be deliver by the device in a safe operating condition. Therefore, it has to be taken into account very carefully. Besides the available space on the PCB, the right package should be chosen considering the power dissipation. Heat sinking can be achieved using copper on the PCB with proper area and thickness. For instance, using a VFQFPN32L 5x5 package the typical R th(JA) is about 42 °C/W when mounted on a double-layer FR4 PCB with a dissipating copper surface of 0.5 cm2 on the top side plus 6 cm2 ground layer connected through 18 via holes (9 below the IC).
9 Package mechanical data
specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. lead. Very thin profile: 0.80 < A = 1.00 mm.
2 Details of terminal 1 are optional but must be located on the top surface of the package by
using either a mold or marked features. Table 9. VFQFPN32 5x5x1.0 pitch 0.50
Figure 20. Package dimensions
10 Order codes
Table 10. Order code
Table 11. Document revision history