L5991_01 STMICROELECTRONICS | Alldatasheet
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PRIMARY CONTROLLER WITH STANDBY CURRENT-MODE CONTROL PWM SWITCHING FREQUENCY UP TO 1MHz LOW START-UP CURRENT (< 120 µA) HIGH-CURRENT OUTPUT DRIVE SUITABLE FOR POWER MOSFET (1A) FULLY LATCHED PWM LOGIC WITH DOU- BLE PULSE SUPPRESSION PROGRAMMABLE DUTY CYCLE 100% AND 50% MAXIMUM DUTY CYCLE LIMIT STANDBY FUNCTION PROGRAMMABLE SOFT START PRIMARY OVERCURRENT FAULT DETEC- TION WITH RE-START DELAY PWM UVLO WITH HYSTERESIS IN/OUT SYNCHRONIZATION LATCHED DISABLE INTERNAL 100ns LEADING EDGE BLANK- ING OF CURRENT SENSE PACKAGE: DIP16 AND SO16
DESCRIPTION
This primary controller I.C., developed in BCD60II technology, has been designed to implement off line or DC-DC power supply applications using a fixed frequency current mode control. Based on a standard current mode PWM control- ler this device includes some features such as programmable soft start, IN/OUT synchronization, disable (to be used for over voltage protection and for power management), precise maximum Duty Cycle Control, 100ns leading edge blanking on current sense, pulse by pulse current limit, over- current protection with soft start intervention, and Standby function for oscillator frequency reduction when the converter is lightly loaded. August 2001 TIMING2 -14 T Vref CLK 2.5V 1.2V BLANKING PWM FAULT SOFT-START R SQ 25V 15V/10V VREF OK DIS E/A 1V R DIS 2.5V7 48151 13V PWM UVLO SGND COMP SS ISEN DIS DC RCT SYNC DC-LIM VCC VREF D97IN725A VFB PGND OUT VC OVER CURRENT STAND-BY ST-BY VREF BLOCK DIAGRAM ORDERING NUMBERS: L5991/L5991A (DIP16) L5991D/L5991AD (SO16) MULTIPOWER BCD TECHNOLOGY DIP16 SO16
Symbol Parameter Value Unit VCC Supply Voltage (ICC < 50mA) (*) selflimit V IOUT Output Peak Pulse Current 1.5 A Analog Inputs & Outputs (6,7) -0.3 to 8 V Analog Inputs & Outputs (1,2,3,4,5,15,14, 13, 16) -0.3 to 6 V P tot Power Dissipation @ Tamb = 70°C (DIP16) @ Tamb = 50°C (SO16) 0.83 W W Tj Junction Temperature, Operating Range -40 to 150 °C Tstg Storage Temperature, Operating Range -55 to 150 °C (*) maximum package power dissipation limits must be observed THERMAL DATA Symbol Parameter Value Unit R th j-amb Thermal Resistance Junction -Ambient (DIP16) 80 °C/W Thermal Resistance Junction -Ambient (SO16) 120 °C/W PIN FUNCTIONS N. Name Function 1 SYNC Synchronization. A synchronization pulse terminates the PWM cycle and discharges Ct
2 RCT Oscillator pin for external C T, RA, RB components
3 DC Duty Cycle control
4 VREF 5.0V +/-1.5% reference voltage @ 25°C
5 VFB Error Amplifier Inverting input
6 COMP Error Amplifier Output
7 SS Soft start pin for external capacitor Css
CC Supply for internal "Signal" circuitry 9V C Supply for Power section
10 OUT High current totem pole output
11 PGND Power ground
12 SGND Signal ground
13 ISEN Current sense
14 DIS Disable. It must never be left floating. TIE to SGND if not used. 15 DC-LIM Connecting this pin to Vref, DC is limited to 50%. If it is left floating or grounded no limitation is imposed 16 ST-BY Standby. Connect a resistor to RCT. Connect to VREF or floating if not used. SYNC RCT DC VREF VFB SS COMP 7O U T SGND PGND ISEN DIS DC-LIM ST -BY16 V CC 8V C9 PIN CONNECTION L5991 - L5991A
ELECTRICAL CHARACTERISTICS (VCC = 15V; Tj = 0 to 105°C; RT = 13.3kΩ (*) CT = 1nF; unless otherwise specified.) Symbol Parameter Test Condition Min. Typ. Max. Unit REFERENCE SECTION VREF Output Voltage T j = 25°C; IO = 1mA 4.925 5.0 5.075 V Line Regulation V CC = 12 to 20V; Tj = 25°C 2.0 10 mV Load Regulation I O = 1 to 10mA; Tj = 25°C 2.0 10 mV TS Temperature Stability 0.4 mV/ °C Total Variation Line, Load, Temperature 4.80 5.0 5.130 V IOS Short Circuit Current Vref = 0V 30 150 mA Power Down/UVLO V CC = 6V; Isink = 0.5mA 0.2 0.5 V OSCILLATOR SECTION Initial Accuracy pin 15 = Vref; T j = 25°C; Vcomp = 4.5V 95 100 105 kHz pin 15 = Vref; VCC = 12 to 20V Vcomp = 4.5V 93 100 107 kHz pin 15 = Vref; VCC = 12 to 20V Vcomp = 2V 46.5 50 53.5 kHz Duty Cycle pin 3 = 0,7V, pin 15 = V REF pin 3 = 0.7V, pin 15 = OPEN pin 3 = 3.2V, pin 15 = VREF pin 3 = 3.2V, pin 15 = OPEN Duty Cycle Accuracy pin 3 = 2.79V, pin 15 = OPEN 75 80 85 % Oscillator Ramp Peak 2.8 3.0 3.2 V Oscillator Ramp Valley 0.75 0.9 1.05 V ERROR AMPLIFIER SECTION Input Bias Current V FB to GND 0.2 3.0 µA VI Input Voltage V COMP = VFB 2.42 2.5 2.58 V G OPL Open Loop Gain V COMP = 2 to 4V 60 90 dB SVR Supply Voltage Rejection V CC = 12 to 20V 85 dB VOL Output Low Voltage I sink = 2mA 1.1 V VOH Output High Voltage I source = 0.5mA, VFB = 2.3V 5 6 V IO Output Source Current V COMP > 4V, VFB = 2.3V 0.5 1.3 2.5 mA Output Sink Current V COMP = 1.1V, VFB = 2.7V 2 6 mA Unit Gain Bandwidth 1.7 4 MHz SR Slew Rate 8 V/ µs PWM CURRENT SENSE SECTION Ib Input Bias Current I sen = 0 3 15 µA IS Maximum Input Signal V COMP = 5V 0.92 1.0 1.08 V Delay to Output 70 100 ns Gain 2.85 3 3.15 V/V Vt Fault Threshold Voltage 1.1 1.2 1.3 V SOFT START SECTION ISSC SS Charge Current T j = 25°C 1 42 02 6 µA ISSD SS Discharge Current VSS = 0.6V T j = 25°C 5 10 15 µA VSSSAT SS Saturation Voltage DC = 0% 0.6 V VSSCLAMP SS Clamp Voltage 7 V LEADING EDGE BLANKING Internal Masking Time 100 ns OUTPUT SECTION VOL Output Low Voltage I O = 250mA 1.0 V VOH Output High Voltage I O = 20mA; VCC = 12V 10 10.5 V IO = 200mA; VCC = 12V 9 10 V VOUT CLAMP Output Clamp Voltage I O = 5mA; VCC = 20V 13 V Collector Leakage V CC = 20V VC = 24V 2 20 µA (*) RT = RA//RB, RA = RB = 27kΩ , see Fig. 23. L5991 - L5991A
The standby function, optimized for flyback topol- ogy, automatically detects a light load condition for the converter and decreases the oscillator fre- quency on that occurrence. The normal oscillation frequency is automatically resumed when the out- put load builds up and exceeds a defined thresh- old. This function allows to minimize power losses re- lated to switching frequency, which represent the majority of losses in a lightly loaded flyback, with- out giving up the advantages of a higher switching frequency at heavy load. This is accomplished by monitoring the output of the Error Amplifier (V COMP ) that depends linearly on the peak primary current, except for an offset. If the the peak primary current decreases (as a re- sult of a decrease of the power demanded by the load) and VCOMP falls below a fixed threshold (VT1), the oscillator frequency will be set to a lower value (fSB ). When the peak primary current increases and VCOMP exceeds a second threshold (VT2) the oscillator frequency is set to the normal value (fosc). An appropriate hysteresis (VT2-VT1) prevents undesired frequency change when power is such that VCOMP moves close to the threshold. This operation is shown in fig. 21. Both the normal and the standby frequency are externally programmable. VT1 and VT2 are inter- nally fixed but it is possible to adjust the thresh- olds in terms of input power level.
APPLICATION INFORMATION
Detailed Pin Function Description Pin 1. SYNC (In/Out Synchronization). This func- tion allows the IC’s oscillator either to synchronize other controllers (master) or to be synchronized to an external frequency (slave). As a master, the pin delivers positive pulses dur- ing the falling edge of the oscillator (see pin 2). In slave operation the circuit is edge triggered. Refer to fig. 23 to see how it works. When several IC work in parallel no master-slave designation is needed because the fastest one becomes auto- matically the master. During the ramp-up of the oscillator the pin is pulled low by a 600µA internal sink current gener- ator. During the falling edge, that is when the pulse is released, the 600µA pull-down is discon- nected. The pin becomes a generator whose source capability is typically 7mA (with a voltage still higher than 3.5V). In fig. 22, some practical examples of synchroniz- ing the L5991 are given. Since the device automatically diminishes its op- erating frequency under light load conditions, it is reasonable to suppose that synchronization will refer to normal operation and not to standby. Pin 2. RCT (Oscillator). Two resistors (R A and RB) and one capacitor (CT), connected as shown in fig. 23, allow to set separately the operating fre- quency of the oscillator in normal operation (fosc) and in standby mode (fSB ). C T is charged from Vref through RA and RB in nor- mal operation (STANDBY = HIGH), through RA only in standby ( STANDBY = LOW). See pin 16 description to see how the STANDBY signal is gen- erated. When the voltage on CT reaches 3V, the capaci- tor is quickly internally discharged. As the voltage has dropped to 1V it starts being charged again. 1234 VCOMP Pin fosc fSB Stand-by Normal operation VT1 PNO PSB VT2 Figure 21. Standby dynamic operation.
16 R B
Figure 22. Synchronizing the L5991.
the converter will operate at when lightly loaded.
90 V15 = VREF
160 V15 = GND /OPEN (3),
from fig. 14 or resulting from (1) and (2). depending also on the tolerance of the parts. upper extreme Dx (see pin 15). tection (see application ideas). age above 3V. Should the pin pick up noise (e.g. Figure 23. Oscillator and synchronization internal schematic.
now disconnected and CT is charged through RA only. In this way the oscillator frequency (fSB ) will be lower. Refer to pin 2 description to see how to calculate the timing components. Typical values for VT1 and VT2 are 2.5 V and 4V respectively. This 1.5V hysteresis is enough to prevent undesired frequency change up to a 5.5 to 1 f osc/ fSB ratio. The value of VT1 is such that in a discontinuous flyback the standby frequency is activated when the input power is about 13% of the maximum. If necessary, it is possible to decrease the power threshold below 13% by adding a DC offset (V on the current sense pin (13, ISEN). This will also allow a frequency change greater than 5.5 to 1. The following equations, useful for design, apply: PinSB = 1 2 ⋅ LP ⋅ ƒosc ⋅ 0.367 − Vo Rsense (12), PinNO = 1 2 ⋅ LP ⋅ ƒSB ⋅ 0.867 − Vo Rsense (13), ƒosc ƒSB < 0.867 − Vo 0.367 − Vo (14), where PinSB is the input power below which the L5991 recognizes a light load and switches the oscillator frequency from ƒosc to fSB , PinNO is the input power above which the L5991 switches back from ƒSB to ƒosc and Lp the primary induc- tance of the flyback transformer. Connect to Vref or leave open this pin when stand-by function is not used. Layout hints Generally speaking a proper circuitboard layout is vital for correct operation but is not an easy task. Careful component placing, correct traces routing, appropriate traces widths and, in case of high voltages, compliance with isolation distances are the major issues. The L5991 eases this task by putting two pins at disposal for separate current returns of bias (SGND) and switch drive currents (PGND) The matter is complex and only few im- portant points will be here reminded. 1) All current returns (signal ground, power ground, shielding, etc.) should be routed sepa- rately and should be connected only at a single ground point. 2) Noise coupling can be reduced by minimizing the area circumscribed by current loops. This applies particularly to loops where high pulsed currents flow. 3) For high current paths, the traces should be doubled on the other side of the PCB whenever possible: this will reduce both the resistance and the inductance of the wiring. 4) Magnetic field radiation (and stray inductance) can be reduced by keeping all traces carrying switched currents as short as possible. 5) In general, traces carrying signal currents should run far from traces carrying pulsed cur- rents or with quickly swinging voltages. From this viewpoint, particular care should be taken of the high impedance points (current sense in- put, feedback input, ...). It could be a good idea to route signal traces on one PCB side and power traces on the other side. 6) Provide adequate filtering of some crucial points of the circuit, such as voltage references, IC’s supply pins, etc. L5991 - L5991A
application problems of L5991 based supplies. Figure 33. Typical application circuit for computer monitors (90W).
265 Vac
Figure 34. Typical application circuit for inkjet printers (40W).
DIM. mm inch a1 0.51 0.020 B 0.77 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L 3.3 0.130 Z 1.27 0.050 OUTLINE AND MECHANICAL DATA L5991 - L5991A
DIM. mm inch A 1.75 0.069 a1 0.1 0.25 0.004 0.009 a2 1.6 0.063 b 0.35 0.46 0.014 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.020 c1 45˚ (typ.) D (1) 9.8 10 0.386 0.394 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 F (1) 3.8 4 0.150 0.157 G 4.6 5.3 0.181 0.209 L 0.4 1.27 0.016 0.050 M 0.62 0.024 S (1) D and F do not include mold flash or protrusions. Mold flash or potrusions shall not exceed 0.15mm (.006inch). OUTLINE AND MECHANICAL DATA 8˚(max.) L5991 - L5991A
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