L5973AD_07 STMICROELECTRONICS | Alldatasheet

Document overview

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Technical content

Datasheet sections

  • 1 Pin settings
  • 1.1 Pin connection
  • 1.2 Pin description
  • 2 Electrical data
  • 2.1 Maximum ratings
  • 2.2 Thermal data
  • 3 Electrical characteristics
  • 4 Functional description
  • 4.1 Power supply & voltage reference
  • 4.2 Voltages monitor
  • 4.3 Oscillator & synchronizator
  • 4.4 Current protection
  • 4.5 Error amplifier
  • 4.6 PWM comparator and power stage
  • 4.7 Inhibit function
  • 4.8 Thermal shutdown
  • 5 Additional features and protections
  • 5.1 Feedback disconnection
  • 5.2 Output overvoltage protection
  • 5.3 Zero load
  • 5.4 Application circuit
  • 6 Application ideas
  • 7 Package mechanical data
  • 8 Order code
  • 9 Revision history

2A switch step down switching regulator General features ■ 2A Internal switch ■ Operating input voltage from 4V to 36V ■ 3.3V / (±2%) reference voltage ■ Output voltage adjustable from 1.235V to 35V ■ Low dropout operation: 100% duty cycle ■ 500KHz Internally fixed frequency ■ Voltage feedforward ■ Zero load current operation ■ Internal current limiting ■ Inhibit for zero current consumption ■ Synchronization ■ Protection against feedback disconnection ■ Thermal shutdown

Applications

■ Consumer: STB, DVD, TV, VCR, car radio, LCD monitors ■ Networking: XDSL, modems, DC-DC modules ■ Computer: printers, audio/graphic cards, optical storage, hard disk drive ■ Industrial: chargers, car battery, DC-DC converters

Description

The L5973AD is a step down monolithic power switching regulator with a switch current limit of 2A so it is able to deliver more than 1.5A DC current to the load depending on the application conditions. The output voltage can be set from 1.235V to 35V. The high current level is also achieved thanks to an SO8 package with exposed frame, that allows to reduce the R thJA down to approximately 40°C/W. The device uses an internal P-Channel D-MOS transistor (with a typical of 200mΩ) as switching element to avoid the use of bootstrap capacitor and guarantee high efficiency. An internal oscillator fixes the switching frequency at 500KHz to minimize the size of external components. Having a minimum input voltage of 4V only, it is particularly suitable for 5V bus, available in all computer related applications. Pulse by pulse current limit with the internal frequency modulation offers an effective constant current short circuit protection. HSOP8 Exposed Pad Test application circuit D03IN1453 L5973AD 10µF 35V CERAMIC 330µF 10V VOUT=3.3V VIN = 4V to 35V 5.6K 3.3KR3 4.7K 22nF 220pF L1 15µH STPS340U COMP VCC OUT FB GNDINH 63.3V SYNC. VREF

1 Pin settings

1.1 Pin connection

Figure 1. Pin connection (top view)

1.2 Pin description

Table 1. Pin description

2 SYNC

synchronized by the external signal. frequency works as master and the other one, works as slave. the device is OFF and with INH lower than 0.8V, the device is ON. 4 COMP E/A output to be used for frequency compensation. between this pin and ground is 4.7K). 6 VREF Reference voltage of 3.3V. No filter capacitor is needed to stability. 8 VCC Unregulated DC input voltage.

2 Electrical data

2.1 Maximum ratings

2.2 Thermal data

Table 2. Absolute maximum ratings I1 Maximum output current int. limit. Table 3. Thermal data

3 Electrical characteristics

Table 4. Electrical characteristics Dynamic characteristics (see test circuit ).

Table 4. Electrical characteristics (continued)

4 Functional description

The main internal blocks are shown in Figure 2, where is reported the device block diagram.

  • A voltage regulator that supplies the internal circuitry. From this regulator, a 3.3V reference voltage is externally available.
  • A voltage monitor circuit that checks the input and internal voltages.
  • A fully integrated sawtooth oscillator whose frequency is 500KHz
  • Two embedded current limitations circuitries which control the current that flows through the power switch. The Pulse by Pulse Current Limit forces the power switch OFF cycle by cycle if the current reaches an internal threshold, while the Frequency Shifter reduces the switching frequency in order to strongly reduce the duty cycle.
  • A transconductance error amplifier.
  • A pulse width modulator (PWM) comparator and the relative logic circuitry necessary to drive the internal power.
  • An high side driver for the internal P-MOS switch.
  • An inhibit block for stand-by operation.
  • A circuit to realize the thermal protection function.

Figure 2. Block diagram

4.1 Power supply & voltage reference

and the device is enabled (inhibit pin connected to ground). a very low supply voltage noise sensitivity.

4.2 Voltages monitor

Figure 3. Internal regulator circuit

4.3 Oscillator & synchronizator

Figure 4 shows the block diagram of the oscillator circuit. the input of the Ramp Generator and Synchronizator blocks. As Master to synchronize external devices to the internal switching frequency.

As Slave to synchronize itself by external signal. works as Slave and the other one works as Master. 90%, depending also on the signal frequency and amplitude. switching frequency of the device (500KHz). Figure 4. Oscillator circuit

4.4 Current protection

The L5973AD has two current limit protections, pulse by pulse and frequency fold back. of the internal clock pulse. Due to this reduction of the ON time, the output voltage decreases. frequency is also reduced, so keeping the inductor current under its maximum threshold. voltage decreases (due to the reduced duty cycle), the switching frequency decreases too.

Figure 5. Current li mitation circuitry

4.5 Error amplifier

The error amplifier output is compared with the oscillator sawtooth to perform PWM control. Table 5. Uncompensated error amplifier

L5973AD Functional description

4.6 PWM comparator and power stage

This block compares the oscillator sawtooth and the error amplifier output signals generating the PWM signal for the driving stage. The power stage is a very critical block cause it has to guarantee a correct turn on and turn OFF of the PDMOS. The turn ON of the power element, or better, the rise time of the current at turn on, is a very critical parameter to compromise. At a first approach, it looks like the faster it is the rise time, the lower are the turn on losses. But there is a limit introduced by the recovery time of the recirculation diode. In fact when the current of the power element equals the inductor current, the diode turns off and the drain of the power is free to go high. But during its recovery time, the diode can be considered as an high value capacitor and this produces a very high peak current, responsible of many problems:

  • Spikes on the device supply voltage that cause oscillations (and thus noise) due to the board parasitics.
  • Turn ON overcurrent causing a decrease of the efficiency and system reliability.
  • Big EMI problems.
  • Shorter freewheeling diode life. The fall time of the current during the turn off is also critical. In fact it produces voltage spikes (due to the parasitics elements of the board) that increase the voltage drop across the PDMOS. In order to minimize all these problems, a new topology of driving circuit has been used and its block diagram is shown in Figure 6. The basic idea is to change the current levels used to turn on and off the power switch, according with the PDMOS status and with the gate clamp status. This circuitry allow to turn off and on quickly the power switch and to manage the above question related to the freewheeling diode recovery time problem. The gate clamp is necessary to avoid that Vgs of the internal switch goes higher than Vgsmax. The ON/OFF Control block avoids any cross conduction between the supply line and ground.

Figure 6. Driving circuitry

4.7 Inhibit function

ensures that the voltage at the pin reaches the inhibit threshold and the device is disabled. The pin is also Vcc compatible.

4.8 Thermal shutdown

L5973AD Additional features and protections

5 Additional features and protections

5.1 Feedback disconnection

In case of feedback disconnection, the duty cycle increases versus the maximum allowed value, bringing the output voltage close to the input supply. This condition could destroy the load. To avoid this dangerous condition, the device is turned off if the feedback pin remains floating.

5.2 Output overvoltage protection

The overvoltage protection, OVP , is realized by using an internal comparator, which input is connected to the feedback, that turns off the power stage when the OVP threshold is reached. This threshold is typically 30% higher than the feedback voltage. When a voltage divider is requested for adjusting the output voltage (see test application circuit), the OVP intervention will be set at: Equation 1 Where R 1 is the resistor connected between the output voltage and the feedback pin, while R2 is between the feedback pin and ground.

5.3 Zero load

Due to the fact that the internal power is a PDMOS, no boostrap capacitor is required and so, the device works properly also with no load at the output. In this condition it works in burst mode, with random repetition rate of the burst.

5.4 Application circuit

In Figure 7 is shown the demo board application circuit, where the input supply voltage, VCC, can range from 4V to 25V due to the rated voltage of the input capacitor and the output voltage is adjustable from 1.235V to VCC. VOVP 1.3 R1 R2+

Figure 7. Demo board application circuit Table 6. Component List

6 Application ideas

Figure 12. Positive Buck-Boost regulator Figure 13. Buck-Boost regulator Figure 14. Dual output voltage with auxiliary winding

Refer to L5973AD application note (AN1723) to have additional information, details, and more application ideas. L5973AD belongs to L597x family. Related part numbers are:

  • L5970D: 1.5A (Isw), 250KHz Step Down DC-DC Converter in SO8
  • L5972D: 2A (Isw), 250KHz Step Down DC-DC Converter in SO8
  • L5973D: 2.5A (Isw), 250KHz Step Down DC-DC Converter in HSOP8 In case higher current is needed, the nearest DC-DC Converter family is L497x.

Package mechanical data L5973AD

7 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com

Table 7. HSOP8 Mechanical data Figure 15. Package dimensions

8 Order code

9 Revision history

Table 8. Order code Table 9. Revision history December 2004 3 Added D1 & E1 dimensions in HSOP8 package information. November 2005 4 Updated the package information section.