L5962_V01 STM | Alldatasheet
Document overview
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- PDF pages: 24
Technical content
Datasheet sections
- 1 Block and application diagram
- 2 Pin description
- 3 Electrical specification
- 3.1 Absolute maximum ratings
- 3.2 Thermal data
- 3.3 Electrical characteristics
- 4 Device description
- 4.1 Regulators
- 4.1.1 Linear regulators
- 4.1.2 Switching regulator
- 4.2 High side drivers
- 5 Operating mode
- 5.1 Battery detection
- 6.1 Data validity
- 6.2 Start and stop conditions
- 6.3 Byte format
- 6.4 Acknowledge
- 7 Software specifications
- 8 Package information
- 9 Revision history
Features
■ Step-down synchronous switching voltage regulator – Internal high-side/ Low-side NDMOS –1 . 2 < V out < 8 V selectable through external resistors – 1.2/2.5 A load current selected through dedicated pin – 185 kHz free-run frequency – SYNC function (220 < f sw < 400 kHz) ■ Linear regulators – 3.3/5 V @ 150 mA standby regulator selected through dedicated pin (VSTBYSEL) – 5/8.5 V @ 350 mA switched linear regulator enabled and selected through I 2C bus (VLR1) – 3.3/10 V @ 1 A switched linear regulator enabled and selected through I2C bus (VLR2) ■ 2 High side drivers (0.5 V max drop @ 0.5 A) enabled through I 2C bus and equipped with protection circuit against: – short to ground and battery – loss of ground and battery – unsupplied short to battery ■ Reset function with configurable delay (RST, RSTDLY) ■ I2C bus ■ Enable pin to drive switching regulator and I2C bus logic ■ Under/over voltage battery detector (VBATVW) – Under voltage threshold adjustable through dedicated pin (LVWIN) ■ Load dump protection ■ Independent thermal protection on all regulators
Description
L5962 is a very versatile device exploiting BCD technology characteristics to provide a complete set of regulated voltages covering all the needs of a car-radio set. In standby condition the device guarantees extremely low quiescent current (90 µA max - 40 °C < T < 85 °C) and minimum operating voltage (4.5 V using an external Schottky diode for the back-up function). PowerSO36 (slug-up) Table 1. Device summary
1 Block and application diagram
Figure 1. Block diagram
Figure 2. Application diagram
34 CLIM
33 VFB
32 VCMP
31 SOST
30 SYNC
29 SCL
27 RESET
26 VLR2
25 VINLR
24 SDA
23 VLR1
22 VBATW
21 LVWIN
2 Pin description
Figure 3. Pin connection (top view) Table 2. Pin description
1 TAB This pin must be connected to GND
2 PGND Switching regulator ground It is the power ground reference
3 CBS Bootstrap for switching regulator Bootstrap capacitor Input for the switching
4 PH Switching stage output
reference for bootstrap drive.
7 SUBGND Substrate ground Substrate ground
8 VINsw Switching regulator supply voltage Battery voltage for the switching regulator
9 HSD1 High side driver 1 Output of the 1
10 VBAT VLR1/HSD1/HSD2 supply voltage Voltage input for linear regulator #1 high side
11 HSD2 High side driver 2 Output of the 2 nd high side driver
12 VBATP Standby regulator supply voltage Protected battery input for bias, bandgap,
13 RSTDL Y Reset delay function Input
14 VSTBY Standby regulator output Output of the standby regulator
16 AGND Analog ground Analog voltage reference
21 LVWIN Battery detector adjustme nt input Low-voltage warning input
22 VBATW Battery detector output (open-drain) Battery voltage warning output
23 VLR1 Switched linear regul ator 1 Output of the 1
24 SDA I 2C bus data I 2C data line
25 VINLR2 VLR2 supply voltage Battery supply for the 2 nd linear regulator
26 VLR2 Switched linear regul ator 2 Output of the 2 nd linear regulator
27 RST Reset Output
29 SCL I
30 SYNC Switching regulator SYNC function Synchronization Input
31 SOST Switching regulato r soft-start Soft start external capacitor
32 VCMP Switching regulator compensation Feedback compensation input.
33 VFB Switching regulator feedback Regulated output voltage sense
34 CLIM Switching regulator current limit selector Choose between two current limits
Table 2. Pin description (continued)
3 Electrical specification
3.1 Absolute maximum ratings
3.2 Thermal data
3.3 Electrical characteristics
VBAT= VINSW = VINLR2 = 14.4 V, Tamb = 25 °C unless otherwise specified. Table 3. Absolute maximum ratings Table 4. Thermal data Table 5. Electrical characteristics
120 Hz < f < 10 kHz
20 Hz < f < 20 kHz
Table 5. Electrical characteristics (continued)
120 Hz<f<10 kHz
- by bench characterization
4 Device description
The IC includes one standby regulator, always active to guarantee the standby functions; two switched linear regulators, managed by the I2C bus and a step-down switching voltage regulator with selectable current limit.
4.1 Regulators
The VSTBY regulator is always active when the IC is supplied. The other regulators can be enabled or disabled. Their outputs are automatically disabled whenever the VBAT voltage exceeds the over-voltage shutdown threshold. Upon return from over-voltage shutdown, the outputs recover without intervention from the system.
4.1.1 Linear regulators
VSTBY (3.3 V / 5.0 V standby) VSTBY is a linearly regulated 3.3/5 V output. This output is enabled on battery connect. It is supplied from the protected battery input (VBATP). In order to select the 3.3 V output, the VSTBYSEL pin must be connected to ground. In order to select the 5.0 V output, the VSTBYSEL pin must be connected to 5 V. When the dropout voltage of the regulator cannot be maintained, the output shall track the VBATP input voltage less the saturation voltage of the regulator pass element. This regulator has a short circuit protection consisting of current limit, and thermal shutdown. If the local die temperature exceeds the thermal shutdown detection threshold, the output is disabled. The thermal shutdown circuitry has hysteresis such that the output is enabled only after the die temperature falls below the thermal shutdown disable threshold. Thermal shutdown on this output doesn't directly disable any other circuitry. RST provides an indication that VSTBY is in regulation. It is an open drain output used to indicate that VSTBY is in regulation (below the low-voltage threshold). RST remains low until VSTBY achieves regulation and the RSTDL Y input has charged to its threshold. For instance, RST remains low during battery connect and disconnect and under low-voltage battery lockout. The transition from standby mode to active mode (and vice versa) does not cause the RST output to be triggered. RSTDL Y provides a means to delay the releasing of RST once VSTBY has achieved regulation. It is used to delay the release of RST when VSTBY achieves regulation. This input has a current source to charge an external capacitor and an internal pull-down to discharge the external capacitor. The voltage on this capacitor is used to control the operation of the RST output. The RSTDL Y pull-down is activated when a loss of regulation is detected. The input remains low until VSTBY once again achieves regulation. When the RSTDL Y is released the current source charges the external capacitor. When the voltage exceeds the pin's threshold, RST pin is also released, disabling its pull-down.
The output of these two regulators can be selected through the I2C bus. When the dropout voltage of the regulator cannot be maintained, the output tracks the VBAT input voltage less the saturation voltage of the regulator pass element. This regulator has a short circuit protection consisting of current limit and thermal shutdown. If the local die temperature exceeds the thermal shutdown detection threshold, the output is disabled. The thermal shutdown circuitry has hysteresis such that the output is enabled only after the die temperature falls below the thermal shutdown disable threshold. Thermal shutdown on this output doesn't directly disable any other circuitry. VLR2 has its own power supply (VINLR2) because of its high current capability.
4.1.2 Switching regulator
The IC contains an independent, step-down, synchronous switching regulator, which is used to produce an output voltage that is adjustable in the system by means of an external resistor divider. The switching regulator functionality is guaranteed in the 1.2-8.0 V output voltage range. The switching frequency is externally synchronizable. The switcher has its own supply input pin (VINSW) and is enabled by the EN input. The regulator contains soft-start control to protect external devices from excessive in-rush currents. This control is independent of the presence of a synchronizing signal on the SYNCH input. The switching cycle is synchronized to the internal oscillator unless a signal is present on the SYNC input. The signal present on the SYNCH input overrides the internal oscillator to control the switching of the regulator if its frequency gets inside the allowed range (220- 400 kHz). The IC detects a small number of edges (e.g. 2-5) prior to recognize a valid input signal and synchronizing internal operation to the external signal. It is designed to operate in continuous conduction mode (CCM), where the inductor current remains continuous throughout the entire load range of the output. It can also work in DCM mode. This regulator has short circuit protection consisting of cycle-by-cycle duty-cycle limitation. Upon return from over-voltage shutdown this regulator employs the soft-start. An external bootstrap capacitor must be connected between the output (PH, phase output pin) and the CBS pin. The switching regulator output slew rate can be controlled with an external capacitor on the SOST (soft start) pin. This protects the device against excessive dV/dt transients, lowering the stress of the internal components. A maximum slews rate of 10 V/ms is suggested. Two separate current limits for the switching regulator can be chosen in order to guarantee a proper protection for the device at the desired load current rating. The CLIM pin should be tied to ground for the low limit (max 3 A) or to 5.0 V for the high limit (max 6 A). The VFB pin is the voltage feedback from the regulated output for the switching regulator; the VCMP one is the compensation feedback for the switching regulator.
4.2 High side drivers
The device embeds fully-protected high-side drivers for use outside of the car-radio module. HSD1, HSD2 These high side driver outputs have short circuit protections consisting of current limit and independent thermal shutdown. If the local die temperature exceeds the thermal shutdown detection threshold, the output is disabled. The thermal shutdown circuitry has hysteresis such that the output is enabled only after the die temperature falls below the thermal shutdown disable threshold. Thermal shutdown on any one output doesn't directly disable any other circuitry. HSD1 and HSD2 are protected from shorts to ground and shorts to battery (0-18 V) during a loss of car-radio module battery.
5 Operating mode
(VSTBY) regulator and battery detection are functional. The standby mode is activated when the enable (EN) input is asserted low. (where the IC enters the standby state).
5.1 Battery detection
overvoltage detection circuit has hysteresis for noise rejection. LVWIN, the detector sets the threshold to a nominal 7.5 V. when the fault condition is removed. reference (VBG), VBATW is pulled down to ground. Figure 4. Low voltage warning high level block diagram
6 I 2C bus interface
positive supply voltage must be connected).
6.1 Data validity
6.2 Start and stop conditions
6.3 Byte format
acknowledge bit. The MSB is transferred first.
6.4 Acknowledge
Figure 5. Data validity on the I
7 Software specifications
Table 6. Chip address
0001000 R / W 1 0 H e x
Table 7. IB1 data byte Table 8. VLR2 output level selection
8 Package information
specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Figure 8. PowerSO36 (slug-up) mechanical data and package dimensions (1) “D and E1” do not include mold flash or protusions. Mold flash or protusions shall not exceed 0.15mm (0.006”). (2) No intrusion allowed inwards the leads.
9 Revision history
Table 9. Document revision history 24-Nov-2009 1 Initial release. package dimensions on page 22. 18-Sep-2013 3 Updated Disclaimer.