L5950 STMICROELECTRONICS | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 8

Technical content

5 REGULATORS

10V (350mA); 8.5V (175mA); 5V (350mA); 5V (250mA); 8V/10V (1A) ALL REGULATORS ARE LOW DROPOUT OUPUTS

3 HIGH SIDE DRIVERS:

2A (HSD1), 0.45A (HSD2 & HSD3) NO EXTERNAL CHARGE PUMP CAPACI- TORS ARE REQUIRED STAND BY MODE CONTROLLED BY 3 IN- PUT PINS: ENABLE FOR REG2 AND REG3, I2C BUS FOR REG1, REG4, REG5, HSD1, HSD2, HSD3 INDIVIDUAL THERMAL SHUTDOWN INDEPENDENT CURRENT LIMITING SHORT CIRCUIT PROTECTION LOAD DUMP PROTECTION AND OVERVOL- TAGE SHUTDOWN ESD PROTECTED

DESCRIPTION

The ASPM (Audio System Power Module) is an integration of three high side drivers and five regulators developed to provide the power for an audio system. The outputs of the IC are controlled via the I2C bus and the Enable input. External protection must be provided for reverse battery protection. March 2001 VOLTAGE REFERENCE REG 1 10V 350mA REG 2 8.5V 175mA REG 3 5V 350mA REG 4 8V/10V 1A REG 5 5V 250mA 8.5 & 5V ENABLE PC OUTPUT CONTROL CURRENT LIMIT PROTECTION LOGIC INDIVIDUAL THERMAL SHUTDOWN OVERVOLTAGE PROTECTION DRIVE 1 DRIVE 2 450mA DRIVE 3 450mA REG1 REG2 REG3 REG4 REG5 HSD1 HSD2 HSD3 BAT GND VREF ENABLE SCL SDA D99AU1002 BLOCK DIAGRAM Multiwatt15 L5950 MULTIPLE MULTIFUNCTION VOLTAGE REGULATOR FOR CAR RADIO

Symbol Parameter Value Unit Rth j-case Thermal Resistance Junction-case 2 °C/W REG2 REG1 VREF GND SCL Enable SDA HSD3 HSD2 BAT HSD1 REG4 BAT REG5 REG3 D99AU1006 PIN CONNECTION ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VS DC Operating Supply Voltage -0.6 to 26.5 V VS Transient Supply Overvoltages, rise time = 10ms delay time = 115ms 34 V Vin Input Voltages (EN, SDA, SCL) -0.6 to 9 V Vout Output Control Voltage -0.6 to 6.0 V Top Operating Temperature Range -40 to 85 °C Tstg Storage Temperature Range -40 to 150 °C L5950

ELECTRICAL CHARACTERISTICS (Refer to the application circuit, VS = 14.4V; Tamb = 25°C; unless otherwise specified.) Symbol Parameter Test Condition Min. Typ. Max. Unit Iq,ST-BY Standby Quiescent Current All Outputs Off, VBAT = 14V 2 µA Iq Maximum Quiescent Current V BAT = 14V, IREG1 = 350mA, IREG2 = 175mA, IREG3 = 350mA, IREG4 = 1A, IREG5 = 250mA, IHSD1 = 2A, IHSD2,3 = 450mA 150 mA IEN Enable Input Current V BAT = 14V, Enable ≥ 2V VBAT = 14V, Enable ≥ 0.8V -10 10 µA µA VIL, VIH Enable Threshold Voltage V BAT = 14V, VIL VBAT = 14V, VIH 2 0.8 V V 10V/350mA REG 1 OUTPUT VREG1 Output Voltage I REG1 = 350mA 11V ≤ VCC ≤ 16V 9.50 10 10.5 V ΔVline Line Regulation 11V ≤ VCC ≤ 26V (Measure Δ VREG1 Across VCC Range) 55 mV ΔVload Load Regulation 5mA ≤ IREG1 ≤ 350mA 55 mV VDROPOUT Dropout Voltage (Measure VBAT - VREG1 when VREG1 drops 0.1V) (Measure VBAT - VREG1 when VREG1 drops 0.1V) IREG1 = 350mA IREG1 = 5mA 900 300 mV mV Ilim1 Current Limit 0.51 1.1 A SVR Ripple Rejection f o = 1kHz, VBAT = 14V with 1Vpp AC IREG1 = 175mA 50 dB 8.5V/175mA REG 2 OUTPUT VREG2 Output Voltage I REG2 = 175mA 9.5V ≤ VBAT ≤ 16V 8.3 8.5 8.7 V ΔVline Line Regulation 9.5V ≤ VBAT ≤ 26V (Measure Δ VREG2 Across VBAT Range) 50 mV ΔVload Load Regulation 5mA ≤ IREG2 ≤ 175mA 50 mV VDROPOUT Dropout Voltage (Measure VBAT- V REG2 when VREG2 drops 0.1V) IREG2 = 175mA IREG2 = 5mA 900 300 mV mV Ilim2 Current Limit 280 525 mA SVR Ripple Rejection f o = 1kHz, VBAT = 14V with 1Vpp AC IREG2 = 100mA 50 dB 5V/350mA REG 3 OUTPUT VREG3 Voltage Offset from VREF 10 40 mV ΔVline Line Regulation 7V ≤ VBAT ≤ 26V (Measure Δ VREG3 Across VBAT Range) 40 mV ΔVload Load Regulation 5mA ≤ IREG3 ≤ 350mA 100 mV L5950

Symbol Parameter Test Condition Min. Typ. Max. Unit VDROPOUT Dropout Voltage (Measure VBAT- VREG3 when VREG3 drops 0.1V) (Measure VBAT- VREG3 when VREG3 drops 0.1V) IREG3 = 175mA IREG3 = 5mA 950 600 mV mV Ilim3 Current Limit 0.5 1 A SVR Ripple Rejection f o = 1kHz, VBAT = 14V with 1Vpp AC IREG3 = 175mA 50 dB 8/10V/1A REG 4 OUTPUT VREG4 Output Voltage I REG4 = 1A b5 = 0 b5 = 1 7.6 9.50 8.4 10.5 V V ΔV line Line Regulation 11V ≤ VBAT ≤ 26V, b5 = 1 (Measure Δ VREG2 Across VBAT Range) 50 mV ΔVload Load Regulation 5mA ≤ IREG4 ≤ 1A 150 mV VDROPOUT Dropout Voltage (Measure VBAT- V REG2 when VREG2 drops 0.1V) IREG4 = 1A IREG4 = 5mA 950 600 mV mV Ilim4 Current Limit 1.3 2.4 A SVR Ripple Rejection f o = 1kHz, VBAT = 14V with 1Vpp AC I REG4 = 500mA 50 dB 5V/250mA REG 5 OUTPUT VREG5 Output Voltage I REG5 = 250mA 4.75 5 5.25 V ΔVline Line Regulation 7V ≤ VBAT ≤ 26V (Measure Δ VREG5 Across VBAT Range) 40 mV ΔVload Load Regulation 5mA ≤ IREG5 ≤250mA 100 mV VDROPOUT Dropout Voltage (Measure VBAT- V REG5 when VREG5 drops 0.1V) IREG5 = 250A IREG5 = 5mA 1.6 1.2 V V Ilim5 Current Limit 320 700 mA SVR Ripple Rejection f o = 1kHz, VBAT = 14V with 1Vpp AC I REG5 = 125mA 50 dB 2A HSD1 Vsat Output Saturation Voltage IHSD1 = 1A Continuous Time Operation 0.5 V Ileak1 Output Leakage Current All Driver Outputs are Off -50 50 µA Ilim Current Limiting R HSD1 = 0.5Ω 2.4 4 A 0.45A HSD2 & HSD3 Vsat Output Saturation Voltage IHSD2,3 = 300mA Continuous Time Operation 0.6 V Ileak2,3 Output Leakage Current All Driver Outputs are Off -50 50 µA Ilim Current Limiting R HSD2,3 = 0.5Ω 0.56 1 A ELECTRICAL CHARACTERISTICS (continued) L5950

pacitors with ESR of 0.1Ω to 5Ω . erance output than the other regulator outputs. other outputs are ±5% variation over temperature. voltage offset between individual 5V supplies. while 10V is the output voltage when bit5 = ’1’. tain its own current protection. voltage reaches 27V typ. or above. Figure 1. Definition of Timing on the I2C Bus.

Figure 2. Typical Application Circuit. P = STOP condition - SDA goes from low to high while SCL is high. Default mode is 0000 0000 which corresponds to all outputs being off, low power mode. Bit 5 Controls the output voltage of REG4. A ’0’ corresponds to 8V and a ’1’ corresponds to 10V. (*) ESR of output capacitors should be between 0.1Ω and 5.0Ω .

DIM. mm inch A 5 0.197 B 2.65 0.104 C 1.6 0.063 D 1 0.039 E 0.49 0.55 0.019 0.022 F 0.66 0.75 0.026 0.030 H1 19.6 0.772 H2 20.2 0.795 L2 17.65 18.1 0.695 0.713 L7 2.65 2.9 0.104 0.114 S 1.9 2.6 0.075 0.102 S1 1.9 2.6 0.075 0.102 Dia1 3.65 3.85 0.144 0.152 OUTLINE AND MECHANICAL DATA L5950

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics © 2001 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com L5950