SN74LVC573A-Q1 TI | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 8
Technical content
/C0083/C0078/C0055/C0052/C0076/C0086/C0067/C0053/C0055/C0051/C0065/C0262/C0081/C0049 /C0079/C0067/C0084/C0065/C0076 /C0084/C0082/C0065/C0078/C0083/C0080/C0065/C0082/C0069/C0078/C0084 /C0068/C0262/C0084/C0089/C0080/C0069 /C0076/C0065/C0084/C0067/C0072 /C0087/C0073/C0084/C0072 /C0051/C0262/C0083/C0084/C0065/C0084/C0069 /C0079/C0085/C0084/C0080/C0085/C0084/C0083 SCAS714A − SEPTEMBER 2003 − REVISED MAY 2004 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068Qualification in Accordance With AEC-Q100 † /C0068Qualified for Automotive Applications /C0068Customer-Specific Configuration Control Can Be Supported Along With Major-Change Approval /C0068ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) /C0068Operates From 2 V to 3.6 V /C0068Inputs Accept Voltages to 5.5 V /C0068Max tpd of 6.9 ns at 3.3 V /C0068Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C /C0068Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C † Contact factory for details. Q100 qualification data available on request. /C0068Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V V CC ) /C0068Ioff Supports Partial-Power-Down Mode Operation description/ordering information The SN74LVC573A octal transparent D-type latch is designed for 2.7-V to 3.6-V VCC operation. This device features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, input/output (I/O) ports, bidirectional bus drivers, and working registers. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels at the D inputs. A buffered output-enable (OE ) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA PACKAGE ‡ ORDERABLE PART NUMBER TOP-SIDE MARKING −40°C to 125°C SOIC − DW Reel of 2000 SN74LVC573AQDWRQ1 L573AQ1 −40°C to 125°C TSSOP − PW Reel of 2000 SN74LVC573AQPWRQ1 L573AQ1 ‡ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Copyright 2004, Texas Instruments Incorporated/C0080/C0082/C0079/C0068/C0085/C0067/C0084/C0073/C0079/C0078 /C0068/C0065/C0084/C0065 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0105/C0115 /C0099/C0117/C0114/C0114/C0101/C0110/C0116 /C0097/C0115 /C0111/C0102 /C0112/C0117/C0098/C0108/C0105/C0099/C0097/C0116/C0105/C0111/C0110 /C0100/C0097/C0116/C0101/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0110/C0102/C0111/C0114/C0109 /C0116/C0111 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0112/C0101/C0114 /C0116/C0104/C0101 /C0116/C0101/C0114/C0109/C0115 /C0111/C0102 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0115/C0116/C0097/C0110/C0100/C0097/C0114/C0100 /C0119/C0097/C0114/C0114/C0097/C0110/C0116/C0121/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. DW OR PW PACKAGE (TOP VIEW) OE GND V CC LE
/C0083/C0078/C0055/C0052/C0076/C0086/C0067/C0053/C0055/C0051/C0065/C0262/C0081/C0049 /C0079/C0067/C0084/C0065/C0076 /C0084/C0082/C0065/C0078/C0083/C0080/C0065/C0082/C0069/C0078/C0084 /C0068/C0262/C0084/C0089/C0080/C0069 /C0076/C0065/C0084/C0067/C0072 /C0087/C0073/C0084/C0072 /C0051/C0262/C0083/C0084/C0065/C0084/C0069 /C0079/C0085/C0084/C0080/C0085/C0084/C0083 SCAS714A − SEPTEMBER 2003 − REVISED MAY 2004
2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description/ordering information (continued) To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment. FUNCTION TABLE (each latch) INPUTS OUTPUT OE LE D OUTPUT Q L H H H L HL L L LX Q 0 H X X Z logic diagram (positive logic) OE To Seven Other Channels LE absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Voltage range applied to any output in the high-impedance or power-off state, VO Voltage range applied to any output in the high or low state, VO † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. 2. The value of VCC is provided in the recommended operating conditions table. 3. The package thermal impedance is calculated in accordance with JESD 51-7.
/C0083/C0078/C0055/C0052/C0076/C0086/C0067/C0053/C0055/C0051/C0065/C0262/C0081/C0049 /C0079/C0067/C0084/C0065/C0076 /C0084/C0082/C0065/C0078/C0083/C0080/C0065/C0082/C0069/C0078/C0084 /C0068/C0262/C0084/C0089/C0080/C0069 /C0076/C0065/C0084/C0067/C0072 /C0087/C0073/C0084/C0072 /C0051/C0262/C0083/C0084/C0065/C0084/C0069 /C0079/C0085/C0084/C0080/C0085/C0084/C0083 SCAS714A − SEPTEMBER 2003 − REVISED MAY 2004 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 recommended operating conditions (see Note 4) MIN MAX UNIT VCC Supply voltage Operating 2 3.6 VVCC Supply voltage Data retention only 1.5 V VIH High-level input voltage VCC = 2.7 V to 3.6 V 2 V VIL Low-level input voltage VCC = 2.7 V to 3.6 V 0.8 V VI Input voltage 0 5.5 V VO Output voltage High or low state 0 VCC VVO Output voltage 3-state 0 5.5 V IOH High-level output current VCC = 2.7 V −12 mAIOH High-level output current VCC = 3 V −24 mA IOL Low-level output current VCC = 2.7 V 12 mAIOL Low-level output current VCC = 3 V 24 mA ∆t/∆v Input transition rise or fall rate 6 ns/V TA Operating free-air temperature −40 125 °C NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC MIN TYP † MAX UNIT IOH = −100 µA 2.7 V to 3.6 VVCC −0.2 VOH IOH = −12 mA 2.7 V 2.2 VVOH IOH = −12 mA 3 V 2.4 V IOH = −24 mA 3 V 2.2 IOL = 100 µA 2.7 V to 3.6 V 0.2 VOL IOL = 12 mA 2.7 V 0.4 VVOL IOL = 24 mA 3 V 0.55 V II VI = 0 to 5.5 V 3.6 V ±5 µA IOZ VO = 0 to 5.5 V 3.6 V ±15 µA ICC VI = VCC or GND IO = 0 3.6 V AICC 3.6 V ≤ VI ≤ 5.5 V‡ IO = 0 3.6 V 10 µA ∆ICC One input at VCC − 0.6 V, Other inputs at VCC or GND 2.7 V to 3.6 V 500 µA C i VI = VCC or GND 3.3 V 4 pF C o VO = VCC or GND 3.3 V 5.5 pF † All typical values are at VCC = 3.3 V, TA = 25°C. ‡ This applies in the disabled state only. timing requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) VCC = 2.7 V VCC = 3.3 V ± 0.3 V UNIT MIN MAX MIN MAX UNIT tw Pulse duration, LE high 3.3 3.3 ns tsu Setup time, data before LE↓ 2 2 ns th Hold time, data after LE↓ 2.5 2.5 ns
/C0083/C0078/C0055/C0052/C0076/C0086/C0067/C0053/C0055/C0051/C0065/C0262/C0081/C0049 /C0079/C0067/C0084/C0065/C0076 /C0084/C0082/C0065/C0078/C0083/C0080/C0065/C0082/C0069/C0078/C0084 /C0068/C0262/C0084/C0089/C0080/C0069 /C0076/C0065/C0084/C0067/C0072 /C0087/C0073/C0084/C0072 /C0051/C0262/C0083/C0084/C0065/C0084/C0069 /C0079/C0085/C0084/C0080/C0085/C0084/C0083 SCAS714A − SEPTEMBER 2003 − REVISED MAY 2004
4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 2.7 V VCC = 3.3 V ± 0.3 V UNITPARAMETER (INPUT) (OUTPUT) MIN MAX MIN MAX UNIT tpd D Q 7.7 1 6.9 nstpd LE Q 8.4 1 7.7 ns ten OE Q 8.5 1 7.5 ns tdis OE Q 7 0.5 6.7 ns operating characteristics, TA = 25°C PARAMETER TEST VCC = 2.5 V VCC = 3.3 V UNITPARAMETER TEST CONDITIONS TYP TYP UNIT C pd Power dissipation capacitance per latch Outputs enabled f = 10 MHz 56 37 pFC pd Power dissipation capacitance per latch Outputs disabled f = 10 MHz 3 4 pF
0 V0 V
NOTES: A. C L includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,65 M0,10 0,10 0,25 0,50 0,75 0,15 NOM Gage Plane 9,80 9,60 7,90 7,70 2016 6,60 6,40 4040064/F 01/97 0,30 6,60 6,20 0,19 4,30 4,50 0,15 A 1,20 MAX 5,10 4,90 3,10 2,90 A MAX A MIN DIM PINS ** 0,05 4,90 5,10 Seating Plane 0°–8° NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-153
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.com Audio www.ti.com/audio Data Converters dataconverter.ti.com Automotive www.ti.com/automotive DSP dsp.ti.com Broadband www.ti.com/broadband Interface interface.ti.com Digital Control www.ti.com/digitalcontrol Logic logic.ti.com Military www.ti.com/military Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork Microcontrollers microcontroller.ti.com Security www.ti.com/security Telephony www.ti.com/telephony Video & Imaging www.ti.com/video Wireless www.ti.com/wireless Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2004, Texas Instruments Incorporated