L4995_V01 STM | Alldatasheet
Document overview
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- PDF pages: 36
Technical content
Datasheet sections
- 1 Block diagrams and pins descriptions
- 2 Electrical specifications
- 2.1 Absolute maximum ratings
- 2.2 Thermal data
- 2.3 Electrical characteristics
- 2.4 Electrical characteristics curves
- 2.5 Test circuit and waveforms plot
- 2.5.1 Load regulation
- 3 Application information
- 3.1 Voltage regulator
- 3.2 Reset
- 3.3 Watchdog
- 4 Package and PCB thermal data
- 4.1 PowerSSO-12 thermal data
- 4.2 PowerSSO-24 thermal data
- 5 Package and packing information
- 5.1 ECOPACK ®
- 5.2 PowerSSO-24 mechanical data
- 5.3 PowerSSO-12 packing information
- 5.4 PowerSSO-24 packing information
- 6 Revision history
Features
AEC-Q100 qualified Operating DC supply voltage range 5.6 V to 31 V Low dropout voltage Low quiescent current consumption Reset circuit sensing of output voltage down to 1 V Programmable reset pulse delay with external capacitor Programmable watchdog timer with external capacitor Thermal shutdown and short circuit protection Wide temperature range (Tj = -40 °C to 150 °C) Enable input for enabling/disabling the voltage regulator
Description
L4995 is a family of monolithic integrated 5 V voltage regulators with a low drop voltage at currents of up to 500 mA, available in both 12 and 24 pin packages. The output voltage regulating element consists of a p-channel MOS and regulation is performed regardless of input voltage transients of up to 40V. The high precision of the output voltage is obtained using a pre-trimmed reference voltage. The L4995 family is protected against short circuit and overtemperature protection switches off the devices in the case of extremely high power dissipation. The L4995 integrates the watchdog, enable and externally programmable reset circuits. The L4995A features the externally programmable reset and enable. Finally the L4995R features the externally programmable reset. The combination of such features makes this device particularly flexible and suitable to supply microprocessor systems in automotive applications. Max DC supply voltage V S 40V Max output voltage tolerance Vo +/-2% Max dropout voltage V dp 500mV Output current I o 500mA Quiescent current I qn 3µA(1) 1. Typical value with regulator disabled PowerSSO-1 2 P owerSSO-24 Table 1. Device summary
1 Block diagrams and pins descriptions
Figure 1. Block diagram of L4995 Figure 2. Block diagram of L4995A
Figure 3. Block diagram of L4995R Table 2. Pins descriptions low regulator, watchdog and reset are shutdown. GND 3 16, 17, 18 Ground reference. or frequency at Wi is too low. Leave floating if not used. delay time (trd). Leave floating if Reset is not used. response of the watchdog monitor.
Figure 4. Pins configurations (L4995) Watchdog input (L4995 only, otherwise not connected). Vos 10 7 Regulator voltage output sensing. Table 2. Pins descriptions (continued)
2 Electrical specifications
2.1 Absolute maximum ratings
Program and other relevant quality documents. Table 3. Absolute maximum ratings
- Using the typical application schemat ic with Cout= 10 µF and Iout=0 A, when the regulator is switched-on,
an overshoot exceeding 6 V could occur.This behavior does not impact the reliability of the regulator.
2.2 Thermal data
2.3 Electrical characteristics
Table 4. Thermal data(1)
- The values quoted are for PCB 77mm x 86mm x 1.6mm, FR4, double layer; Copper thickness 0.070mm
mm, Cu thickness on vias 0.025 mm. Table 5. General
- Measured output current when the output voltage has dropped 100mV from its nominal value obtained at
- Vs-V o measured when the output voltage has dropped 100mV from its nominal value obtained at Vs=13.5V
Table 6. Reset
- When V o becomes lower than 4V, the reset reaction time decreases down to 2µs assuring a faster reset
condition in this particular case. Table 5. General (continued)
Table 7. Watchdog Table 8. Enable
2.4 Electrical char acteristics curves
Figure 5. Output voltage vs Tj Figure 6. Output voltage vs V S Figure 7. Drop voltage vs output current Figure 8. Current consumption vs Figure 9. Current consumption vs input voltage Figure 10. Current limitation vs Tj
2.5 Test circuit and waveforms plot
2.5.1 Load regulation
Figure 24. Load regulation test circuit Figure 23. PSRR
Figure 25. Maximum load variation response
3 Application information
Figure 26. L4995 application schematic additional electrolytic capacitor Co2 > 10µF to be placed at the output pin. Figure 27. Stability region
regulator with connected ceramic capacitors which feature low ESR values (at 100 kHz).
3.1 Voltage regulator
pulses is generated. A short circuit protection to GND is provided. The voltage regulator is active when En is high. Figure 28. Behavior of output current versus regulated voltage Vo
3.2 Reset
guaranteed for an output voltage Vo greater than 1V. This delay is obtained by an internal oscillator.
Ctr:is an external capacitance. Reset is active when En is high. Figure 29. Reset timing diagram
3.3 Watchdog
constant current Icwd. If the lower threshold Vwlth is reached, a watchdog reset is generated. saw-tooth voltage at the watchdog timer capacitor Ctw.
Figure 30. Watchdog timing diagram
4 Package and PCB thermal data
4.1 PowerSSO-12 thermal data
Figure 31. PowerSSO-12 PC board on vias 0.025 mm, Footprint dimension 4.1 mm x 6.5 mm). Figure 32. R
Table 9. PowerSSO-12 thermal parameter
4.2 PowerSSO-24 thermal data
Figure 35. PowerSSO-24 PC board on vias 0.025 mm, Footprint dimension 4.1 mm x 6.5 mm). Figure 36. R
Table 10. PowerSSO-24 thermal parameter
5 Package and packing information
5.1 ECOPACK ®
specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Figure 39. PowerSSO-12 package dimensions
Table 11. PowerSSO-12 mechanical data
5.2 PowerSSO-24 mechanical data
Figure 40. PowerSSO-24 package dimensions
Table 12. PowerSSO-24 mechanical data(1)(2)
- No intrusion allowed inwards the leads.
- Flash or bleeds on ex posed die pad shall not exceed 0.4 mm per side
- “D and E” do not include mold Flash or protusions.
Mold Flash or protusions shall not exceed 0.15 mm.
- Variations for small window leadframe option.
5.3 PowerSSO-12 packing information
Figure 41. PowerSSO-12 tube shipment (no suffix) Figure 42. PowerSSO-12 tape and reel shipment (suffix “TR”)
5.4 PowerSSO-24 packing information
Figure 43. PowerSS0-24 tube shipment (no suffix) Figure 44. PowerSSO-24 tape and reel shipment (suffix “TR”)
6 Revision history
Table 13. Document revision history 26-May-2006 1 Initial release. Features section updated and table added. Table 5: General, Watchdog Iwi entry updated. Table 2: Pins descriptions updated. Table 4: Thermal data updated. List of tables and List of figures added. Packaging information provided in new format. Table 11: PowerSSO-12 mechanical data X and Y values updated. Some sections reformatted for clarity. Updated Table 2: Pins descriptions. Updated Figure 4: Pins configurations (L4995). Table 1: Device summary changed title. 09-Jul-2007 4 Updated Table 2: Pins descriptions. 09-Aug-2007 5 Updated Table 2: Pins descriptions. Updated Table 12: PowerSSO-24 mechanical data.
– corrected note changing single layer with double layer. Added Section 2.4: Electrical characteristics curves. Added Section 2.5: Test circuit and waveforms plot. – changed Table 12: PowerSSO-24 mechanical data. Updated Table 2: Pins descriptions. Table 13. Document revision history (continued)
Figure 27: Stability region. 09-Mar-2012 12 Added footnote in Table 3: Absolute maximum ratings. 20-Sep-2013 14 Updated disclaimer. 17-Sep-2018 15 Updated title and Features.