L4973 STMICROELECTRONICS | Alldatasheet

Document overview

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Technical content

Datasheet sections

  • 1 Block diagram
  • 2 Pin settings
  • 2.1 Pin connection
  • 2.2 Pin description
  • 3 Electrical data
  • 3.1 Maximum ratings
  • 3.2 Thermal data
  • 4 Electrical characteristics
  • 5 Evaluation board
  • 6 Application circuit
  • 7 Typical charcteristics
  • 8 Application ideas
  • 9 Package mechanical data
  • 10 Order code
  • 11 Revision history

Features

■ Up to 3.5A step down converter ■ Operating input voltage from 8V to 55V ■ 3.3V and 5.1V (±1%) fixed output, and adjustable outputs from: – 0.5V to 50V (3.3 type) – 5.1V to 50V (5.1 type) ■ Frequency adjustable up to 300kHz ■ Voltage feed forward ■ Zero load current operation (min 1mA) ■ Internal current limiting (pulse by pulse and HICCUP mode) ■ Precise 5.1V (1.5%) reference voltage externally available ■ Input/output synchronization function ■ Inhibit for zero current consumption (100mA typ. at V CC = 24V) ■ Protection against feedback disconnection ■ Thermal shutdown ■ Output over voltage protection ■ Soft start function

Description

The L4973 is a step down monolithic power switching regulator delivering 3.5A at fixed voltages of 3.3V or 5.1V and using a simple external divider output adjustable voltage up to 50V. Realized in BCD mixed technology, the device uses an internal power D-MOS transistor (with a typical R DS(on) of 0.15Ω) to obtain very high efficiency and very fast switching times. Switching frequency up to 300KHz are achievable (the maximum power dissipation of the packages must be observed). A wide input voltage range between 8V to 55V and output voltages regulated from 3.3V to 40V cover the majority of the today applications. Features of this new generation of DC-DC converter includes pulse by pulse current limit, hiccup mode for output short circuit protection, voltage feed forward regulation, soft start, input/output synchronization, protection against feedback loop disconnection, inhibit for zero current consumption and thermal shutdown. Packages available are in plastic dual in line, DIP- 18 (12+3+3) for standard assembly, and SO20 (12+4+4) for SMD assembly. Figure 1. Internal schematic diagram

1 Block diagram

Figure 2. Block diagram

2 Pin settings

2.1 Pin connection

Figure 3. Pin connection (top view)

9 INH

2.2 Pin description

Note: 1 The maximum power dissipation of the package must be observed. Table 1. Pin description GND; if floating the device is disabled. allows to drive the internal D-MOS. 18 20 SYNC Input/Output synchronization. 2,3 2,3 OUT Stepdown regulator output. resistive divider is required for higher output voltages. 16 18 V5.1 Reference voltage externally available.

3 Electrical data

3.1 Maximum ratings

3.2 Thermal data

Table 2. Absolute maximum ratings I2,I3 I2,I3 Maximum output current int. limit. Table 3. Thermal data

4 Electrical characteristics

Table 4. Electrical characteristics

Table 4. Electrical characteristics (continued)

  1. Pulse testing with a low duty cycle
  2. Specifications referred to T J from -40°C to 125°C.

5 Evaluation board

Figure 4. Evaluation board circuit Table 5. Typical performance (using evaluation board) fSW = 100kHz

6 Application circuit

Figure 7. Application circuit (see Figure 4 part list) Figure 8. Application circuit (see Figure 4 part list)

7 Typical characteristics

Figure 9. Quiescent drain current vs. Figure 10. Quiescent drain current vs. Figure 11. Stand by drain current vs. Figure 12. Reference voltage vs. junction

Figure 13. Reference voltage vs. Figure 14. Reference voltage vs. Figure 15. Inhibit cu rrent vs. inhibit Figure 16. Line regulation (see Figure 7) Figure 17. Load regulation (see Figure 7) Figure 18. Line regulation (see Figure 8)

0123 I O(A)

Figure 19. Load regulation (see Figure 4) Figure 20. Switching frequency vs. Figure 21. Switching frequency vs. Figure 22. Switching frequency vs.

Figure 23. Dropout voltage between pin Figure 24. Efficiency vs. output voltage Figure 25. Dropout voltage between pin Figure 26. Efficiency vs. output voltage

Figure 27. Efficiency vs. output voltage Figure 28. Efficiency vs. output current ( Figure 29. Efficiency vs. output current Figure 30. Efficiency vs. output current

8 Application ideas

Figure 41. 3.5A at V O < 3.3V (see part list Figure 4) Figure 42. 12V to 3.3V high performance buck converter (fsw = 200kHz)

Package mechanical data L4973

9 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com

Table 6. DIP-18 mechanical data Figure 45. Package dimensions

Table 7. SO-20 mechanical data Figure 46. Package dimensions

10 Order code

Table 8. Order code

Table 9. Revision history 07-May-2005 14 Updated the Layout look & feel. Changed name of the D1 on the fig. 5. 14-Dec-2005 15 Added the ECOPACK part numbers in the Table 1. Order Codes.