L4949_06 ONSEMI | Alldatasheet
Document overview
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- PDF pages: 10
Technical content
Features
- Operating DC Supply V oltage Range 5.0 V to 28 V
- Transient Supply V oltage Up to 40 V
- Extremely Low Quiescent Current in Standby Mode
- High Precision Standby Output V oltage 5.0 V ±1%
- Output Current Capability Up to 100 mA
- Very Low Dropout V oltage Less Than 0.4 V
- Reset Circuit Sensing The Output V oltage
- Programmable Reset Pulse Delay With External Capacitor
- V oltage Sense Comparator
- Thermal Shutdown and Short Circuit Protections
- NCV Prefix for Automotive and Other Applications Requiring Site and Control Changes
- Pb−Free Packages are Available Regulator
1.23 Vref
2.0 V 2.0 /C0109A Reset 1.23 V Sense GND Sense Output (So) Reset Sense Input (Si) Supply Voltage (VCC) VZ Output Voltage (Vout) CT38 4 Vs Preregulator 6.0 V Figure 1. Representative Block Diagram dimensions section on page 8 of this data sheet.
ORDERING INFORMATION
A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or /C0071= Pb−Free Device MARKING DIAGRAMS SOIC−20W DW SUFFIX CASE 751D L4949DW AWLYYWWG
L4949, NCV4949 http://onsemi.com ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit DC Operating Supply Voltage VCC 28 V Transient Supply Voltage (t < 1.0 s) VCC TR 40 V Output Current Iout Internally Limited Output Voltage Vout 20 V Sense Input Current ISI ±1.0 mA Sense Input Voltage VSI VCC − Output Voltages V Reset Output VReset 20 Sense Output VSO 20 Output Currents mA Reset Output IReset 5.0 Sense Output ISO 5.0 Preregulator Output Voltage VZ 7.0 V Preregulator Output Current IZ 5.0 mA ESD Protection at any pin V Human Body Model − 2000 Machine Model − 400 Thermal Resistance, Junction−to−Air R/C0113JA °C/W P Suffix, DIP−8 Plastic Package, Case 626 100 D Suffix, SOIC−8 Plastic Package, Case 751 200 D Suffix, SOIC−20 Plastic Package, Case 751D 80 Operating Junction Temperature Range TJ −40 to +150 °C Storage Temperature Range Tstg −65 to +150 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above t he Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = 14 V, −40°C < TA < 125°C, unless otherwise specified.) Characteristic Symbol Min Typ Max Unit Output Voltage (TA = 25°C, Iout = 1.0 mA) Vout 4.95 5.0 5.05 V Dropout Voltage Vdrop V Iout = 10 mA − 0.1 0.25 Iout = 50 mA − 0.2 0.40 Iout = 100 mA − 0.3 0.50 Input to Output Voltage Difference in Undervoltage Condition VIO − 0.2 0.4 V (VCC = 4.0 V, Iout = 35 mA) Line Regulation (6.0 V < VCC < 28 V, Iout = 1.0 mA) Regline − 1.0 20 mV Load Regulation (1.0 mA < Iout < 100 mA) Regload − 8.0 30 mV Current Limit ILim mA Vout = 4.5 V 105 200 400 Vout = 0 V − 100 − Quiescent Current (Iout = 0.3 mA, TA < 100°C) IQSE − 150 260 /C0109A Quiescent Current (Iout = 100 mA) IQ − − 5.0 mA
L4949, NCV4949 http://onsemi.com ELECTRICAL CHARACTERISTICS (continued) (VCC = 14 V, −40°C < TA < 125°C, unless otherwise specified.) Characteristic UnitMaxTypMinSymbol RESET Reset Threshold Voltage VResth − Vout − 0.5 − V Reset Threshold Hysteresis VResth,hys mV @ TA = 25°C 50 100 200 @ TA = −40 to +125°C 50 − 300 Reset Pulse Delay (CT = 100 nF, tR ≥ 100 /C0109s) tResD 55 100 180 ms Reset Reaction Time (CT = 100 nF) tResR − 5.0 30 /C0109s Reset Output Low Voltage (RReset = 10 k/C0087 to Vout, VCC ≥ 3.0 V) VResL − − 0.4 V Reset Output High Leakage Current (VReset = 5.0 V) IResH − − 1.0 /C0109A Delay Comparator Threshold VCTth − 2.0 − V Delay Comparator Threshold Hysteresis VCTth, hys − 100 − mV SENSE Sense Threshold Hysteresis VSOth,hys 20 100 200 mV Sense Output Low Voltage (VSI ≤ 1.16 V, VCC ≥ 3.0 V, RSO = 10 k/C0087 to Vout) VSOL − − 0.4 V Sense Output Leakage (VSO = 5.0 V, VSI ≥ 1.5 V) ISOH − − 1.0 /C0109A Sense Input Current ISI −1.0 0.1 1.0 /C0109A PREREGULATOR Preregulator Output Voltage (IZ = 10 /C0109A) VZ − 6.3 − V PIN FUNCTION DESCRIPTION Pin SOIC−8, PDIP−8 Pin SOIC−20W Symbol Description 1 19 VCC Supply Voltage 2 20 Si Input of Sense Comparator 3 1 VZ Output of Preregulator 4 2 CT Reset Delay Capacitor 5 4 − 7, 14 − 17 GND Ground 6 10 Reset Output of Reset Comparator 7 11 SO Output of Sense Comparator 8 12 Vout Main Regulator Output − 3, 8, 9, 13, 18 NC No Connect
L4949, NCV4949 http://onsemi.com
APPLICATION INFORMATION
High supply voltage transients can cause a reset output signal perturbation. For supply voltages greater than 8.0 V the circuit shows a high immunity of the reset output against supply transients of more than 100 V//C0109s. For supply voltages less than 8.0 V supply transients of more than 0.4 V//C0109s can cause a reset signal perturbation. To improve the transient behavior for supply voltages less than 8.0 V a capacitor at Pin 3 can be used. A capacitor at Pin 3 (C3 ≤ 1.0 /C0109F) reduces also the output noise. So VZ (optional) Vout Vout Vbat Cs COC3 RSO 10 k/C0087 Regulator 2.0 V 2.0 /C0109A Reset 1.23 V Sense GND Reset Si VCC CT38 4 VCC Preregulator 6.0 V 10 k/C0087 Figure 12. Application Schematic
- Recommended for application: C s = CO = 10 /C0109F
L4949, NCV4949 http://onsemi.com Reset Circuit The block circuit diagram of the reset circuit is shown in Figure 16. The reset circuit supervises the output voltage. The reset threshold of 4.5 V is defined with the internal reference voltage and standby output divider. The reset pulse delay time tRD, is defined with the charge time of an external capacitor CT: tRD /C0043 CT x2 . 0V 2.0 /C0109A The reaction time of the reset circuit originates from the discharge time limitation of the reset capacitor C T and is proportional to the value of CT. The reaction time of the reset circuit increases the noise immunity.
1.23 V Vref
2.0 /C0109A CT 2.0 V Reset Figure 16. Reset Circuit Figure 17. Typical Reset Output Waveforms information to the microprocessor like low voltage warnings. Device Operating Temperature Range Package Shipping† L4949N TJ = −40°C to +125°C PDIP−8 50 Units / Rail L4949NG PDIP−8 (Pb−Free)
50 Units / Rail
L4949D SOIC−8 98 Units / Rail L4949DG SOIC−8 (Pb−Free)
98 Units / Rail
L4949DR2 SOIC−8 2500 Units / Tape & Reel L4949DR2G SOIC−8 (Pb−Free)
2500 Units / Tape & Reel
NCV4949DG* SOIC−8 (Pb−Free) NCV4949DR2* SOIC−8 2500 Units / Tape & Reel NCV4949DR2G* SOIC−8 (Pb−Free) NCV4949DWR2* SOIC−20W 1000 Units / Tape & Reel NCV4949DWR2G* SOIC−20W (Pb−Free)
1000 Units / Tape & Reel
†For information on tape and reel specifications,including part orientation and tape sizes, please refer to our Tape and Reel P ackaging Specifications Brochure, BRD8011/D. *NCV4949: Tlow = −40°C, Thigh = +125°C. Guaranteed by design. NCV prefix is for automotive and other applications requiring site and change control.
L4949, NCV4949 http://onsemi.com PACKAGE DIMENSIONS N SUFFIX PLASTIC PACKAGE CASE 626−05 ISSUE L NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. F NOTE 2 −A− −B− −T− SEATING PLANE H J G D K N C L M MAM0.13 (0.005) B MT DIM MIN MAX MIN MAX INCHESMILLIMETERS A 9.40 10.16 0.370 0.400 B 6.10 6.60 0.240 0.260 C 3.94 4.45 0.155 0.175 D 0.38 0.51 0.015 0.020 F 1.02 1.78 0.040 0.070 G 2.54 BSC 0.100 BSC H 0.76 1.27 0.030 0.050 J 0.20 0.30 0.008 0.012 K 2.92 3.43 0.115 0.135 L 7.62 BSC 0.300 BSC N 0.76 1.01 0.030 0.040 /C0095/C0095 SOIC−20 WB DW SUFFIX CASE 751D−05 ISSUE G B20X H10X C L 18X A1 A SEATING PLANE /C0113 h X 45/C0095 E D M0.25 MB M0.25 SA SBT e T B A DIM MIN MAX MILLIMETERS A 2.35 2.65 A1 0.10 0.25 B 0.35 0.49 C 0.23 0.32 D 12.65 12.95 E 7.40 7.60 e 1.27 BSC H 10.05 10.55 h 0.25 0.75 L 0.50 0.90 /C0113 0 7 NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. /C0095/C0095
L4949, NCV4949 http://onsemi.com PACKAGE DIMENSIONS SOIC−8 D SUFFIX CASE 751−07 ISSUE AH SEATING PLANE N J X 45/C0095 K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A B S DH C 0.10 (0.004) DIM A MIN MAX MIN MAX INCHES 4.80 5.00 0.189 0.197 MILLIMETERS B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.053 0.069 D 0.33 0.51 0.013 0.020 G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010 J 0.19 0.25 0.007 0.010 K 0.40 1.27 0.016 0.050 M 0 8 0 8 N 0.25 0.50 0.010 0.020 S 5.80 6.20 0.228 0.244 −X− −Y− G MYM0.25 (0.010) −Z− YM0.25 (0.010) Z S X S M /C0095/C0095/C0095/C0095 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 /C0466mm inches/C0467SCALE 6:1 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SOLDERING FOOTPRINT* ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. L4949/D PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative