L4733TA

LM4733 NSC | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 23

Technical content

Features

n Low external component count n Quiet fade-in/out mute mode n Wide supply range: 20V - 64V

Applications

n Audio amplifier for component stereo n Audio amplifier for compact stereo n Audio amplifier for self-powered speakers n Audio amplifier for high-end and HD TVs Typical Application 200794B5 FIGURE 1. Typical Audio Amplifier Application Circuit

3 Channel 30W Audio Power Amplifier with Mute

Plastic Package (Note 13) 20079401 Top View Order Number LM4733TA See NS Package Number TA27A TO-220 Top Marking 20079402 Top View U - Wafer Fab Code Z - Assembly Plant Code XY - Date Code TT - Die Run Traceability L4733TA - LM4733TA LM4733 www.national.com 2

Absolute Maximum Ratings(Notes 1, If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage |V +|+| V -| 69V Common Mode Input Voltage (V + or V-) and Differential Input Voltage (Note 12) 60V Output Current Internally Limited Power Dissipation (Note 3) 125W ESD Susceptability (Note 4) 2.0kV ESD Susceptability (Note 5) 200V Junction Temperature (T JMAX) (Note 9) 150˚C Soldering Information Storage Temperature -40˚C to +150˚C Thermal Resistance θ JA 30˚C/W θJC 0.9˚C/W Operating Ratings(Notes 1, 2) Temperature Range TMIN ≤ TA ≤ TMAX −20˚C ≤ TA ≤ +85˚C Supply Voltage |V+|+| V -| 20V ≤ VTOTAL ≤ 64V Electrical Characteristics(Notes 1, 2) The following specifications apply for V+ = +24V, V- = −24V, IMUTE = -1mA/channel and RL =8 Ω unless otherwise specified. Limits apply for TA = 25˚C. Symbol Parameter Conditions LM4733 Units (Limits)Typical Limit (Note 6) (Notes 7, 8) |V+|+| V -| Power Supply Voltage (Note 10) G N D−V- ≥ 9V 18 20 V (min) V (max) AM Mute Attenuation I MUTE = 0mA 110 dB PO Output Power (RMS) THD+N = 10% (max), f = 1kHz, W (min) W (min) THD+N = 1% (max), f = 1kHz, W W THD+N Total Harmonic Distortion + Noise PO = 1W, f = 1kHz AV = 26dB 0.05 0.03 Xtalk Channel Separation (Note 11) PO = 10W, f = 1kHz 70 dB PO = 10W, f = 10kHz 66 dB SR Slew Rate V IN = 1.2VRMS, f = 10kHz square Wave, RL =2 kΩ

9 V/µs

IDD Total Quiescent Power V CM = 0V, 72 150 mA (max) Supply Current V O = 0V, IO =0 A VOS Input Offset Voltage V CM = 0V, IO = 0mA 1 10 mV (max) IB Input Bias Current V CM = 0V, IO = 0mA 0.2 µA PSRR Power Supply Rejection Ratio V+ =2 4 V+VRIPPLE (1VRMS) fRIPPLE = 120Hz sine, V- = -24V 85 dB V- =- 2 4 V+VRIPPLE (1VRMS) fRIPPLE = 120Hz sine, V+ = 24V 59 dB AVOL Open Loop Voltage Gain |V +|=| V -| = 24V, RL =2 kΩ, ∆VO = 20V 115 dB eIN Input Noise IHF-A-Weighting Filter, RIN = 600Ω (Input Referred) 3.0 µV Note 1: All voltages are measured with respect to the ground pins, unless otherwise specified. LM4733 www.national.com3

Electrical Characteristics(Notes 1, 2) (Continued) Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit is given; however, the typical value is a good indication of device performance. Note 3: The maximum power dissipation must be de-rated at elevated temperatures and is dictated by TJMAX, θJC, and the ambient temperature TA. The maximum allowable power dissipation is PDMAX =( TJMAX -TA)/θJC or the number given in the Absolute Maximum Ratings, whichever is lower. For the LM4733, TJMAX = 150˚C and the typicalθJC is 0.9˚C/W. Refer to theDETERMINING THE CORRECT HEAT SINKsection for more information. Note 4: Human body model, 100pF discharged through a 1.5kΩ resistor. Note 5: Machine Model: a 220pF - 240pF discharged through all pins. Note 6: Typical specifications are measured at 25˚C and represent the parametric norm. Note 7: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level). Note 8: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis. Note 9: The maximum operating junction temperature is 150˚C. However, the instantaneous Safe Operating Area temperature is 250˚C. Note 10: V- must have at least - 9V at its pin with reference to GND in order for the under-voltage protection circuitry to be disabled. In addition, the voltage differential between V+ and V- must be greater than 14V. Note 11: Cross talk performance was measured using the demo board shown in the datasheet. PCB layout will affect cross talk. It is recommended that the input and output traces be separated by as much distance as possible. Return ground traces from outputs should also be independent back to sinlge ground point and use as wide of traces as possible. Note 12: The Differential Input Voltage Absolute Maximum Rating is based on supply voltages V+ = 30V and V- = - 30V. Note 13: The TA27A is a non-isolated package. The package’s metal back and any heat sink to which it is mounted are connected to the V- potential when using only thermal compound. If a mica washer is used in addition to thermal compound,θCS (case to sink) is increased, but the heat sink will be electrically isolated from V-. LM4733 www.national.com 4

FIGURE 2. Bridged Amplifier Application Circuit

FIGURE 3. Parallel Amplifier Application Circuit

External Components Description (Figures 1-5) Components Functional Description 1R B Prevents current from entering the amplifier’s non-inverting input. This current may pass through to the load during system power down, because of the amplifier’s low input impedance when the undervoltage circuitry is off. This phenomenon occurs when the V + and V- supply voltages are below 1.5V. 2R i Inverting input resistance. Along with Rf, sets AC gain. 3R f Feedback resistance. Along with Ri, sets AC gain. 4R f2 (Note 14) Feedback resistance. Works with Cf and Rf creating a lowpass filter that lowers AC gain at high frequencies. The -3dB point of the pole occurs when: (Rf -R i) / 2=Rf // [1/(2πfcCf)+R f2] for the Non-Inverting configuration shown inFigure 5. 5C f (Note 14) Compensation capacitor. Works with Rf and Rf2 to reduce AC gain at higher frequencies. 6C C (Note 14) Compensation capacitor. Reduces the gain at higher frequencies to avoid quasi-saturation oscillations of the output transistor. Also suppresses external electromagnetic switching noise created from fluorescent lamps. 7C i (Note 14) Feedback capacitor which ensures unity gain at DC. Along with Ri also creates a highpass filter at fc = 1/(2πRiCi). 8C S Provides power supply filtering and bypassing. Refer to the Supply Bypassing application section for proper placement and selection of bypass capacitors. 9R V (Note 14) Acts as a volume control by setting the input voltage level.

10 R IN

(Note 14) Sets the amplifier’s input terminals DC bias point when CIN is present in the circuit. Also works with CIN to create a highpass filter at fC = 1/(2πRINCIN). If the value of RIN is too large, oscillations may be observed on the outputs when the inputs are floating. Recommended values are 10kΩ to 47kΩ. Refer toFigure 5.

11 C IN

(Note 14) Input capacitor. Prevents the input signal’s DC offsets from being passed onto the amplifier’s inputs.

12 R SN

(Note 14) Works with CSN to stabilize the output stage by creating a pole that reduces high frequency instabilities.

13 C SN

(Note 14) Works with RSN to stabilize the output stage by creating a pole that reduces high frequency instabilities. The pole is set at fC = 1/(2πRSNCSN). Refer toFigure 5. 14 L (Note 14) Provides high impedance at high frequencies so that R may decouple a highly capacitive load and reduce the Q of the series resonant circuit. Also provides a low impedance at low frequencies to short out R and pass audio signals to the load. Refer toFigure 5.15 R (Note 14) 16 R A Provides DC voltage biasing for the transistor Q1 in single supply operation. 17 C A Provides bias filtering for single supply operation.

18 R INP

(Note 14) Limits the voltage difference between the amplifier’s inputs for single supply operation. Refer to theClicks and Pops application section for a more detailed explanation of the function of RINP. 19 R BI Provides input bias current for single supply operation. Refer to theClicks and Popsapplication section for a more detailed explanation of the function of RBI. 20 R E Establishes a fixed DC current for the transistor Q1 in single supply operation. This resistor stabilizes the half-supply point along with CA. 21 R M Mute resistance set up to allow 0.5mA to be drawn from each MUTE pin to turn the muting function off. → RM is calculated using: RM ≤ (|VEE| − 2.6V)/l where l≥ 0.5mA. Refer to the Mute Attenuation vs Mute Current curves in the Typical Performance Characteristics section. 22 C M Mute capacitance set up to create a large time constant for turn-on and turn-off muting. 23 S 1 Mute switch. When open or switched to GND, the amplifier will be in mute mode. 24 R OUT Reduces current flow between outputs that are caused by Gain or DC offset differences between the amplifiers. Note 14: Optional components dependent upon specific design requirements. LM4733 www.national.com 8

Optional External Component Interaction Although the optional external components have specific desired functions that are designed to reduce the bandwidth and eliminate unwanted high frequency oscillations they may cause certain undesirable effects when they interact. Inter- action may occur for components whose reactances are in close proximity to one another. One example would be the coupling capacitor, C C, and the compensation capacitor, Cf. These two components act as low impedances to certain frequencies which will couple signals from the input to the output. Please take careful note of basic amplifier compo- nent functionality when designing in these components. The optional external components shown inFigure 4 and Figure 5 and described above are applicable in both single and split voltage supply configurations. Typical Performance Characteristics Supply Current vs Supply Voltage PSRR vs Frequency ±24V, VRIPPLE =1 VRMS RL =8 Ω, 80kHz BW 20079417 20079416 THD+N vs Frequency ±19V, POUT = 1W/Channel RL =4 Ω, 80kHz BW THD+N vs Frequency ±24V, POUT = 1W/Channel RL =8 Ω, 80kHz BW 20079419 20079446 LM4733 www.national.com9

Typical Performance Characteristics (Continued) THD+N vs Output Power/Channel ±19V, RL =4 Ω, 80kHz BW THD+N vs Output Power/Channel ±24V, RL =8 Ω, 80kHz BW 20079450 20079453 Output Power/Channel vs Supply Voltage f = 1kHz, RL =4 Ω, 80kHz BW Output Power/Channel vs Supply Voltage f = 1kHz, RL =8 Ω, 80kHz BW 20079411 20079412 Total Power Dissipation vs Output Power/Channel 1% THD (max), RL =4 Ω, 80kHz BW Total Power Dissipation vs Output Power/Channel 1% THD (max), RL =8 Ω, 80kHz BW 20079409 20079410 LM4733 www.national.com 10

Typical Performance Characteristics (Continued) Crosstalk vs Frequency ±19V, POUT = 10W, RL =4 Ω, 80kHz BW Crosstalk vs Frequency ±24V, POUT = 10W, RL =8 Ω, 80kHz BW 20079438 200794C0 Two Channels On Crosstalk vs Frequency ±19V, POUT = 10W, RL =4 Ω, 80kHz BW Two Channels On Crosstalk vs Frequency ±24V, POUT = 10W, RL =8 Ω, 80kHz BW 20079448 20079429 Mute Attenuation vs Mute Pin Current POUT = 10W/Channel Common-Mode Rejection Ratio 20079421 200794C3 LM4733 www.national.com11

Typical Performance Characteristics (Continued) THD+N vs Frequency ± 19V, POUT = 1W & 20W, Chs 1&3 in Bridge Mode (Note15), RL =8 Ω, 80kHz BW THD+N vs Frequency ± 24V, POUT = 1W & 30W, Chs 1&3 in Parallel Mode (Note16), RL =4 Ω, 80kHz BW 20079447 20079420 THD+N vs Frequency ± 21V, POUT = 1W & 20W, All Chs in Parallel Mode (Note16), RL =2 Ω, 80kHz BW THD+N vs Output Power ± 19V, Chs 1&3 in Bridge Mode (Note15), RL =8 Ω, 80kHz BW 20079418 20079452 THD+N vs Output Power ± 24V, Chs 1&3 in Parallel Mode (Note16), RL =4 Ω, 80kHz BW THD+N vs Output Power ± 21V, All Chs in Parallel Mode (Note16), RL =2 Ω, 80kHz BW 20079451 20079449 LM4733 www.national.com 12

Typical Performance Characteristics (Continued) Output Power vs Supply Voltage Chs 1&3 in Bridge Mode (Note15), f = 1kHz, RL =8 Ω, 80kHz BW Output Power vs Supply Voltage Chs 1&3 in Parallel Mode (Note16), f = 1kHz, RL =4 Ω, 80kHz BW 20079413 20079415 Output Power vs Supply Voltage All Chs in Parallel Mode (Note16), f = 1kHz, RL =2 Ω, 80kHz BW 20079414 Note 15: Bridge mode graphs were taken using the demo board and inverting the signal to the channel B input. Note 16: Parallel mode graphs were taken using the demo board connecting each output through a 0.1Ω/3W resistor to the load.

Application Information

The muting function allows the user to mute the amplifier. This can be accomplished as shown in the Typical Applica- tion Circuit. The resistor R M is chosen with reference to the negative supply voltage and is used in conjunction with a switch. The switch, when opened or switched to GND, cuts off the current flow from the MUTE pins to −V EE, thus placing the LM4733 into mute mode. Refer to the Mute Attenuation vs Mute Current curves in theTypical Performance Char- acteristics section for values of attenuation per current out of each MUTE pin. The resistance R M is calculated by the following equation: RM ≤ (|−VEE| − 2.6V) / IMUTE Where IMUTE ≥ 0.5mA for each MUTE pin. The MUTE pins can be tied together so that only one resistor is required for the mute function. The mute resistor value must be chosen so that a minimum of 1.5mA is pulled through the resistor RM. This ensures that each amplifier is fully operational. Taking into account supply line fluctuations, it is a good idea to pull out 1mA per MUTE pin or 3mA total if all pins are tied together. A turn-on MUTE or soft start circuit may also be used during power up. A simple circuit like the one shown below may be used. 200794B7 The RC combination of CM and RM1 may cause the voltage at point A to change more slowly than the -V EE supply LM4733 www.national.com13

Application Information (Continued) voltage. Until the voltage at point A is low enough to have 0.5mA of current per MUTE pin flow through RM2, the IC will be in mute mode. The series combination of RM1 and RM2 needs to satisfy the mute equation above for all operating voltages or mute mode may be activated during normal operation. For a longer turn-on mute time, a larger time constant, τ =R C=R M1CM (sec), is needed. For the values show above and with the MUTE pins tied together, the LM4733 will enter play mode when the voltage at point A is -25.1V. The voltage at point A is found with Equation (1) below. V A( t )=( Vf -V O)e-t/τ (Volts) (1) where: t = time (sec) τ = RC (sec) V o = Voltage on C att=0( V olts) Vf = Final voltage, -VEE in this circuit (Volts) UNDER-VOLTAGE PROTECTION Upon system power-up, the under-voltage protection cir- cuitry allows the power supplies and their corresponding capacitors to come up close to their full values before turning on the LM4733. Since the supplies have essentially settled to their final value, no DC output spikes occur. At power down, the outputs of the LM4733 are forced to ground before the power supply voltages fully decay preventing transients on the output. OVER-VOLTAGE PROTECTION The LM4733 contains over-voltage protection circuitry that limits the output current while also providing voltage clamp- ing. The clamp does not, however, use internal clamping diodes. The clamping effect is quite the same because the output transistors are designed to work alternately by sinking large current spikes. THERMAL PROTECTION The LM4733 has a sophisticated thermal protection scheme to prevent long-term thermal stress of the device. When the temperature on the die exceeds 150˚C, the LM4733 shuts down. It starts operating again when the die temperature drops to about 145˚C, but if the temperature again begins to rise, shutdown will occur again above 150˚C. Therefore, the device is allowed to heat up to a relatively high temperature if the fault condition is temporary, but a sustained fault will cause the device to cycle in a Schmitt Trigger fashion be- tween the thermal shutdown temperature limits of 150˚C and 145˚C. This greatly reduces the stress imposed on the IC by thermal cycling, which in turn improves its reliability under sustained fault conditions. Since the die temperature is directly dependent upon the heat sink used, the heat sink should be chosen so that thermal shutdown is not activated during normal operation. Using the best heat sink possible within the cost and space constraints of the system will improve the long-term reliability of any power semiconductor device, as discussed in the Determining the Correct Heat Sinksection. DETERMlNlNG MAXIMUM POWER DISSIPATION Power dissipation within the integrated circuit package is a very important parameter requiring a thorough understand- ing if optimum power output is to be obtained. An incorrect maximum power dissipation calculation may result in inad- equate heat sinking causing thermal shutdown and thus limiting the output power. Equation (2)shows the theoretical maximum power dissipa- tion point for each amplifier in a single-ended configuration where V CC is the total supply voltage. PDMAX =( VCC)2 /2 π2RL (2) Thus by knowing the total supply voltage and rated output load, the maximum power dissipation point can be calcu- lated. The package dissipation is three times the number which results fromEquation (2)since there are three ampli- fiers in each LM4733. Refer to the graphs of Power Dissipa- tion versus Output Power in theTypical Performance Char- acteristics section which show the actual full range of power dissipation not just the maximum theoretical point that re- sults from Equation (2). DETERMINING THE CORRECT HEAT SINK The choice of a heat sink for a high-power audio amplifier is made entirely to keep the die temperature at a level such that the thermal protection circuitry is not activated under normal circumstances. The thermal resistance from the die to the outside air,θ JA (junction to ambient), is a combination of three thermal re- sistances, θJC (junction to case),θCS (case to sink), andθSA (sink to ambient). The thermal resistance,θJC (junction to case), of the LM4733T is 0.9˚C/W. Using Thermalloy Ther- macote thermal compound, the thermal resistance, θ CS (case to sink), is about 0.2˚C/W. Since convection heat flow (power dissipation) is analogous to current flow, thermal resistance is analogous to electrical resistance, and tem- perature drops are analogous to voltage drops, the power dissipation out of the LM4733 is equal to the following: P DMAX =( TJMAX−TAMB)/ θJA (3) where TJMAX = 150˚C, TAMB is the system ambient tempera- ture and θJA = θJC + θCS + θSA. 200794B8 Once the maximum package power dissipation has been calculated using Equation 2, the maximum thermal resis- tance, θ SA, (heat sink to ambient) in ˚C/W for a heat sink can be calculated. This calculation is made using Equation 4 which is derived by solving forθ SA in Equation 3. θSA = [(TJMAX−TAMB)−PDMAX(θJC +θCS) ]/P DMAX (4) Again it must be noted that the value ofθSA is dependent upon the system designer’s amplifier requirements. If the ambient temperature that the audio amplifier is to be working under is higher than 25˚C, then the thermal resistance for the heat sink, given all other things are equal, will need to be smaller. LM4733 www.national.com 14

Application Information (Continued) SUPPLY BYPASSING The LM4733 has excellent power supply rejection and does not require a regulated supply. However, to improve system performance as well as eliminate possible oscillations, the LM4733 should have its supply leads bypassed with low- inductance capacitors having short leads that are located close to the package terminals. Inadequate power supply bypassing will manifest itself by a low frequency oscillation known as “motorboating” or by high frequency instabilities. These instabilities can be eliminated through multiple by- passing utilizing a large tantalum or electrolytic capacitor (10µF or larger) which is used to absorb low frequency variations and a small ceramic capacitor (0.1µF) to prevent any high frequency feedback through the power supply lines. If adequate bypassing is not provided, the current in the supply leads which is a rectified component of the load current may be fed back into internal circuitry. This signal causes distortion at high frequencies requiring that the sup- plies be bypassed at the package terminals with an electro- lytic capacitor of 470µF or more. BRIDGED AMPLIFIER APPLICATION The LM4733 has three operational amplifiers internally, al- lowing for a few different amplifier configurations. One of these configurations is referred to as “bridged mode” and involves driving the load differentially through two of the LM4733’s outputs. This configuration is shown inFigure 2. Bridged mode operation is different from the classical single- ended amplifier configuration where one side of its load is connected to ground. A bridge amplifier design has a distinct advantage over the single-ended configuration, as it provides differential drive to the load, thus doubling output swing for a specified supply voltage. Theoretically, four times the output power is pos- sible as compared to a single-ended amplifier under the same conditions. This increase in attainable output power assumes that the amplifier is not current limited or clipped. A direct consequence of the increased power delivered to the load by a bridge amplifier is an increase in internal power dissipation. For each operational amplifier in a bridge con- figuration, the internal power dissipation will increase by a factor of two over the single ended dissipation. Using Equa- tion (2) the load impedance should be divided by a factor of two to find the maximum power dissipation point for each amplifier in a bridge configuration. In the case of an 8Ω load in a bridge configuration, the value used for R L in Equation (2) would be 4Ω for each amplifier in the bridge. When using two of the amplifiers of the LM4733 in bridge mode, the third amplifier should have a load impedance equal to or higher than the equivalent impedance seen by each of the bridged amplifiers. In the example above where the bridge load is 8Ω and each amplifier in the bridge sees a load value of 4Ω then the third amplifier should also have a 4Ω load impedance or higher. Using a lower load impedance on the third amplifier will result in higher power dissipation in the third amplifier than the other two amplifiers and may result in unwanted activation of thermal shut down on the third amplifier. Once the impedance seen by each amplifier is known then Equa- tion (2) can be used to calculated the value of P DMAX for each amplifier. The PDMAX of the IC package is found by adding up the power dissipation for each amplifier within the IC package. This value of P DMAX can be used to calculate the correct size heat sink for a bridged amplifier application. Since the inter- nal dissipation for a given power supply and load is in- creased by using bridged-mode, the heatsink’sθSA will have to decrease accordingly as shown by Equation 4. Refer to the section,Determining the Correct Heat Sink,for a more detailed discussion of proper heat sinking for a given appli- cation. PARALLEL AMPLIFIER APPLICATION Parallel configuration is normally used when higher output current is needed for driving lower impedance loads (i.e. 4Ω or lower) to obtain higher output power levels. As shown in Figure 3 , the parallel amplifier configuration consist of de- signing the amplifiers in the IC to have identical gain, con- necting the inputs in parallel and then connecting the outputs in parallel through a small external output resistor. Any num- ber of amplifiers can be connected in parallel to obtain the needed output current or to divide the power dissipation across multiple IC packages. Ideally, each amplifier shares the output current equally. Due to slight differences in gain the current sharing will not be equal among all channels. If current is not shared equally among all channels then the power dissipation will also not be equal among all channels. It is recommended that 0.1% tolerance resistors be used to set the gain (R i and Rf) for a minimal amount of difference in current sharing. When operating two or more amplifiers in parallel mode the impedance seen by each amplifier is equal to the total load impedance multiplied by the number of amplifiers driving the load in parallel as shown byEquation (5)below: R L(parallel) =R L(total) x Number of amplifiers (5) Once the impedance seen by each amplifier in the parallel configuration is known then Equation (2) can be used with this calculated impedance to find the amount of power dis- sipation for each amplifier. Total power dissipation (P DMAX) within an IC package is found by adding up the power dissipation for each amplifier in the IC package. Using the calculated P DMAX the correct heat sink size can be deter- mined. Refer to the section,Determining the Correct Heat Sink, for more information and detailed discussion of proper heat sinking. If only two amplifiers of the LM4733 are used in parallel mode then the third amplifier should have a load impedance equal to or higher than the equivalent impedance seen by each of the amplifiers in parallel mode. Having the same load impedance on all amplifiers means that the power dissipation in each amplifier will be equal. Using a lower load impedance on the third amplifier will result in higher power dissipation in the third amplifier than the other two amplifiers and may result in unwanted activation of thermal shut down on the third amplifier. Having a higher impedance on the third amplifier than the equivalent impedance on the two amplifi- ers in parallel will reduce total IC package power dissipation reducing the heat sink size requirement. BI-AMP AND TRI-AMP APPLICATIONS Bi-amping is the practice of using two different amplifiers to power the individual drivers in a speaker enclosure. For example, a two-way speaker enclosure might have a tweeter and a subwoofer. One amplifier would drive the tweeter and another would drive the subwoofer. One advantage is that the gain of each amplifier can be adjusted for the different driver sensitivities. Another advantage is the crossover can be designed before the amplifier stages with low cost op amps instead of large passive components. With the cross- over before the amplifier stages no power is wasted in the passive crossover as each individual amplifier provides the LM4733 www.national.com15

Application Information (Continued) correct frequencies for the driver. Tri-Amping is using three different amplifier stages in the same way bi-amping is done. Bi-amping can also be done on a three-way speaker design by using one amplifier for the subwoofer and another for the midrange and tweeter. The LM4733 is perfectly suited for bi-amp or tri-amp appli- cations with it’s three amplifiers. Two of the amplifiers can be configured for bridge or parallel mode to drive a subwoofer with the third amplifier driving the tweeter or tweeter and midrange. An example would be to use a 4Ω subwoofer and 8Ω tweeter/midrange with the LM4733 in parallel and single- ended modes. Each amplifier would see an 8Ω load but the subwoofer would have twice the output power as the tweeter/midrange. The gain of each amplifier may also be adjusted for the desired response. Using the LM4733 in a tri-amp configuration would allow the gain of each amplifier to be adjusted to achieve the desired speaker response. SINGLE-SUPPLY AMPLIFIER APPLICATION The typical application of the LM4733 is a split supply am- plifier. But as shown inFigure 4, the LM4733 can also be used in a single power supply configuration. This involves using some external components to create a half-supply bias which is used as the reference for the inputs and outputs. Thus, the signal will swing around half-supply much like it swings around ground in a split-supply application. Along with proper circuit biasing, a few other considerations must be accounted for to take advantage of all of the LM4733 functions, like the mute function. CLICKS AND POPS In the typical application of the LM4733 as a split-supply audio power amplifier, the IC exhibits excellent “click” and “pop” performance when utilizing the mute mode. In addition, the device employs Under-Voltage Protection, which elimi- nates unwanted power-up and power-down transients. The basis for these functions are a stable and constant half- supply potential. In a split-supply application, ground is the stable half-supply potential. But in a single-supply applica- tion, the half-supply needs to charge up at the same rate as the supply rail, V CC. This makes the task of attaining a clickless and popless turn-on more challenging. Any uneven charging of the amplifier inputs will result in output clicks and pops due to the differential input topology of the LM4733. To achieve a transient free power-up and power-down, the voltage seen at the input terminals should be ideally the same. Such a signal will be common-mode in nature, and will be rejected by the LM4733. InFigure 4, the resistor R INP serves to keep the inputs at the same potential by limiting the voltage difference possible between the two nodes. This should significantly reduce any type of turn-on pop, due to an uneven charging of the amplifier inputs. This charging is based on a specific application loading and thus, the system designer may need to adjust these values for optimal perfor- mance. As shown inFigure 4, the resistors labeled R BI help bias up the LM4733 off the half-supply node at the emitter of the 2N3904. But due to the input and output coupling capacitors in the circuit, along with the negative feedback, there are two different values of R BI, namely 10kΩ and 200kΩ. These resistors bring up the inputs at the same rate resulting in a popless turn-on. Adjusting these resistors values slightly may reduce pops resulting from power supplies that ramp extremely quick or exhibit overshoot during system turn-on. PROPER SELECTION OF EXTERNAL COMPONENTS Proper selection of external components is required to meet the design targets of an application. The choice of external component values that will affect gain and low frequency response are discussed below. The gain of each amplifier is set by resistors R f and Ri for the non-inverting configuration shown in Figure 1. The gain is found by Equation (6)below: AV =1+R f /R i (V/V) (6) For best noise performance, lower values of resistors are used. A value of 1kΩ is commonly used for Ri and then setting the value of Rf for the desired gain. For the LM4733 the gain should be set no lower than 10V/V and no higher than 50V/V. Gain settings below 10V/V may experience instability and using the LM4733 for gains higher than 50V/V will see an increase in noise and THD. The combination of R i with Ci (see Figure 1) creates a high pass filter. The low frequency response is determined by these two components. The -3dB point can be found from Equation (7)shown below: f i =1/( 2 πRiCi) (Hz) (7) If an input coupling capacitor is used to block DC from the inputs as shown inFigure 5, there will be another high pass filter created with the combination of CIN and RIN. When using a input coupling capacitor RIN is needed to set the DC bias point on the amplifier’s input terminal. The resulting -3dB frequency response due to the combination of C IN and RIN can be found fromEquation (8)shown below: fIN =1/( 2 πRINCIN) (Hz) (8) With large values of RIN oscillations may be observed on the outputs when the inputs are left floating. Decreasing the value of R IN or not letting the inputs float will remove the oscillations. If the value of RIN is decreased then the value of CIN will need to increase in order to maintain the same -3dB frequency response. HIGH PERFORMANCE CONSIDERATIONS Using low cost electrolytic capacitors in the signal path such as CIN and Ci (see Figures1-5 ) will result in very good performance. However, electrolytic capacitors are less linear than other premium capacitors. Higher THD+N performance may be obtained by using high quality polypropylene capaci- tors in the signal path. A more cost effective solution may be the use of smaller value premium capacitors in parallel with the larger electrolytic capacitors. This will maintain signal quality in the upper audio band where any degradation is most noticeable while also coupling in the signals in the lower audio band for good bass response. Distortion is introduced as the audio signal approaches the lower -3dB point, determined as discussed in the section above. By using larger values of capacitors such that the -3dB point is well outside of the audio band will reduce this distortion and improve THD+N performance. Increasing the value of the large supply bypass capacitors will improve burst power output. The larger the supply by- pass capacitors the higher the output pulse current without supply droop increasing the peak output power. This will also increase the headroom of the amplifier and reduce THD. SIGNAL-TO-NOISE RATIO In the measurement of the signal-to-noise ratio, misinterpre- tations of the numbers actually measured are common. One amplifier may sound much quieter than another, but due to improper testing techniques, they appear equal in measure- LM4733 www.national.com 16

Application Information (Continued) ments. This is often the case when comparing integrated circuit designs to discrete amplifier designs. Discrete transis- tor amps often “run out of gain” at high frequencies and therefore have small bandwidths to noise as indicated below. 20079499 Integrated circuits have additional open loop gain allowing additional feedback loop gain in order to lower harmonic distortion and improve frequency response. It is this addi- tional bandwidth that can lead to erroneous signal-to-noise measurements if not considered during the measurement process. In the typical example above, the difference in bandwidth appears small on a log scale but the factor of 10in bandwidth, (200kHz to 2MHz) can result in a 10dB theoreti- cal difference in the signal-to-noise ratio (white noise is proportional to the square root of the bandwidth in a system). In comparing audio amplifiers it is necessary to measure the magnitude of noise in the audible bandwidth by using a “weighting” filter (Note 17). A “weighting” filter alters the frequency response in order to compensate for the average human ear’s sensitivity to the frequency spectra. The weight- ing filters at the same time provide the bandwidth limiting as discussed in the previous paragraph. Note 17: CCIR/ARM: A Practical Noise Measurement Method; by Ray Dolby, David Robinson and Kenneth Gundry, AES Preprint No. 1353 (F-3). In addition to noise filtering, differing meter types give differ- ent noise readings. Meter responses include: 1. RMS reading, 2. average responding, 3. peak reading, and 4. quasi peak reading. Although theoretical noise analysis is derived using true RMS based calculations, most actual measurements are taken with ARM (Average Responding Meter) test equip- ment. Typical signal-to-noise figures are listed for an A-weighted filter which is commonly used in the measurement of noise. The shape of all weighting filters is similar, with the peak of the curve usually occurring in the 3kHz–7kHz region. LEAD INDUCTANCE Power op amps are sensitive to inductance in the output leads, particularly with heavy capacitive loading. Feedback to the input should be taken directly from the output terminal, minimizing common inductance with the load. Lead inductance can also cause voltage surges on the sup- plies. With long leads to the power supply, energy is stored in the lead inductance when the output is shorted. This energy can be dumped back into the supply bypass capacitors when the short is removed. The magnitude of this transient is reduced by increasing the size of the bypass capacitor near the IC. With at least a 20µF local bypass, these voltage surges are important only if the lead length exceeds a couple feet ( >1µH lead inductance). Twisting together the supply and ground leads minimizes the effect. PHYSICAL IC MOUNTING CONSIDERATIONS Mounting of the package to a heat sink must be done such that there is sufficient pressure from the mounting screws to insure good contact with the heat sink for efficient heat flow. Over tightening the mounting screws will cause the package to warp reducing contact area with the heat sink. Less contact with the heat sink will increase the thermal resis- tance from the package case to the heat sink (θ CS) resulting in higher operating die temperatures and possible unwanted thermal shut down activation. Extreme over tightening of the mounting screws will cause severe physical stress resulting in cracked die and catastrophic IC failure. The recom- mended mounting screw size is M3 with a maximum torque of 50 N-cm. Additionally, it is best to use washers under the screws to distribute the force over a wider area or a screw with a wide flat head. To further distribute the mounting force a solid mounting bar in front of the package and secured in place with the two mounting screws may be used. Other mounting options include a spring clip. If the package is secured with pressure on the front of the package the maxi- mum pressure on the molded plastic should not exceed 150N/mm Additionally, if the mounting screws are used to force the package into correct alignment with the heat sink, package stress will be increased. This increase in package stress will result in reduced contact area with the heat sink increasing die operating temperature and possible catastrophic IC fail- ure. LM4733 www.national.com17

Application Information (Continued) LAYOUT , GROUND LOOPS AND STABILITY The LM4733 is designed to be stable when operated at a closed-loop gain of 10 or greater, but as with any other high-current amplifier, the LM4733 can be made to oscillate under certain conditions. These oscillations usually involve printed circuit board layout or output/input coupling issues. When designing a layout, it is important to return the load ground, the output compensation ground, and the low level (feedback and input) grounds to the circuit board common ground point through separate paths. Otherwise, large cur- rents flowing along a ground conductor will generate volt- ages on the conductor which can effectively act as signals at the input, resulting in high frequency oscillation or excessive distortion. It is advisable to keep the output compensation components and the 0.1µF supply decoupling capacitors as close as possible to the LM4733 to reduce the effects of PCB trace resistance and inductance. For the same reason, the ground return paths should be as short as possible. In general, with fast, high-current circuitry, all sorts of prob- lems can arise from improper grounding which again can be avoided by returning all grounds separately to a common point. Without isolating the ground signals and returning the grounds to a common point, ground loops may occur. “Ground Loop” is the term used to describe situations occur- ring in ground systems where a difference in potential exists between two ground points. Ideally a ground is a ground, but unfortunately, in order for this to be true, ground conductors with zero resistance are necessary. Since real world ground leads possess finite resistance, currents running through them will cause finite voltage drops to exist. If two ground return lines tie into the same path at different points there will be a voltage drop between them. The first figure below shows a common ground example where the positive input ground and the load ground are returned to the supply ground point via the same wire. The addition of the finite wire resistance, R 2, results in a voltage difference between the two points as shown below. 20079498 The load current IL will be much larger than input bias current II, thus V1 will follow the output voltage directly, i.e. in phase. Therefore the voltage appearing at the non-inverting input is effectively positive feedback and the circuit may oscillate. If there was only one device to worry about then the values of R 1 and R2 would probably be small enough to be ignored; however, several devices normally comprise a total system. Any ground return of a separate device, whose output is in phase, can feedback in a similar manner and cause insta- bilities. Out of phase ground loops also are troublesome, causing unexpected gain and phase errors. The solution to most ground loop problems is to always use a single-point ground system, although this is sometimes impractical. The third figure above is an example of a single- point ground system. The single-point ground concept should be applied rigor- ously to all components and all circuits when possible. Vio- lations of single-point grounding are most common among printed circuit board designs, since the circuit is surrounded by large ground areas which invite the temptation to run a device to the closest ground spot. As a final rule, make all ground returns low resistance and low inductance by using large wire and wide traces. Occasionally, current in the output leads (which function as antennas) can be coupled through the air to the amplifier input, resulting in high-frequency oscillation. This normally happens when the source impedance is high or the input leads are long. The problem can be eliminated by placing a small capacitor, C C, (on the order of 50pF to 500pF) across the LM4733 input terminals. Refer to theExternal Compo- nents Descriptionsection relating to component interaction with Cf. REACTIVE LOADING It is hard for most power amplifiers to drive highly capacitive loads very effectively and normally results in oscillations or ringing on the square wave response. If the output of the LM4733 is connected directly to a capacitor with no series resistance, the square wave response will exhibit ringing if the capacitance is greater than about 0.2µF. If highly capaci- tive loads are expected due to long speaker cables, a method commonly employed to protect amplifiers from low impedances at high frequencies is to couple to the load through a 10Ω resistor in parallel with a 0.7µH inductor. The inductor-resistor combination as shown in theFigure 5 iso- lates the feedback amplifier from the load by providing high output impedance at high frequencies thus allowing the 10Ω resistor to decouple the capacitive load and reduce the Q of the series resonant circuit. The LR combination also pro- vides low output impedance at low frequencies thus shorting out the 10Ω resistor and allowing the amplifier to drive the series RC load (large capacitive load due to long speaker cables) directly. INVERTING AMPLIFIER APPLICATION The inverting amplifier configuration may be used instead of the more common non-inverting amplifier configuration shown in Figure 1. The inverting amplifier can have better THD+N performance and eliminates the need for a large capacitor (Ci) reducing cost and space requirements. The values show inFigure 6are only one example of an amplifier with a gain of 20V/V (Gain = -R f/Ri). For different resistor values, the value of R B should be eqaul to the parallel combination of Rf and Ri. LM4733 www.national.com 18

the Proper Selection of External Componentssection. FIGURE 6. Inverting Amplifier Application Circuit

FIGURE 7. Reference PCB Schematic

Application Information (Continued) LM4733 REFERENCE BOARD ARTWORK 20079405 Composite Layer 20079404 Silk Layer 20079407 Top Layer 20079408 Bottom Layer LM4733 www.national.com21

Application Information (Continued) Bill Of Materials for Reference PCB Symbol Value Tolerance Type/Description Comment RIN1,R IN2,R IN3 33kΩ 5% 1/4 Watt RB1,R B2,R B3 1kΩ 1% 1/4 Watt RF1,R F2,R F3 20kΩ 1% 1/4 Watt Ri1,R i2,R i3 1kΩ 1% 1/4 Watt RSN1,R SN2,R SN3 4.7Ω 5% 1/4 Watt RG 2.7Ω 5% 1/4 Watt RM 5.6kΩ 5% 1/4 Watt CIN1,C IN2,C IN3 1µF 10% Metallized Polyester Film Ci1,C i2,C i3 68µF 20% Electrolytic Radial / 50V CSN1,C SN2,C SN3 0.1µF 20% Monolithic Ceramic CN1,C N2,C N3 15pF 20% Monolithic Ceramic CS1,C S2 0.1µF 20% Monolithic Ceramic CS3,C S4 10µF 20% Electrolytic Radial / 50V CS5,C S6 2,200µF 20% Electrolytic Radial / 50V S1 SPDT (on-on) Switch J1,J 2,J 3 Non-Switched PC Mount RCA Jack J5,J 7,J 9,J 11 PCB Banana Jack - BLACK J4,J 6,J 8,J 10,J 12 PCB Banana Jack - RED 27 lead TO-220 Power Socket with push release lever or LM4733 IC LM4733 www.national.com 22

Physical Dimensions inches (millimeters) unless otherwise noted Non-Isolated TO-220 27-Lead Package Order Number LM4733TA LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Americas Customer Support Center Email: new.feedback@nsc.com Tel: 1-800-272-9959 National Semiconductor Europe Customer Support Center Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 National Semiconductor Asia Pacific Customer Support Center Email: ap.support@nsc.com National Semiconductor Japan Customer Support Center Fax: 81-3-5639-7507 Email: jpn.feedback@nsc.com Tel: 81-3-5639-7560 www.national.com LM4733 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.