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UNISONIC TECHNOLOGIES CO., LTD L16B45B Advance CMOS IC www.unisonic.com.tw 1 of 10 Copyright © 2017 Unisonic Technologies Co., Ltd QW-R102-085.b 16-BIT CONSTANT CURRENT LED SINK DRIVER DESCRIPTION The UTC L16B45B is designed for LED displays. UTC L16B45B contains a serial buffer and data latches which convert serial input data into parallel output format. at UTC L16B45B output stage, sixteen regulated current ports are designed to provide uniform and constant current sinks for driving LEDs within a large range of V F variations. UTC L16B45B provides users with great flexibility and device performance while using UTC L16B45B in their system design for LED display applications, e.g. LED panels. Users may adjust the output current from 0.6mA to 45m A through an external resistor, R-EXT, which gives users flexibility in controlling the light intensity of LEDs. UTC L16B45B guarantees to endure maximum 11V at the output port. The high clock frequency, 35MHz, also satisfies the system requirements of high volume data transmission. FEATURES * 16 constant-current output channels * Constant output current invariant to load voltage change: Constant output current range: 0.6~45mA @ V DD=5V 0.6~35mA @ VDD=3.3V * Output current adjusted through an external resistor * Fast response of output current, OE : 20ns @ VDD=3.3V * Schmitt trigger input * 3.3V, 5V supply voltage SSOP-24 ORDERING INFORMATION Ordering Number Lead Free Halogen Free Package Packing L16B45BL-R24-R L16B45BG-R24-R SSOP-24 Tape Reel
UNISONIC TECHNOLOGIES CO., LTD 2 of 10 www.unisonic.com.tw Q W - R 1 0 2 - 0 8 5 . b MARKING PIN CONFIGURATION PIN DESCRIPTION PIN NO. PIN NAME DESCRIPTION
1 GND Ground terminal for control logic and current sink
2 SERIAL-IN Serial-data input to the shift register
3 CLOCK Clock input terminal for data shift on rising edge
4 LATCH
Data strobe input terminal Serial data is transferred to the output latch when LE is high. The data is latched when LE goes low. 5~20 OUT0~15 Constant current output terminals
21 ENABLE
When (active) low, the output drivers are enabled; when high, all output drivers are turned OFF (blanked).
22 SERIAL-OUT Serial-data output to t he following SDI of next driver IC
23 R EXT Input terminal used to connect an external resistor for setting up output current for all
24 V DD 3.5V/5V supply voltage terminal
UNISONIC TECHNOLOGIES CO., LTD 3 of 10 www.unisonic.com.tw Q W - R 1 0 2 - 0 8 5 . b BLOCK DIAGRAM
UNISONIC TECHNOLOGIES CO., LTD 4 of 10 www.unisonic.com.tw Q W - R 1 0 2 - 0 8 5 . b ABSOLUTE MAXIMUM RATING PARAMETER SYMBOL RATINGS UNIT Supply Voltage V DD 0~7.0 V Input Voltage V IN -0.4 ~ V DD+0.4 V Output Current I OUT 45 mA Output Voltage V OUT -0.5 ~ +11 V Clock Frequency F CLK 35 MHz GND Terminal Current I GND 720 mA Power Dissipation (TA=25°C) P D 0.9 W Storage Temperature T STG -55 ~ +150 °C Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. DC ELECTRICAL CHARACTERISTICS (VDD=5.0V, TA=25°C) PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT “H” Level V IH 0.7×V DD V DD Input Voltage “L” Level V IL GND 0.3×V DD V Output Leakage Current I OH V OH=9V 0.2 uA VOL I OL=1.0mA 0.4 Output Voltage (S-OUT) VOH I OH=-1.0mA 4.6 V IOL1 V OUT=1V, REXT=910Ω ±2 Output Current (Bit to Bit) IOL2 V OUT=1V, REXT=420Ω ±2 IOL3 V OUT=1V, REXT=910Ω ±4 Output Current (chip to chip) IOL4 V OUT=1V, R EXT=420Ω ±4 % Output Current vs. Supply Voltage Regulation %/VDD R EXT=420Ω, TA=-40~85°C ±1 %/V Output Current vs. Output Voltage Regulation %/VDS R EXT=420Ω, TA=-40~85°C ±0.1 %/V Pull-Up Resistor R IN (up) 500 K Ω Pull-Down Resistor R IN (down) 500 K Ω IDD (off) 1 R EXT=OPEN, OUT0~15=off 5 8 “OFF” IDD (off) 2 R EXT=420Ω, OUT0~15=off 10 15 Supply Current “ON” I DD (on) 1 R EXT=420Ω, OUT0~15=on 10 15 mA
UNISONIC TECHNOLOGIES CO., LTD 5 of 10 www.unisonic.com.tw Q W - R 1 0 2 - 0 8 5 . b DC ELECTRICAL CHARACTERISTICS (VDD=3.3V, TA=25°C) PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT “H” Level V IH 0.7×V DD V DD Input Voltage “L” Level V IL GND 0.3×V DD V Output Leakage Current I OH V OH=9V 0.2 uA VOL I OL=1.0mA 0.5 Output Voltage (S-OUT) VOH I OH=-1.0mA 2.8 V IOL1 V OUT=1V, REXT=2720Ω ±2 Output Current (Bit to Bit) IOL2 V OUT=1V, REXT=910Ω ±2 % IOL3 V OUT=1V, REXT=2720Ω ±4 Output Current (chip to chip) IOL4 V OUT=1V, R EXT=910Ω ±4 % Output Current vs. Supply Voltage Regulation %/VDD R EXT=910Ω, TA=-40~85°C ±1 %/V Output Current vs. Output Voltage Regulation %/VDS R EXT=910Ω, TA=-40~85°C ±0.1 %/V Pull-Up Resistor R IN (up) 500 K Ω Pull-Down Resistor R IN (down) 500 K Ω IDD (off) 1 R EXT=OPEN, OUT0~15=off 4 6 “OFF” IDD (off) 2 R EXT=910Ω, OUT0~15=off 6 10 Supply Current “ON” I DD (on) 1 R EXT=910Ω, OUT0~15=on 6 10 mA SWITCHING CHARACTERISTICS (VDD=5V, TA=25°C) PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT CLOCK-OUT0 20 LATCH-OUT0 20 ENABLE-OUT0 20 Propagation Delay Time (“L” to “H”) CLOCK-SERIAL_OUT t pLH ns CLOCK-OUT0 30 LATCH-OUT0 30 ENABLE-OUT0 30 Propagation Delay Time (“H” to “L”) CLOCK-SERIAL_OUT t pHL ns Setup Time for SDI t setup 5 ns Hold Time for SDI t hold 8 ns Setup Time for LE t setup (L) 15 ns Hold Time for LE t hold (L) 10 ns Group1-Group2 t GD1 2 ns Group1-Group3 t GD2 4 ns Propagation Delay Time Group1-Group4 t GD3 6 ns CLOCK t wCLK 15 ns LATCH t wLATCH 15 ns Pulse Width ENABLE t wEN 20 ns Output Rise Time of IOUT t or 10 ns Output Fall Time of IOUT t of VDD=5V, VIH=VDD VIL=GND, REXT=1KΩ VL=4.5V, RL=150Ω CL=10pF 10 ns
UNISONIC TECHNOLOGIES CO., LTD 6 of 10 www.unisonic.com.tw Q W - R 1 0 2 - 0 8 5 . b SWITCHING CHARACTERISTICS (VDD=3.3V, TA=25°C) PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT CLOCK-OUT0 20 LATCH-OUT0 20 ENABLE-OUT0 20 Propagation Delay Time (“L” to “H”) CLOCK-SERIAL_OUT t pLH ns CLOCK-OUT0 30 LATCH-OUT0 30 ENABLE-OUT0 30 Propagation Delay Time (“H” to “L”) CLOCK-SERIAL_OUT t pHL ns Setup Time for SDI t setup 5 ns Hold Time for SDI t hold 8 ns Setup Time for LE t setup (L) 15 ns Hold Time for LE t hold (L) 15 ns Group1-Group2 t GD1 2 ns Group1-Group3 t GD2 4 ns Propagation Delay Time Group1-Group4 t GD3 6 ns CLOCK t wCLK 20 ns LATCH t wLATCH 20 ns Pulse Width ENABLE t wEN 40 ns Output Rise Time of IOUT t or 20 ns Output Fall Time of IOUT t of VDD=3.3V, VIH=VDD, VIL=GND, REXT=1KΩ, VL=3V, RL=100Ω, CL=10pF 20 ns
UNISONIC TECHNOLOGIES CO., LTD 7 of 10 www.unisonic.com.tw Q W - R 1 0 2 - 0 8 5 . b TEST CIRCUIT FOR DC ELECTRICAL CHARACTERISTICS VIH, VIL IIH, IIL IDD VDD VDD ENABLE CLOCK LATCH SERIAL-IN Iref R-EXT GND OUT0 OUT15 SERIAL-OUT IOUT VDS TEST CIRCUIT FOR SWITCHING ELECTRICAL CHARACTERISTICS
UNISONIC TECHNOLOGIES CO., LTD 8 of 10 www.unisonic.com.tw Q W - R 1 0 2 - 0 8 5 . b TIMING DIAGRAM
UNISONIC TECHNOLOGIES CO., LTD 9 of 10 www.unisonic.com.tw Q W - R 1 0 2 - 0 8 5 . b TIMING WAVEFORM
UNISONIC TECHNOLOGIES CO., LTD 10 of 10 www.unisonic.com.tw Q W - R 1 0 2 - 0 8 5 . b EQUIVALENT CIRCUITS OF INPUTS AND OUTPUTS IN VDD IN VDD IN VDD VDD OUT ENABLE Terminal TerminalCLOCK, SERIAL-IN TerminalLATCH TerminalSERIAL-OUT UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice.