KP400XTMA1 INFINEON | Alldatasheet
Document overview
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Technical content
Features
- Several PSI5-modes selectable by EEPROM bit
- ISO 26262 Safety Element out of Context for safety requirements up to ASIL B(D)
- Compatible to AK-LV 29
- End-of-line EEPROM programming via PSI5 interface
- EEPROM for ID number, calibration and mode selection
- Relative pressure signal (∆p/p 0-signal)
- Application compatible to KP20x and KP30x Potential applications Pressure sensor for side crash detection Product validation Product validation according to AEC-Q100 (Grade 1) and AEC-Q103-002 (Grade M1). Qualified for automotive applications.
Description
The device is a pressure sensor for the detection of side crashes in passenger cars. In this application the pressure sensor is assembled in a door module located within the car's side door. When the air volume is compressed due to the collision, the device provides an output, which is proportional to the pressure change inside the sensitive air volume (∆p/p0). The amplitude of the output is independent of the ambient pressure but is dependent on the relative pressure change. The device provides the relative pressure as a digital Manchester encoded output signal. This cost optimized configuration allows autonomous operation of the sensor without any further logic ICs in the pressure satellite. Product type Package Marking Ordering code KP400 PG-DFN-8-1 KP400 SP005414523 KP400 Technical product description Datasheet Please read the sections "Important notice" and "Warnings" at the end of this document Rev. 1.00 www.infineon.com 2025-01-31
Technical product description Table of contents Datasheet 2 Rev. 1.00 2025-01-31
Technical product description Table of contents Datasheet 3 Rev. 1.00 2025-01-31
1 Product description
1.1 Functional safety features
Several functional safety features are implemented by the device to ensure safe operation in the respective applications.
1.2 Operating modes
The device supports the following operating modes and can be selected by EEPROM. Table 1 Definition of valid operating modes Mode Dynamic range Sensitivity Available protocols p0 range p0 or Tj transmission P10P-500/4H P16CRC-500/3H P16CRC-500/2L 45.5 ... 110 kPa no Note: • The parameters "Dynamic range" (clipping limits) and "Sensitivity" are linked with the selected operating mode.
- Only the here specified protocols in combination with the operating modes are allowed and verified. For maximum number of allowed time slots refer to section "PSI5 protocols" in datasheet (Rev. 1.10), 2024-08-23
- For some operating modes with additional time slots, the maximum supply voltage VDD is reduced. For details see Table 4. KP400 Technical product description
Datasheet 4 Rev. 1.00 2025-01-31
2 Pin configuration
The figure below shows the pin configuration. GND I_OUT NC SDIO VDDP SCLK VDD/VPROG CAP HS Top view Figure 1 Pin configuration (PG-DFN-8-1) The table below shows the pin description. Table 2 Pin description Pin No. Symbol Function Comment
1 VDDP power supply for serial i/f drivers +5V, internal pull down
2 SCLK serial interface clock internal pull up
3 SDIO input and output pin for serial interface internal pull up
4 NC not connected
5 CAP buffer capacitance optional
6 VDD/VPROG supply voltage / EEPROM Programming voltage –
7 I_OUT current modulator output –
8 GND sensor ground –
9 HS heat sink on bottom side of package
Note: Pins 1 ... 4 must be kept on a floating potential in the application. Pin 9 must be kept on a floating potential and it must not be soldered to the PCB. For that purpose a keep- out area shall be placed around the heat sink during board design (see Chapter 6.2). KP400 Technical product description Datasheet 5 Rev. 1.00 2025-01-31
3 General product characteristics
3.1 Absolute maximum ratings
Table 3 Absolute maximum ratings Parameter Symbol Values Unit Note or condition NumberMin. Typ. Max. Voltage on VDD VDD -16.5 – 24 V | VDD - Viout| ≤ 24 V REQ-2581 Voltage on I_OUT Viout -16.5 – 24 V | VDD - Viout| ≤ 24 V REQ-2582 Voltage on CAP VCAP -16.5 – 24 V | VDD - Viout| ≤ 24 V REQ-2583 Voltage on serial pins (VDDP , SCLK, SDIO, NC) Vdig_pin -0.3 – 5.5 V REQ-2584 Current on serial pin (SCLK, SDIO) Idig_out – – 0.1 mA REQ-2585 Supply current on VDDP pin IVDDP – – 1 mA REQ-2586 Ambient storage temperature Tst -55 – 135 °C REQ-2588 Input pressure range prange 10 – 300 600 *) kPa kPa *) limited time: max. 300 s REQ-2589 ESD robustness according to Human Body Model (HBM) HV-pins: VDD, GND, I_OUT , CAP VESD-HV – – 4 kV according to ANS/ ESDA/ JEDEC JS-001 REQ-2590 ESD robustness according to Human Body Model (HBM) LV-pins: VDDP , SCLK, SDIO, NC VESD-LV – – 2 kV according to ANS/ ESDA/ JEDEC JS-001 REQ-2591 Latch-up robustness for each pin Ilatchup ±100 – – mA according to EIA/ JESD78 REQ-2592 Lid pull-off force Fpull_off_lid 1 – – N only valid at 0h and during module assembly REQ-2593 Lid push-in force Fpush_in_lid – – 10 N max. allowed force on top of the lid without damaging the sensor REQ-2594 Mechanical shock survival gst -6000 – 6000 g unpowered, 0.3 ms REQ-2595 (table continues...) KP400 Technical product description Datasheet 6 Rev. 1.00 2025-01-31
Table 3 (continued) Absolute maximum ratings Parameter Symbol Values Unit Note or condition NumberMin. Typ. Max. Differential pressure between inside and outside of package pdiff -90 300 kPa the minimum absolute pressure of prange must not be violated REQ-2596 Attention: Stresses above the max. values listed in this chapter may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit.
3.2 Operating conditions
Table 4 Operating conditions Parameter Symbol Values Unit Note or condition NumberMin. Typ. Max. Supply voltage at pin VDD VDD 4.5 – 11.0 V VDD_max = 9V for operation in triple slot mode with P10P-500/3L; VDD_max = 8.4V for operation in dual slot mode with P16CRC-500/2L REQ-2598 Voltage at pin I_OUT Viout 3.5 – 11.0 V REQ-2600 Voltage at pin CAP VCAP – – Vsync V pin only defined to connect with a capacitor; connection with a constant voltage source not allowed REQ-2602 Voltage during sync pulse at pin VDD & pin I_OUT Vsync – – 16.5 V REQ-2603 Supply voltage power up/ down gradient Vgrad 1E-5 – 1E4 V/ms REQ-2604 Ambient operating temperature TOp -40 – 90 °C temperature outside the sensor REQ-2605 Absolute operating pressure range pabs 40 – 126.5 kPa range for pressure pulses during a crash REQ-2609 (table continues...) KP400 Technical product description Datasheet 7 Rev. 1.00 2025-01-31
Table 4 (continued) Operating conditions Parameter Symbol Values Unit Note or condition NumberMin. Typ. Max. Ambient operating pressure for p0-range1 pamb_1 45.5 – 110.0 kPa range for p0 value in p0-range1 REQ-2611 Lifetime tlive 15 – – years REQ-2613 Operating time 1 tOp_1 – – 12000 h valid for temperature mission profile as specified in AK LV29 (SAB) [4] REQ-2614 Note: Outside the normal operation supply voltage range the overvoltage detection disables the Manchester communication. As long as the overvoltage detection has not detected an overvoltage, the sensor operates inside the specified operating range. Attention: The device is sensitive to light entering through the pressure port. All specifications are valid for a illuminance of less than 1 lx.
3.3 Electrical characteristics
Product characteristics involve the spread of values ensured within the specified voltage and ambient temperature range. Typical characteristics are the median of the production.
3.3.1 Power supply and micro break circuitry
Table 5 Power supply and micro break circuitry Parameter Symbol Values Unit Note or condition NumberMin. Typ. Max. Supply current into VDD IVDD 3.5 – 5.5 mA REQ-2617 Supply current into I_OUT II_OUT_idle 0.0 – 0.8 mA REQ-2618 Common supply current into VDD & I_OUT Iidle 4.0 – 6.0 mA REQ-2619 Current during Manchester communication IMan 26 31 36 mA IMan = Iidle + ∆Imod REQ-2620 Ripple current on supply voltage Iripple -0.5 – 0.5 mA 0 Hz - 2 MHz; Iripple is max AC amplitude and only valid with application circuit REQ-2622 (table continues...) KP400 Technical product description Datasheet 8 Rev. 1.00 2025-01-31
Table 5 (continued) Power supply and micro break circuitry Parameter Symbol Values Unit Note or condition NumberMin. Typ. Max. Supply current drift rate Iidle_drift – – 1.0 mA/s characterized by the average of minimum 1s REQ-2623 Voltage level for activating micro break function Vµb 3.1 – 4.1 V REQ-2628 Microcut rejection time tCAP 10 – – µs Time below Vµb where no sensor reset is allowed; Cbuf > 100 nF REQ-2630 Micro break hysteresis Vµb_hys 0.4 – 0.9 V application resistors: 47 Ω ±5% REQ-2631 Load resistor for Cbuf RCAP 1.4 2.0 2.6 kΩ resistor value between VDD and CAP pin REQ-2633 External buffer capacitor Cbuf 0 – 1 µF no capacitor needed to avoid oscillation of regulator; 1) REQ-2634 Allowed range for Cbuf to pass buffer-cap- diagnosis-test Cbuf_test 33 – Cbuf nF VDD = 6 V; CAP- pin discharged to GND before start- up; At values below, buffer-cap- diagnosis-test might diagnose a missing Cbuf REQ-2636 1) If a capacitor value below Cbuf_test_min is used, the buffer-cap-diagnosis-test must be disabled in EEPROM; a value larger than given here can lead to a violation of the PSI5 specification parameter tTh; KP400 Technical product description Datasheet 9 Rev. 1.00 2025-01-31
3.3.2 Data range and accuracy
Table 6 Data range and accuracy Parameter Symbol Values Unit Note or condition NumberMin. Typ. Max. Nominal measurement range1 (Mode 1) rangenom1 -5.0 – +15.0 % outside the specified nominal measurement range the output value is clipped REQ-2637 ∆p/p0 output data range1 (Mode 1) ∆p/p0_dat1 -102 – 307 LSB outside this defined output data range the output value is clipped REQ-2640 Nominal sensitivity1 senseout1 – 2.048 – LSB/‰ output signal ∆p/p0 REQ-2644 Pressure data offset ∆p/p0_off -0.5 – 0.5 LSB average value at constant pressure REQ-2647 Sensitivity error at 0h senseerr1_0h -6.0 – +6.0 % ∆p/p0 > 10.0% (over full temperature range) REQ-2648 Sensitivity error over lifetime senseerr -7.0 – +7.0 % ∆p/p0 > 10.0%; (overall sensitivity error: incl. temperature, non-linearity etc.) REQ-2649 ∆p/p0 noise (RMS) (sensitivity1, p0 = 53.6 ... 110 kPa) noiserms,1 0 – 1.5 LSB standard deviation of ∆p/p0 at constant pressure (e.g. 99.7% of the values inside the ±4.5 LSB range) REQ-2652 ∆p/p0 noise (RMS) (sensitivity1, p0 = 45.5 ... 53.6kPa) noiserms,1_LP 0 – 2.0 LSB standard deviation of ∆p/p0 at constant pressure (e.g. 99.7% of the values inside the ±6 LSB range) REQ-2653 (table continues...) KP400 Technical product description Datasheet 10 Rev. 1.00 2025-01-31
Table 6 (continued) Data range and accuracy Parameter Symbol Values Unit Note or condition NumberMin. Typ. Max. ∆p/p0 noise (Peak) noisepeak,1 -6 – +6 LSB during characterization only: Peak value for 10k samples; 0h & 25°C, sensitivity1 REQ-2654 Non-linearity for pressure pulses up to 23.4% sensen_lin1 -1.0 – +1.0 ‰ difference between actual characteristics and best fit quantized line REQ-2656 Pressure offset during acceleration pacc – – 3.5 Pa/g ensured by design REQ-2658 p0 data transmission sensitivity (p0 range1) p0_sens_r1 – 0.01868 – kPa/LSB valid for Phase 3 and Phase 4 REQ-2661 p0 data transmission offset p0_offset – 50 – kPa valid for Phase 3 and Phase 4 REQ-2663 p0 data error (p0 range1) p0_err1 -3.5 – 3.5 kPa valid for Phase 3 and Phase 4 REQ-2664 Tj data transmission sensitivity Tj_sens – 0.61162 – °C/LSB valid for Phase 3 and Phase 4 REQ-2668 Tj data transmission offset Tj_offset – -94 – °C valid for Phase 3 and Phase 4 REQ-2669 Tj error (Tj = 0°C ... 100°C) Tj_err -5 – +5 °C valid for Phase 3 and Phase 4 REQ-2670 Tj error (Tj < 0°C; Tj > 100°C) Tj_err2 -10 – 10 °C valid for Phase 3 and Phase 4 REQ-2671
3.3.3 Digital core and signal path filter
Table 7 Digital core and signal path filter Parameter Symbol Values Unit Note or condition NumberMin. Typ. Max. Internal clock frequency fclk – 16.0 – MHz REQ-2676 Clock variation CLKtol -4.0 – 4.0 % REQ-2677 (table continues...) KP400 Technical product description Datasheet 11 Rev. 1.00 2025-01-31
Table 7 (continued) Digital core and signal path filter Parameter Symbol Values Unit Note or condition NumberMin. Typ. Max. Clock variation during Manchester frame CLKvar/frame – – 0.1 % maximum allowed temperature gradient is +/- 1 K/min REQ-2678 Clock drift rate CLKdrift – – 1.0 %/s average of min. 1s; maximum allowed temperature gradient is +/-1 K/min REQ-2679 Sigma delta sample frequency fcic – 1 – MHz average over 1 second REQ-2680 p & p0 register update fpreg – 31.25 – kHz proportional to clock frequency REQ-2681 Cut-off frequency p filter fcp – 370 – Hz 2nd order low pass filter proportional to clock frequency REQ-2682 p0 filter gradient |∆p0/∆t| 0.39 0.44 0.49 kPa/s REQ-2685
3.3.4 PSI5 interface
Parameter Symbol Values Unit Note or condition NumberMin. Typ. Max. Bit time in 125 kbps mode tBit – 8.0 – µs proportional to clock frequency REQ-2687 Bit time in 189 kbps mode tBit_H – 5.3 – µs proportional to clock frequency REQ-2688 Signal modulation current ∆Imod 22 26 30 mA REQ-2689 (table continues...) KP400 Technical product description Datasheet 12 Rev. 1.00 2025-01-31
Table 8 (continued) PSI5 interface Parameter Symbol Values Unit Note or condition NumberMin. Typ. Max. Fall/rise time current slope tMan_R/F 0.33 – 1.0 µs trise 20, 80 & tfall 80, 20, according to the PSI5 reference network, the PSI5 sensor reference tests conditions A & B [1] and the application circuit example REQ-2691 Duty cycle ratio Manchester rMan_duty 47 50 53 % (tfall,80 - trise,20) / tBit (tfall,20 - trise,80) / tBit according to the PSI5 reference network, the PSI5 sensor reference tests conditions A [2] and the application circuit example REQ-2692 Sync pulse detection threshold Vtrig 1.4 2.0 2.6 V The absolute sync pulse detection voltage is calculated by adding Vtrig to the supply voltage Vidle (see Chapter 4.1.1.2) REQ-2693 Time between detected rising edge of sync pulse and start of 1st Manchester bit in the PSI5-P10P-500/3L slot1 mode tSlot1,frame 44.1 46.4 48.7 µs 1st Manchester bit starts with nom. 4µs low time; the trigger detection tolerance (ttol_detect) is not included in this timing. REQ-2704 (table continues...) KP400 Technical product description Datasheet 13 Rev. 1.00 2025-01-31
Table 8 (continued) PSI5 interface Parameter Symbol Values Unit Note or condition NumberMin. Typ. Max. Time between detected rising edge of sync pulse and start of 1st Manchester bit in the PSI5-P10P-500/3L slot2 mode tSlot2,frame 181.3 190.9 200.4 µs 1st Manchester bit starts with nom. 4µs low time; the trigger detection tolerance (ttol_detect) is not included in this timing REQ-2705 Time between detected rising edge of sync pulse and start of 1st Manchester bit in the PSI5-P10P-500/3L slot3 mode tSlot3,frame 328.9 346.3 363.6 µs 1st Manchester bit starts with nom. 4µs low time; the trigger detection tolerance (ttol_detect) is not included in this timing REQ-2706 Time between detected rising edge of sync pulse and start of 1st Manchester bit in the PSI5-P10P-500/4H slot1 mode t4H_Slot1,frame 44.1 46.4 48.7 µs 1st Manchester bit starts with nom. 2.65µs low time; the trigger detection tolerance (ttol_detect) is not included in this timing REQ-2710 Time between detected rising edge of sync pulse and start of 1st Manchester bit in the PSI5-P10P-500/4H slot2 mode t4H_Slot2,frame 139.5 146.9 154.2 µs 1st Manchester bit starts with nom. 2.65µs low time; the trigger detection tolerance (ttol_detect) is not included in this timing REQ-2711 (table continues...) KP400 Technical product description Datasheet 14 Rev. 1.00 2025-01-31
Table 8 (continued) PSI5 interface Parameter Symbol Values Unit Note or condition NumberMin. Typ. Max. Time between detected rising edge of sync pulse and start of 1st Manchester bit in the PSI5-P10P-500/4H slot3 mode t4H_Slot3,frame 245.5 258.4 271.4 µs 1st Manchester bit starts with nom. 2.65µs low time; the trigger detection tolerance (ttol_detect) is not included in this timing REQ-2712 Time between detected rising edge of sync pulse and start of 1st Manchester bit in the PSI5-P10P-500/4H slot4 mode t4H_Slot4,frame 362.5 381.6 400.7 µs 1st Manchester bit starts with nom. 2.65µs low time; the trigger detection tolerance (ttol_detect) is not included in this timing REQ-2713 Time between detected rising edge of sync pulse and start of 1st Manchester bit in the PSI5-P16CRC-500/3H slot1 mode t3H_Slot1,frame 44.5 46.4 48.3 µs 1st Manchester bit starts with nom. 2.65µs low time; the trigger detection tolerance (ttol_detect) is not included in this timing REQ-2714 Time between detected rising edge of sync pulse and start of 1st Manchester bit in the PSI5-P16CRC-500/3H slot2 mode t3H_Slot2,frame 183.2 190.9 198.5 µs 1st Manchester bit starts with nom. 2.65µs low time; the trigger detection tolerance (ttol_detect) is not included in this timing REQ-2715 (table continues...) KP400 Technical product description Datasheet 15 Rev. 1.00 2025-01-31
Table 8 (continued) PSI5 interface Parameter Symbol Values Unit Note or condition NumberMin. Typ. Max. Time between detected rising edge of sync pulse and start of 1st Manchester bit in the PSI5-P16CRC-500/3H slot3 mode t3H_Slot3,frame 332.4 346.3 360.1 µs 1st Manchester bit starts with nom. 2.65µs low time; the trigger detection tolerance (ttol_detect) is not included in this timing REQ-2716 Time between detected rising edge of sync pulse and start of 1st Manchester bit in the PSI5-P16CRC-500/2L slot1 mode t2L_Slot1,frame 44.1 46.4 48.7 µs 1st Manchester bit starts with nom. 4µs low time; the trigger detection tolerance (ttol_detect) is not included in this timing REQ-2717 Time between detected rising edge of sync pulse and start of 1st Manchester bit in the PSI5-P16CRC-500/2L slot2 mode t2L_Slot2,frame 252.8 266.1 279.4 µs 1st Manchester bit starts with nom. 4µs low time; the trigger detection tolerance (ttol_detect) is not included in this timing REQ-2718 Filter sample time before start of frame for time slot tfilter_freeze1 – 32 – µs proportional to clock frequency; valid for 1st slot transmission in PSI5-P10P-500/3L and PSI5- P10P-500/4H modes only REQ-2720 Filter sample time before start of frame for time slot 2 and 3 and 4 tfilter_freeze – 40 – µs proportional to clock frequency REQ-2721 Gap time in 125kHz modes tGAP_L 8.4 – – µs proportional to clock frequency REQ-2722 Gap time in 189kHz modes tGAP_H 5.6 – – µs proportional to clock frequency REQ-2723 (table continues...) KP400 Technical product description Datasheet 16 Rev. 1.00 2025-01-31
Table 8 (continued) PSI5 interface Parameter Symbol Values Unit Note or condition NumberMin. Typ. Max. Trigger detection tolerance ttol_detect 0 – 3 µs REQ-2724 Duration of phase 1 tP1 90.0 – 110.0 ms REQ-2725 Duration of phase 2a tP2a – 256 – frame REQ-2726 Duration of phase 2b tP2b 0 – 768 frame REQ-2727 Duration of phase 3a tP3a – 5 – frame REQ-2728 Duration of phase 3b tP3b – 14 – frame REQ-2729 Repetition of ID data k – 4 – REQ-2730 Time threshold for the sensor to declare a gap tsync_max – 576 – µs proportional to clock frequency REQ-2731
3.3.5 EEPROM and load characteristics
Table 9 EEPROM and load characteristics Parameter Symbol Values Unit Note or condition NumberMin. Typ. Max. No. of EEPROM programming cycles nprog – – 3 – a programming cycle is defined as applying the programming pulse once in order to change the state of at least one EEPROM cell REQ-2736 Programming temperature Tprog 10 – 30 °C REQ-2741 Margin voltage “1” Vmargin_1 – 0 0.25 V 0h value, directly after programming REQ-2742 Margin voltage “0” Vmargin_0 2.0 – 5.0 V 0h value, directly after programming REQ-2743 KP400 Technical product description Datasheet 17 Rev. 1.00 2025-01-31
4 Functional block description
4.1 PSI5 interface: Sensor-to-ECU communication
The physical link between ECU and the satellites is a two-wire, twisted pair connection according to the PSI5 standard ([2] and [3]). It provides the supply voltage to the satellite and is also used for the data transmission between the satellite and the ECU. The communication between satellite and ECU can be unidirectional (asynchronous communication) or bidirectional (synchronous communication).
4.1.1 Physical layer
For data transmission from the sensor to the ECU, a Manchester-coded current modulation is used. I Iidle IMan tBit ΔI mod t Figure 2 Manchester based current modulation
4.1.1.1 Synchronous communication
In the synchronous communication mode a short voltage pulse (sync pulse), generated by the receiver, is used as a synchronization event. The sensor detecting this sync pulse starts its data transmission after a defined period of time. This operation mode supports more than one satellite per physical channel. If the sensor is configured to synchronous mode, synchronization pulses from the ECU are expected. In synchronous mode the sensor only transmits the data message after recognizing a sync pulse. In PSI5-P10P-500/3L mode for example, the sensor can transmit the Manchester frames in the 1st, 2nd or 3rd slot (tSlot1,frame, tSlot2,frame, tSlot3,frame). KP400 Technical product description Datasheet 18 Rev. 1.00 2025-01-31
U sync pulse V idle t0 tSlot1,frame t tsync = 500 µs ± 5 µs (defined by the ECU) tSlot2,frame tSlot3,frame tGAP 2 nd slot 3 rd slot PSI5-P10P-500/3L Mode 1 st slot Figure 3 Timing in synchronous mode
4.1.1.2 Synchronization pulse detection
The externally generated synchronization pulse is detected by the integrated sync pulse detection circuit. The output of a comparator, which is part of the sync pulse detection circuit, provides a digital signal whether a valid synchronization pulse voltage is detected or not. This digital signal is sampled at the time when the rising edge of the synchronization pulse is inside the sync pulse detection window and has a delay of ttol_detect. Figure 4 shows the time correlation of the PSI5 output to the sync pulse. The trigger detection time TTRIG on system level is determined by adding up the sensors trigger detection tolerance ttol_detect and the contributions from the system, as defined in the PSI5 specification [2]. Note: The system contributions to the trigger detection time TTRIG are not shown in Figure 4. ...ΔI mod Time t xx_Slotx,framet tol_detect t bit V trig V idle Figure 4 PSI5 slot timing KP400 Technical product description Datasheet 19 Rev. 1.00 2025-01-31
After detecting the rising edge of a sync pulse the sensor observes the voltage level of the synchronization pulse for nsync_det samples with a sampling frequency of fsync_sampl. If the sample voltage observed is above the specified sync pulse detection threshold Vtrig an up-counter is incremented by "1" . If the line voltage is less than the detection threshold voltage Vtrig the counter is not incremented. After nsync_det samples the status of the up-counter is readout. Only if the counter is inside the nsync_detval range, a valid sync pulse is detected. Otherwise no sync pulse will be detected and the up-counter will be reset. t status wait for sync pulse voltage level observing 0 1 2 3 3 4 5 6 34 35counter Vidle Vsync sample no. 1 2 3 4 5 6 35 36 read counter Vidle + Vtrig breakdown during sync pulse transmission clock 1 2 3 4 5 6 35 36 Figure 5 Sync pulse counter functionality If a valid sync pulse is detected then a Manchester frame is sent out in the programmed time slot. During this time (tsync_off_xxx) no further sync pulses can be detected. A sync pulse of minimum 9µs in normal duration is recommended. t tsync_off_xxx Manchester frame valid sync pulses Figure 6 Sync pulse detection off time KP400 Technical product description Datasheet 20 Rev. 1.00 2025-01-31
4.1.2 Data link layer
4.1.2.1 PSI5 protocols
The data link layer is based on PSI5 specified modes described in the technical specification for a peripheral sensor interface [2]. The following modes are available (selectable by EEPROM bit): Synchronous modes:
- PSI5-P10P-500/3L - single slot mode - 1 st or 2nd or 3rd slot
- PSI5-P10P-500/4H - single slot mode - 1 st or 2nd or 3rd or 4th slot
- PSI5-P16CRC-500/2L - single slot mode - 1 st or 2nd slot
- PSI5-P16CRC-500/3H - single slot mode - 1 st or 2nd or 3rd slot Note: Only the here specified protocols in combination with the operating modes specified in Chapter 1.2 are allowed and verified.
4.1.2.2 Data protocol (10-bit format)
The default data frame structure is defined by a 13-bit message format. The message consists of two (2) start bits, ten (10) data bits and one (1) parity bit (number of high bits in the binary data and parity value). 0 0 0 1 2 3 4 5 6 7 8 9 DATA P LSB MSB10-bit Protocol Figure 7 10-bit protocol (13-bit message) The message bits are described in the table below: Table 10 Data field 13-bit message Message Bit Definition Logic Level 0 ... 1 start bit 1 and 2 0 12 parity (even) 0, 1
4.1.2.2.1 Data range
The operation of the device is divided into four phases. Each phase will use its own data range for transmission of data from the sensor to the ECU. The figure below describes the separate data ranges of the 10-bit protocol (13-bit data message). For details on the four phases, please refer to Chapter 4.1.3. KP400 Technical product description Datasheet 21 Rev. 1.00 2025-01-31
... ID code 16 ID code 15 ID code 2 ID code 1 nibble 11111 ... nibble 01101 nibble 01100 nibble 01011 nibble 01010 nibble 01001 nibble 01000 reserved (no data) reserved reserved reserved reserved reserved reserved 500 1F4 499 1F3 489 1E9 488 1E8 487 1E7 481 1E1 480 1E0 307 133 1 001 0 000 -1 3FF -70 3BA -72 3B8 -480 220 -481 21F nibble 01111 nibble 10000 nibble 01110 nibble 00111 nibble 00110 nibble 00101 nibble 00100 nibble 00011 nibble 00010 nibble 00001 nibble 00000 -492 214 -496 210 status 0000 -497 20F -498 20E -499 20D -500 20C -501 20B -502 20A -503 209 -504 208 -505 207 -506 206 -507 205 -508 204 -509 203 -510 202 -511 201 -512 200 ID code 14 ID code 13 ID code 12 ID code 11 ID code 10 ID code 9 ID code 8 ID code 7 ID code 6 ID code 5 ID code 4 ID code 3 -102 39A -307 2CD Sensor Output Signal Block ID’s and Data for Initialization Phase 4 dp/p0 data sensor defect Dp/p0 maximum (Mode 1) ... Dp/p0 = 0% ... Dp/p0 minimum (Mode 1) reserved reserved reserved sensor cell error signal chain error p0 init error p0 out of range error reserved reserved reserved reserved Dp/p0 maximum (Mode 2 & 3) ... Dp/p0 minimum (Mode 2 & 3) ... Phase 4 p0 and T data sensor defect p0 = min Tj = max reserved reserved reserved sensor cell error signal chain error p0 init error p0 out of range error reserved reserved reserved reserved p0 = max ... Tj = min ... -425 257 PSI5 test mode error reserved reserved OK status 1111 ... ID code 16 ID code 15 ID code 2 ID code 1 status 0000 ID code 14 ID code 13 ID code 12 ID code 11 ID code 10 ID code 9 ID code 8 ID code 7 ID code 6 ID code 5 ID code 4 ID code 3 protocol error protocol error reserved reserved Dp/p0 minimum (Mode 3) 482 1E2 Figure 8 Data content overview (10-bit protocol) KP400 Technical product description Datasheet 22 Rev. 1.00 2025-01-31
4.1.2.3 Data protocol (16-bit format)
When operating in 16-bit operating mode, the data frame structure is defined by a 21-bit message format. The message consists of two (2) start bits, two (2) serial channel bits, fourteen (14) data bits and three (3) CRC check bits. 0 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 DATA CRC LSB MSB 16-bit Protocol (14+2 bit) 2 1 0 serial channel Figure 9 16-bit protocol (21-bit message) in Phase 4 The message bits are described below. Table 11 Data field 21-bit message Message Bit Definition Logic Level 0 ... 1 start bit 1 and 2 0 2 ... 3 serial channel bits 0, 1 18 ... 20 CRC check bits (C2, C1, C0) 0, 1 Note: The serial messaging channel is not used and the two bits are fixed to zero ("0").
4.1.2.3.1 CRC calculation
Error detection is realized by a three bit CRC, calculated from the full 16-bit payload bits (14+2 bits). The generator polynomial of the CRC is g(x) = 1 + x + x3 with a binary CRC initialization value "111" . Start bits are ignored in the CRC check. The three check bits are transmitted in reverse order (MSB first: C2, C1, C0). Payload bits Example: 16 Bit Data Word "0xAD2C" with 3-Bit CRC CRC Calculation Scheme T T T C0 C1 C2 Input data = 1 + X + X 3 S1 S2 0 1 00 0 0 01 1 10 0 M0 M1 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 C2 C1 C0 0000 1 1 11 1 Figure 10 Example for CRC calculation KP400 Technical product description Datasheet 23 Rev. 1.00 2025-01-31
4.1.2.3.2 Data range scaling
During Phase 2 and Phase 3 as well as for error messages, the serial channel bits are not transmitted. Instead, the full 16-bit word is used to transmit data in the following format: 0 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 DATA CRC LSB MSB 16-bit Protocol 2 1 0 Figure 11 16-bit protocol (21-bit message) in Phase 2 and Phase 3 As data content, the 10-bit status and initialization words are used and extended to the 16-bit word by the following rule:
- The 10-bit word is transmitted in the MSB section of the 16-bit frame
- The 6 LSBs (D5 ... D0) are filled up with the value of the bit corresponding to the "D0" bit in the 10-bit data word. This allows the possibility to check for stuck bits in the receiver. An example is shown below. Mapping of Status & Initialization Data Example
10 Bit
16 Bit
Figure 12 Example: mapping of status and initialization data into a data word
4.1.2.3.3 Data range
The operation of the device is divided into four phases. Each phase will use its own data range for transmission of data from the sensor to the ECU. The figure below describes the separate data ranges of the 16-bit protocol. For details on the four phases, please refer to Chapter 4.1.3. KP400 Technical product description Datasheet 24 Rev. 1.00 2025-01-31
(16-bit) +32767 0x7FFF sensor defect Phase 2 Phase 3 3a 3b sensor busy 2a 2b optional sensor ready status 1111 ... ID code 16 ID code 1 nibble 11111 ... ... reserved (no data) reserved reserved reserved reserved reserved reserved +32000 0x7D00 +31232 0x7A00 +31231 0x79FF +30721 0x7801 +7680 0x1E00 +2048 0x0800 1 0x0001 0 0x0000 -1 0x3FFF -307 0x3ECD -7680 0x2200 -30721 0x87FF nibble 01111 nibble 10000 nibble 00000 -31744 0x8400 status 0000 -31745 0x83FF -32000 0x8300 -32256 0x8200 -32512 0x8100 -32641 0x807F -32768 0x8000 ... Sensor Output Signal (14-bit) Block ID’s and Data for Initialization (16-bit) Phase 4 dp/p0 data sensor defect Dp/p0 maximum (Mode 4) ... Dp/p0 = 0% ... Dp/p0 minimum (Mode 2 & 3 & 4) reserved reserved reserved sensor cell error signal chain error p0 init error p0 out of range error reserved reserved reserved reserved -31488 0x8500 protocol error reserved Note : For data in range 2 and 3, the full 16-bit data word is used. Dp/p0 maximum (Mode 2 & 3) ... +480 0x01E0 +307 0x0133 Dp/p0 maximum (Mode 1) ... -102 0x039A Dp/p0 minimum (Mode 1) Figure 13 Data content overview (16-bit message) KP400 Technical product description Datasheet 25 Rev. 1.00 2025-01-31
4.1.3 PSI5 interface application layer
The following chapter describes the different operation phases of the device in detail.
4.1.3.1 Phase 1
During Phase 1 there is no data transmission.
- Duration: t P1
- No reaction on sync pulses
- Reset and sensor self tests
- Initialization of the p 0 filter (start time is defined with tp0_init_start after internal reset, duration: tp0_init). After the initialization, the decrement / increment filter for p0 calculation is internally clocked.
- Check for the entry key of the PSI5 test mode.
- Check for test mode entry key, set via SPI command. Only during Phase 1 it is possible to enter the PSI5 test mode. In order to do this, the ECU has to send a predefined entry key sequence. After successful entry into the PSI5 test mode, the sensor will not continue with Phase 2, but stay in this mode until a reset is issued from the ECU. For details about the PSI5 test mode, please refer to the full version of the datasheet. Note: A reset from the ECU can be triggered by cycling the voltage on the VDD-pin.
4.1.3.2 Phase 2
During Phase 2 the sensor transmits identification tests and runs internal self tests
- Duration: t P2a + tP2b
- Phase 2a: Transmission of sensor identification data; repetition of ID data: k
- Phase 2b: based on the test result of the p 0 filter initialization test Additional information about phase 2b is given in the full version of the datasheet.
4.1.3.2.1 Identification data content
During Phase 2a the sensor transmits identification data. The data blocks correspond to D1...D32 as given in the PSI5 standard. Table 12 Phase 2a data content Data Field Identifier Data block Parameter Content Value Comment F1 PSI5 protocol version D1 PSI5 spec V1.3 or V2.1 xxxx V1.3 is pre-programmed, but is re-programmable by the customer F2 number of data blocks D2, D3 number of blocks 32 * 4-bit data blocks 0010 0000 fixed in ROM F3 satellite manufacturer code D4, D5 satellite manufacturer code 1 customer programming xxxx xxxx customer programmable F4 sensor type D6 sensor type pressure sensor xxxx customer programmable D7 1000b fixed (table continues...) KP400 Technical product description Datasheet 26 Rev. 1.00 2025-01-31
Table 12 (continued) Phase 2a data content Data Field Identifier Data block Parameter Content Value Comment F5 sensor parameter D8, D9 sensor parameter customer specific parameters xxxx xxxx customer programmable F6 satellite manufacturer code D10, D11 satellite manufacturer code 2 sensor specific definition xxxx xxxx customer programmable F7 sensor code D12- D14 sensor code AK-wide defined device index xxxx xxxx xxxx customer programmable F8 production date D15 year Yn: 7 bit (0...99) Mn: 4 bit (1...12) Dn: 5 bit (1...31) Y6 Y5 Y4 Y3 supplier production date is pre-programmed, but is re-programmable by the customer D16 year / month Y2 Y1 Y0 M3 D17 month / day M2 M1 M0 D4 D18 day D3 D2 D1 D0 F9 serial number D19- D20 serial number IFX line/lot/serial number 0000 0000 fixed D21- D32 xxxx programmed and locked by the supplier The field F9 contains an unique serial number for each sensor and allows complete tracing of the sensor. can be identified by the product-ID in nibble D24. Table 13 Product IDs (D24) Product name Product ID KP400 0001b KP400 Technical product description Datasheet 27 Rev. 1.00 2025-01-31
4.1.3.3 Phase 3
During phase 3, the sensor transmits diagnostics data.
- Duration: t P3a + tP3b
- Phase 3a: send status information "sensor ok" (0x1E7) or error sequence (sensor defect (0x1F4) and error classification frame)
- Phase 3a: p 0 transmission
- Phase 3b is optional: Transmission of sensor specific diagnosis data (more information about phase 3b can be found in the full version of the datasheet) With the 1st frame during Phase 3a the sensor transmits sensor ready (OK, 0x1E7) or in case of a detected error the If no error is detected, the next 4 frames transmit the p0_word_p3 value (12 bit value, separated in four 5 bit nibbles). Table 14 Phase 3a data content Frame No. Normal operation Error Function Code Function Code
1 Sensor ready 0x1E7 Sensor defect 0x1F4
2 nibble 0 0x200 ... 0x207 Error Code 0x20x 3 nibble 1 0x208 ... 0x20F Sensor defect 0x1F4 4 nibble 2 0x210 ... 0x217 Error Code 0x20x
4.1.3.3.1 Ambient pressure transmission structure
The p0_word_p3 is defined as follows and based on the output of the p0 filter. 012334526781910110 012345678910113__011011000dddnibbledddnibbledddnibbledddnibbleddddddddddddppword===== Figure 14 p 0_word_p3 definition
4.1.3.4 Phase 4
During normal operation the ∆p/p0 output value is transmitted via the PSI5 interface. If the normalized relative pressure (∆p/p0) under- or overshoots the measurement range (rangenomx), the ∆p/p0 value is clipped to the minimum/maximum allowed ∆p/p0 output value (∆p/p0_datx). The limit and value depends on the selected operating mode. In case p0 is out-of-range or if an error is detected, which still allows Manchester communication, the error sequence Note: As long as the sensor transmits Manchester data, the data is inside the specified range. No incorrect data will be sent, even in the range between the operating voltage and the reset voltage level.
4.1.3.5 Error sequence
In case of a detected error and Manchester communication is still enabled, the error sequence is sent in Phase 3 and Phase 4. The error sequence consists of the following two frames:
- 1st frame: "Sensor defect" message (0x1F4) KP400 Technical product description
Datasheet 28 Rev. 1.00 2025-01-31
- 2nd frame: Error code (see more information in the full version of the datasheet) This error sequence is sent until a power down is triggered. In case of more than one error at the same time, only the error with the highest priority is reported in the PSI5 error sequence.
4.2 Micro break functionality
The micro break control is optional and can be achieved by connecting an external buffer capacitor to the CAP pin of the device. This buffer capacitor provides energy for correct operation during micro breaks. The capacitor is charged to maximum VDD – Vdrop. The load current for the buffer capacitor is limited by the resistor RCAP. VDD CAPR CAP voltage regulator voltage regulator control logic internal supply voltage voltage divider V drop external C buf Figure 15 Simplified block level diagram for micro break functionality A diode prohibits current from conducting into the wrong direction, possibly interfering with the data transmission. The micro break control is part of the voltage regulator concept. As long as the sensor transmits Manchester data, the data is inside the specified range. No incorrect data will be sent, even in the range between the operating voltage and the reset voltage level. The size of the capacitor depends on the required micro break timing tµb and can be calculated by the following formula: VDDbufdropµbdropµbICVVVDDt ∙ --=)(_ Figure 16 Formula for micro break time calculation The micro break function is activated when the voltage on the VDD pin is below Vµb. Then the voltage regulator is supplied from the Cbuf capacitor. In the synchronous mode the sync pulse voltage is also used to charge the buffer capacitor. Therefore the buffer capacitor's charge is higher than in the asynchronous mode, where only the supply voltage is provided. The given formula is not considering the additional charge by the sync pulse, this formula is only valid for a direct current supply. The influence of the sync pulse charging the buffer capacitor depends on the sync pulse duration and voltage level, as well as the type of buffer capacitor used and the internal resistance of the capacitor. Therefore, a formula is not given. Manchester modulation is interrupted during the active micro break mode. The energy of the buffer capacitor is not spend for the Manchester modulation. As soon as VDD returns to normal operating conditions, the current modulator starts working immediately. If the ECU wants to force a reset of the sensor, the voltage on the supply pin must be hold below Vµb_min for a time longer than tµb. KP400 Technical product description Datasheet 29 Rev. 1.00 2025-01-31
4.3 Test modes
The device has two different test modes:
- The PSI5 test mode is the main customer interface to program the EEPROM during production.
- The SPI test mode is used by Infineon only. Entry into test mode is only possible during Phase 1. While being in test mode, no normal sensor operation is possible and the sensor will stop sending Δp/p0 data. KP400 Technical product description
Datasheet 30 Rev. 1.00 2025-01-31
5 Application information
5.1 Potential target applications
The device is used to detect the pressure change inside a door during a side crash and other similar applications.
5.2 Application circuit example
The capacitors C1 and C2 have to be placed as close to the device as possible. Any long distances may have an influence on the EMC performance. Cbuf is only necessary to prevent voltage loss during micro breaks. PDL GND KP40x GNDCAP C buf R 1 I_OUT VDD n.c. n.c. n.c. C 1C 2 R 2 n.c. VDDP NC SCLK SDIO Figure 17 Application circuit example The digital pins (VDDP , SCLK, SDIO) have an internal pull-up or pull-down resistor (Rpu, Rpd) and therefore normal operation must be with floating pins (in case of an open GND wire, the floating pins prevent from a cross grounding through the corresponding ESD diodes). The traces should be spaced sufficiently to avoid shorts between the serial interface and the high voltage pins of the device. To avoid overheating of the sensor, a maximum temperature difference from sensor-ambient to module-ambient of Trise_mod has to be ensured by the satellite design. Table 15 Application circuit components Component Value Unit Tolerance R1 47 Ω +/-5% R2 47 Ω +/-5% C1 15 nF +/-20% C2 2.2 nF +/-20% Cbuf see Table 5
5.3 Electro magnetic compatibility (EMC)
The device is characterized according to the EMC requirements described in the "Generic IC EMC Test Specification" [7]. System EMC performance on system level is dependent on the module design and the ECU implementation. The device is capable to pass the system tests according to the AK-LV - EMC specification [8] with the application circuit defined in Chapter 5.2. KP400 Technical product description Datasheet 31 Rev. 1.00 2025-01-31
6 Package information
For passivation the sensor die is covered with a transparent silicone gel. Bubbles adjacent to the bond wires are not allowed (delivery status). The bond wires will be completely covered by gel. The surface of the gel is smooth. The sensor package is compliant to RoHs.
6.1 Package outline
Figure 18 PG-DFN-8-1 package outline KP400 Technical product description Datasheet 32 Rev. 1.00 2025-01-31
6.2 Package footprint drawing
Figure 19 PG-DFN-8-1 package footprint drawing
6.3 Pick and place info
The following chapter gives information about the pick and place capability of the PG-DFN package. Detailed information can be found in an additional document including board assembly recommendations [12].
6.3.1 Component placement
Although the self-alignment effect due to the surface tension of the liquid solder will support the formation of reliable solder joints, the components have to be placed accurately according to their geometry. Manual positioning of the package is not recommended, but it is possible. For the PG-DFN package with a pad width of 0.3 mm and a pitch of 0.8 mm, an automatic pick-and-place machine is recommended to achieve reliable solder joints. The device is delivered in tape and reel packing which is suitable for being used in pick-and-place equipment. The pressure difference between the inside and the outside of the package should not exceed pdiff (see Table 3). KP400 Technical product description Datasheet 33 Rev. 1.00 2025-01-31
6.4 Identification code
The identification code for the device is on the same side of the package as pin 1. KP400 Figure 20 Identification code for KP400 KP400 Technical product description Datasheet 34 Rev. 1.00 2025-01-31
7 References
[1] PSI5 Specification, V1.3, 29.07.08 [2] PSI5 Specification, V2.1, 08.10.2012 [3] PSI5 Substandard Airbag, V2.1, 05.10.2012 [4] AK-LV 29, V1.4, 03/2011, "Standard AK-Pressure Sensors for Crash Detection" [5] AK-LV 38, V1.0, 13.02.2014, "Druckbasierter Aufprallsensor" [6] AK-LV 38 Addendum, Zusatzblatt_20161021_entwurf.pdf, Draft-Version 21.10.2016 [7] BISS, "Generic IC EMC Test Specification" , Version 1.0, July, 6th 2004 [8] AK-LV 27 / AK-LV 29, Part 3 "EMC Requirements" , V2.06, March, 9th 2011 [9] Siemens Norm SN 29500-2, Edition 2010-09, Siemens AG Munich [10] Declaration of Compliance to the RoHS Directive for Infineon "Green Products" , MatQ-2013-103-RoHS, Nov. 2013 [11] ISO 26262, Vehicles Functional Safety, Version 2018 [12] Recommendations for board assembly of Infineon pressure sensor packages for automotive applications, Revision 1.0, Infineon Technologies AG KP400 Technical product description Datasheet 35 Rev. 1.00 2025-01-31
8 Revision history
Revision number Date of release Description of changes 1.0 2025-01-31 • Initial release of technical product description extracted from the datasheet of KP400, Rev. 1.10 KP400 Technical product description Datasheet 36 Rev. 1.00 2025-01-31
All referenced product or service names and trademarks are the property of their respective owners. Edition 2025-01-31 Published by Infineon Technologies AG
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© 2025 Infineon Technologies AG All Rights Reserved. Do you have a question about any aspect of this document? Email: erratum@infineon.com Document reference IFX-iog1736493576633 Important notice The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. Warnings Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.