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DOT MATRIX LCD CONTROLLER &DRIVER The KK0066 is a dot matrix liquid crystal display controller & driver LSI that displays alphanumeric, characters and symbols. It drives dot matrix LCD under microcomputer control. All functions needed for dot matrix LCD drive are internally provided on one chip.
FEATURES
- Internal Memory - Character Generator ROM: 8320 bits - Character Generator RAM: 512 bit - Display Data RAM: 80 x 8 bits for 80 digits
- Internal automatic reset circuit at power ON
- Internal oscillation circuit
- Power Supply Voltage: +5V ± 10%
- LCD Driving Voltage for display: 0 ~ -5V(V5)
- Duty factor selection (selected by programs) 1/8 duty: 5 x 7 dots format 1 line, 1/11 duty: 5 x 10 dots format 1 line 1/16 duty: 5 x 7 dots format 2 line
- Bare chip available
- Pin-to-Pin replacement for KS0066, HD44780, SED1278 FUNCTION
- Character type dot matrix LCD driver & controller
- Internal driver: 16 common and 40 segment signal output
- Display character format: 5 x 7 dots + cursor, 5 x 10 dots + cursor
- Easy interface with a 4-bit or 8-bit MPU
- Display character pattern: 5 x 7 dots format: 192 kinds, 5 x 10 dots format: 32 kinds
- The special character pattern can be programmable by Character Generator RAM directly
- A customer character pattern can be programmable by mask option
- Wide range of instruction function: Display clear, Cursor home, Display ON/OFF, Display shift Cursor ON/OFF, Display character blink, Cursor shift ODERING INFORMATION Type CGROM KK0066 - 00 English Numberal Japanese KK0066 - 01 English Numberal Cyrillic KK0066 - XX Custom font (XX – ROM code) ABSOLUTE MAXIMUM RATINGS Characteristic Symbol Value Unit Power Supply Voltage VDD - 0.3 ~ 7.0 V Driver Supply Voltage V1 ~ V5 VDD - 13.5 ~ VDD + 0.3 V Input Voltage VI -0.3 ~VDD + 0.3 V Operating Temperature Ta - 20 ~ + 75 oC Storage Temperature Tstg - 55 ~ + 125 oC Notes: Must keep the relation of VDD ≥ V1 ≥ V2 ≥ V3 ≥ V4 ≥ V5
E RS R/ W DB ~DB03 DB ~DB47 5 5 16 16 40 - bit Shift Register 40 - bit Latch Circuit Segment Sign al Dr iver 40 40 40 CLK1 CLK2 M COM1 to COM16 SEG1 to SEG40
ELECTRICAL CHARACTERISTICS
(Ta = 25oC, VDD = +5V, VSS = 0V unless otherwise specified) Characteristic Symbo l Test Condition Applicable Terminals Min Typ Max Uni t Operating Voltage VDD 4.5 5.5 V Operating Current (*1) IDD Internal oscillation or external clock fOSC = 270KHz 0.35 0.6 HIGH Input Voltage VIH E, DB0 ~ DB7, R/W, RS
2.2 VDD V
OSC1 VDD-1.0 VDD LOW Input Voltage VIL E, DB0 ~ DB7, R/W, RS -0.3 0.6 V OSC1 -0.2 1.0 HIGH Output Voltage VOH IOH = -0.205 mA DB0 ~ DB7 2.4 V IOH = -40µA CLK1, CLK2, M, D 0.9VDD LOW Output Voltage VOL IOL = 1.2mA DB0 ~ DB7 0.4 V IOL = 40µA CLK1, CLK2, M, D 0.1VD D Driver Voltage Descending VCOM IO = ± 0.1mA COM1 ~ COM16 1.0 V VSEG SEG1 ~ SEG40 1.0 Input Leakage Current ILKG VIN =0V ~ VDD E -1 1 µA Input LOW Current IIL VCC = 5V (test pull up R) RS, R/W, DB0 ~ DB7 -50 -125 -250 µA Freque ncy(*1) fEC 125 250 350 KH z External Duty DUTY OSC1 46 50 55 % Clock Rise time tR 0.2 µs Fall time tF 0.2 µs Internal Clock Frequency(*1) fOSC1 Rf = 91KΩ ± 2% OSC1, OSC2 190 270 350 KH z Ceramic Resonator Oscillation Frequency (*1) fOSC2 245 250 255 LCD Driving Voltage (*2) VLCD1 VDD – V5 1/5 bias V1 ~ V5 4.6 10.0 V VLCD2 1/4 bias 3.0 10.0
Notes: *1). Oscillation circuit Resistor circuit External clock circuit *2). Input the voltage listed in table below to V1 ~ V5 Duty 1/8, 1/11 1/16 Bias Power supply 1/4 1/5 OSC1 Rf Rf: 91k +2%Ω OSC2 OSC1 OSC2 openFrequency input V1 VDD – VLCD/4 VDD – VLCD/5 V2 VDD – VLCD/2 VDD – 2VLCD/5 V3 VDD – VLCD/2 VDD – 3VLCD/5 V4 VDD – 3VLCD/4 VDD – 4VLCD/5 V5 VDD – VLCD VDD – VLCD *VLCD is the LCD driving voltage, refer to the initial set of the instruction code. AC CHARACTERISTICS (VDD = 5V, VSS = 0V, Ta = 25oC) (1) Write mode (Writing data from MPU to KK0066) Characteristic Symbol Test pin Min Typ Max Unit E Cycle Time tC E 500 ns E Rise Time tR E 25 ns E Fall Time tF E 25 ns E Pulse Width (High, Low) tW E 220 ns R/W and RS Set-up Time tSU1 R/W, RS 40 ns R/W and RS Hold Time tH1 R/W, RS 10 ns Data Set-up Time tSU2 DB0 ~ DB7 60 ns Data Hold Time tH2 DB0 ~ DB7 10 ns RS R/ W E DB ~ DB07 VIH1 VIH1 VIH1VIH1 VIL 1 VIL 1 VIL 1 VIL 1 VIL 1VIL 1 VIL 1 tSU1 tSU2 tW tH1 tH1 tH2tR tC Valid Data
(2) Read mode (Reading data from KK0066 to MPU) Characteristic Symbol Test pin Min Typ Max Unit E Cycle Time tC E 500 ns E Rise Time tR E 25 ns E Fall Time tF E 25 ns E Pulse Width (High, Low) tW E 220 ns R/W and RS Set-up Time tSU1 R/W, RS 40 ns R/W and RS Hold Time tH1 R/W, RS 10 ns Data Output Delay Time tD DB0 ~ DB7 120 ns Data Hold Time tH2 DB0 ~ DB7 20 ns (3) Interface mode with IZ0065 Characteristic Symbol Test pin Min Typ Max Unit Clock Pulse Width High tWCKH CLK 800 ns Clock Pulse Width Low tWCKL CLK 800 ns Data Set-up Time tSU D 300 ns Data Hold Time tDH D 300 ns Clock Set-up Time tCSU CLK 500 ns M Delay Time tDM M -1000 1000 ns CLK1 CLK2 D M 0.9VDD 0.9VDD 0.9VDD 0.9VDD 0.1VDD 0.1VDD 0.1VDD0.1VDD 0.1VDD 0.9VDD 0.9VDD0.9VDD tSU tDM tDM tWCK1tCSU tCSU tWCKH tWCKH
Name DESCRIPTION INTERFACE VDD Operating Voltage For logical circuit (+5V ± 10%) Power VSS Power 0V(GND) Supply V1 – V5 Negative Supply Voltage Bias voltage level for LCD driving SEG1– SEG40 Output Segment output Segment signal output for LCD driving LCD COM1– COM16 Output Common output Common signal output for LCD driving LCD OSC1 OSC2 Input Output Oscillator Both pin connected to Rf resistor or ceramic resonator for internal oscillator circuit. In case of external frequency use only, the frequency is input to OSC1 terminal. Resistor or Ceramic Resonator CLK1 Data latch clock Clock output terminal for the serially transferred data to be latched to the driver. CLK2 Output Data shift clock Clock output terminal used when D terminal data output shifts the inside of the driver. IZ0065 M Alternated signal for LCD driver output The alternating signal to convert LCD drive waveform to AC. Character pattern data, which is corresponding to each common signal, is supplied to driver serially. High Selection Low Non selection D Display data interface E Input Enable Start anable signal to read or write the data MPU R/W signal input is used to select the read/write mode High Read mode Low Write mode R/W Read/Write Register selection input High Data register (for read and write) Low Instruction register (for write), Busy flag, address counter (for read) RS Register select DB0 – DB7 Input/O utput Data interface Used for data transfer between the MPU and KK0066. These terminals are for data bus with bidirectional three-state. Initial 4 bit (DB0-DB3) are not used during 4 bit operation (DB7 can be used as a busy flag)
CONTROL AND DISPLAY COMMANDS Command RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Executi on time (fOSC=2 50KHz) Remark DISPLAY CLEAR L L L L L L L L L H 1.64 ms RETURN HOME L L L L L L L L H X 1.64 ms Cursor move to first digit ENTRY MODE SET L L L L L L L H I/D SH 40µs *I/D: set cursor move direction *SH: Specifies shift of display DISPLAY ON/OFF L L L L L L H D C B 40µs *Display *Cursor *Blinking SHIFT L L L L L H S/C R/L X X 40µs SH H Display is shifted L Display is not shifted I/D H Increase L Decrease D H Display on L Display off C H Cursor on L Cursor off B H Blinking on L Blinking off SC H Display shift L Cursor move R/L H Right shift L Left shift
Command RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Executi on time (fOSC=2 50KHz) Remark SET FUNCTIO N L L L L H DL N F X X 40µs SET CG RAM ADDRESS L L L H CG RAM address (corresponds to cursor address) 40µs CG RAM Data is sent and received after this setting SET DD RAM ADDRESS L L H DD RAM address 40µs DD RAM Data is sent and received after this setting READ BUSY FLAG & ADDRESS L H BF Address Counter used for Both DD & CG RAM address 0µs -Reads BF indication internal operating is being performed. -Reads address counter contents WRITE DATA H L Write Data 46µs Write data DD or CG RAM READ DATA H H Read Data 46µs Read data from DD or CG RAM N H 2 line display L 1 line display F H 5x10 dots L 5x7 dots BF H Busy L Ready DL H 8 bits interface L 4 bits interface Note: X – Don’t care.
V ( 1/5 bias)LCD LCD Panel COM1~COM16SEG1~SEG40 D OSC1 OSC2 VSS M CLK1 CLK2 VDD V5 DB ~ DB 07 SC ~ SC 140SC ~ SC 140SC ~ SC 140 DL2 DR1 DR2 CL1 CL2 M DL2 DR1 DR2 CL1 CL2 M DL2 DR1 DR2 CL1 CL2 M VEE V1 V2 V3 V4 V5 V6VEE V1 V2 V3 V4 V5 V6VEE V1 V2 V3 V4 V5 V6 VDD VSS SHL2 SHL1 FCS DL1 VDD VSS SHL2 SHL1 FCS DL1 VDD VSS SHL2 SHL1 FCS DL1 IZ0065IZ0065IZ0065 VDD GND or other voltage To MPU When IZ0065 is externally connected to the KK0066, you can increase the number of display digits up to 80 characters.
(0,0) KK0066 P AD DIAGR AM Chip size : 4000 x 4900 Pad size : 120 x 120 Unit : mµ The chip substrate is connected to VDD. PAD LOCATION Pad No. Pad Name X Y Pad No. Pad Name X Y Pad No. Pad Name X Y