KBD42W11 SMSC | Alldatasheet
Document overview
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Technical content
FEATURES
- Supports IBM PC and Compatible System Designs
- Runs Much Faster Than Traditional Keyboard Controllers
- Host interface Compatible with Traditional Keyboard Controller
- 6 MHz – 12 MHz Operating Frequency
- Communicates with Keyboard Directly
- High-reliability CMOS Technology
- 40 Pin DIP and 44 Pin PLCC Package GENERAL DESCRIPTION The KBD42W11 keyboard controller is programmed to support the IBM® compatible personal computer keyboard serial interface. The keyboard controller receives serial data from the keyboard, checks the parity of the data, translates the scan code, and presents the data to the system as a byte of data in its output buffer. The controller will interrupt the system when data is placed in its output buffer. The byte of data will be sent to the keyboard serially with an odd parity bit automatically inserted. The keyboard is required to acknowledge all data transmissions. No transmission should be sent to the keyboard until acknowledgment is received for the previous byte sent. The KBD42W11 keyboard controller and BIOS to improve the performance of IBM PC machines and their compatibles. A hardwire methodology is used in this keyboard controller instead of a software implementation, as in the traditional 8042 keyboard BIOS. This enables the keyboard controller to respond instantly to all commands sent from the keyboard to the CPU BIOS. The KBD42W11 enables popular programs such as AutoCAD ® , Microsoft ® Windows™, NOVELL ® , and other programs to run much faster. IBM is a registered trademark of International Business Machines Corporation. AutoCAD is a registered trademark of Autodesk, Inc. Microsoft is a registered trademark and Windows is a trademark of Microsoft Corporation. NOVELL is a registered trademark of Novell, Inc. Standard Microsystems is a registered trademark and SMSC is a trademark of Standard Microsystems Corporation. Other product and company names are trademarks or registered trademarks of their respective holders.
80 Arkay Drive
Hauppauge, NY 11788 (516) 435-6000 FAX (516) 273-3123
V DD P27(KDAT) P26(KCLK) P25(IEMP) P24(INIT) P17(KINH) P16(DISP) P15(JUMP) P14(RAM) P13 P12 P11 P10 NC V DD P23 P22 P21(nGA20) P20(nRC)
40 Pin DIP
44 Pin PLCC
PIN NO. (40 P in DIP) PIN NO. (44 P in PLCC) I/O NAME FUNCTION 1 2 I T0 K/B Clock Input 2 3 I XIN Crystal Clock I/P 3 4 O XOUT Crystal Clock O/P 4 5 I nRESET Chip Reset 5 6 - VDD Optional +5V Power Supply 6 7 I nCS Chip Select 7 8 - VSS Optional Ground Power 8 9 I nRD I/O Read 9 10 I A2 Connect to Address A2 10 11 I nWR I/O Write 11,26 1,12,13,23,29, 34 - NC Reserved 12,13,14, 15,16,17, 18, 19 14,15,16,17,18, 19,20,21 I/O D0-D7 Data Bus D0 - D7 20 22 - VSS Ground Power Supply 21 24 O P20 Bit 0 of Port 2 (RCB: System Reset) 22 25 O P21 Bit 1 of Port 2 (GA20: GATE A20) 23 26 I/O P22 Bit 2 of Port 2 24 27 I/O P23 Bit 3 of Port 2 25 28 - VDD Optional +5V Power Supply 27 30 I/O P10 Bit 0 of Port 1 28 31 I/O P11 Bit 1 of Port 1 29 32 I/O P12 Bit 2 of Port 1 30 33 I/O P13 Bit 3 of Port 1 31 35 I P14 Bit 4 of Port 1 (RAM Jumper Select) 32 36 I P15 Bit 5 of Port 1 (JUMP) 33 37 I P16 Bit 6 of Port 1 (Display Select) 34 38 I P17 Bit 7 of Port 1 (K/B Inhibit Switch) 35 39 O P24 Bit 4 of Port 2 (OBF O/P Interrupt) 36 40 O P25 Bit 5 of Port 2 (I/P Buffer Empty) 37 41 O P26 Bit 6 of Port 2 (K/B Clock O/P) 38 42 O P27 Bit 7 of Port 2 (K/B Data O/P) 39 43 I T1 K/B Data Input 40 44 - VDD +5V Power Supply
P 1 4 (RAM Select) P 1 5 (Manufacture Mode) P 1 6 (Display) P 1 7 (KBNH) P 2 0 (nRC) P 2 1 (Gate A20) P 2 2 P 2 3 P 2 4 P 2 5 P 2 6 (Keyboard Clock) P 2 7 CONTROL & BUFFER REGISTER BUFFER REGISTER OUTPUT BUFFER REGISTER W60 W64 R60 INPUT & OUTPUT PORT INTERFACE OUTPUT (Keyboard Data) CONTROL TRANSMIT TRANSMIT REGISTER
NO. DESCRIPTION MIN. MAX. UNIT T1 Address Setup Time from nWR 0 nS T2 Address Setup Time from nRD 0 nS T3 nWR Strobe Width 20 nS T4 nRD Strobe Width 20 nS T5 Address Hold Time from nWR 0 nS T6 Address Hold Time from nRD 0 nS T7 Data Setup Time 50 nS T8 Data Hold Time 0 nS T9 Gate Delay Time from nWR 10 nS T10 nRD to Drive Data Delay 20 nS T11 nRD to Floating Data Delay 0 20 nS T12 Data Valid After Clock Falling (SEND) 4 µS T13 K/B Clock Period 20 µS T14 K/B Clock Pulse Width 10 µS T15 Data Valid Before Clock Falling (RECEIVE) 4 µS T16 K/B ACK After Finish Receiving 20 µS T17 nRC Fast Reset Pulse Delay (8 MHz) 2 3 µS T18 nRC Pulse Width (8 MHz) 6 µS T19 Transmit Timeout 2 mS T20 Data Valid Hold Time 0 µS T21 XIN/XOUT Period ( 6-12 MHz ) 83 167 nS
A2, nCS nWR ACTIVE T3 T5 T7 T8 DATA IN D0 - D7 A20 OUTPUT PORT FAST RESET PULS nRC FE COMMAND T17 T18 A2, nCS AEN nRD T10 ACTIVE T4 T6 T11 DATA OUTD0 - D7
( KCLK ) ( KDAT ) T14 T13 D0 D1 D2 D3 D4 D5 D6 D7 P STOP T16 T19 Receive Data from K/B START CLOCK ( KCLK ) T15 T14 T13 D0 D1 D2 D3 D4 D5 D6 D7 P STOP T20 SERIAL DATA ( T1 ) XIN/XOUT Clock XIN CLK T21
Ambient Operating Temperature -0 to +85 °C Storage Temperature -65 to +150 °C Supply Voltage to Ground Potential -0.3 to +7.0 V Applied Input/Output Voltage -0.3 to +7.0 V Power Dissipation 50 mW Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device. ELECTRICAL CHARACTERISTICS & CAPACITANCE ( Ta = 0 ° C to +70 ° C, VDD = +5V ±5%) SYMBOL DESCRIPTION MIN. TYP. MAX. UNIT VDD Power Supply 4.75 5.0 5.25 V T A Operating Temperature 0 25 70 V VIH High Level Voltage for TTL Min. I/P
2.0 VDD V
VIL Low Level Voltage for TTL Max. I/P -0.3 0.8 V VOH High Level Voltage for TTL Min. O/P VDD-0.5 V VOL Low Level Voltage for TTL Max. O/P 0.5 V R IP Min. I/P Resist 10K Ω ILI I/P Leakage Current -10 10 µA ILO O/P Leakage Current -10 10 µA IOL O/P Sink Current 4 mA CL O/P Load Capacity 15 50 pF
The status register is an 8-bit read-only register at I/O address hex 64 that holds information about the state of the keyboard controller and interface. It may be read at any time. BIT BIT DESCRIPTION FUNCTION
0 Output Buffer Full 0: Output Buffer Empty
1: Output Buffer Full
1 Input Buffer Full 0: Input Buffer Empty
1: Input Buffer Full
2 System Flag This bit may be set to 0 or 1 by writing to the system flag bit in
the command byte of the keyboard controller. It is set to 0 after a power-on reset
3 Command/data 0: Data Byte
1: Command Byte
4 Inhibit Switch 0: Keyboard is Inhibited
1: Keyboard is Not Inhibited
5 Transmit Time Out 0: No Transmit Time Out Error
1: Transmit Time Out Error
6 Receive Time Out 0: No Receive Time Out Error
1: Receive Time Out Error
7 Parity Error 0: Odd Parity (No Error)
1: Even Parity (Error) OUTPUT BUFFER The output buffer is an 8-bit read-only register at I/O address hex 60. The keyboard controller uses the output buffer to send the scan code received from the keyboard and data bytes required by command to the system. The output buffer should be read only when the output buffer full bit in the register is 1. INPUT BUFFER The input buffer is an 8-bit write-only register at I/O address hex 60 or 64. Writing to address hex 60 sets a flag that indicates a data write; writing to address hex 64 sets a flag that indicates a command write. Data written to I/O address hex 60 are sent to the keyboard (unless the keyboard controller is expecting a data byte) following the controller's input buffer only if the input buffer full bit in the status register is set to 0. I/O PORTS The keyboard controller has two 8-bit I/O ports and two test inputs. One of the ports is assigned for input and the other for output. The controller uses the test inputs to read the state of the keyboard's clock line and data line.
The following figures show bit definitions for the input, output, and test-input ports. (A) Input Port Definitions BIT FUNCTION
0 Undefined
1 Undefined
2 Undefined
3 Undefined
4 RAM on System Board
0: Disable 2nd 256 KB of System Board RAM 1: Enable 2nd 256 KB of System Board RAM
5 Manufacturing Jumper Installed
0: Manufacturing Jumper 1: Jumper Not Installed
6 Display Type Switch
0: Primary Display Attached to Color/graphics 0: Primary Display Attached to Monochrome
7 Keyboard Inhibit Switch
0: Keyboard Inhibited 1: Keyboard Not Inhibited (B) Output Port Definitions BIT FUNCTION
0 System Reset
1 Gate A20
4 Output Buffer Full
5 Input Buffer Empty
6 Keyboard Clock (Output)
7 Keyboard Data (Output)
(C) Test-Input Definitions BIT FUNCTION
0 Keyboard Clock (Input)
1 Keyboard Data (Input)
COMMANDS (I/O ADDRESS HEX 64) COMMAND FUNCTION
20 Read Command Byte of Keyboard Controller
60 Write Command Byte of Keyboard Controller
7 Reserved
6 IBM PC Compatible Mode
5 IBM PC Mode
4 Disable Keyboard
3 Inhibit Override
2 System Flag
1 Reserved
0 Enable Output Buffer Full Interrupt
00 No Error Detected
01 K/B Clock Line is Stuck Low
02 K/B Clock Line is Stuck High
03 K/B Data Line is Stuck Low
04 K/B Data Line is Stuck High
AD Disable Keyboard Feature AE Enable Keyboard Interface C0 Read Input Port D0 Read Output Port D1 Write Output Port E0 Read Test Inputs F0-FF Pulse Output Port
V P10 P11 28 P12 29 P13 30 P14 31 P15 32 P16 33 P17 34 P20 21 P21 P22 P23 24 P24/OB P25/nBF P26/KCLK P27/KDAT NC RESETB SA2 DISPLAY TYPE SWITCH RAM SELECT JUMPER MANUFACTURING MODE JUMPER KEYBOARD INHIBIT SWITCH KEYBOARD INTERRUPT RCB GATE A20 KEYBOARD CLOCK KEYBOARD DATA IOWB IORB D0 - D7 1 2 U?A 74ALS04 1 2 U?A 7407 KEYBOARD CLOCK KEYBOARD DATA VCC 3 4 U?B 7407 V SS DD V DD V D D
V 1 2 U?A 74ALS04 1 2 U?A 7407 3 4 U?B 7407 V DD DD
40 Pin PDIP
- Dimensions D Max & S include mold flash or tie bar burrs. 2. Dimension E1 does not include interlead flash. 3. Dimensions D & E1 include mold mismatch and are determined at the mold parting line. 6. General appearance spec. should be based on final visual inspection spec. 1.371.220.0540.048 Notes: Symbol Dimension in inch Dimension in mm A B c D e A L S A A E 0.050 1.27 0.210 5.33 0.010 0.150 0.016 0.155 0.018 0.160 0.022 3.81 0.41 0.25 3.94 0.46 4.06 0.56 0.008 0.120 0.670 0.010 0.130 0.014 0.140 0.20 3.05 0.25 3.30 0.36 3.56 17.02 B 1 e E 1 a 2.055 2.070 52.20 52.58 0 15 0.090 2.29 0.6500.630 16.00 16.51 protrusion/intrusion. 4. Dimension B1 does not include dambar 5. Controlling dimension: Inches. 150 Seating Plane e A A a c E Base Plane1 A L A S E D B 40 21 201
L c A H D D e b E H E y A A Seating Plane DG G E Notes: Symbol Dimension in inch Dimension in mm A b c D e H E L y A A E b 1 H D G G D E on final visual inspection spec. 4. General appearance spec. should be based 3. Controlling dimension: Inches protrusion/intrusion 2. Dimension b1 does not include dambar flash. 1. Dimensions D & E do not include interlead 0.020 0.145 0.026 0.016 0.008 0.648 0.590 0.680 0.090 0.150 0.028 0.018 0.010 0.653 0.610 0.690 0.100
0.050 BSC
0.185 0.155 0.032 0.022 0.014 0.658 0.630 0.700 0.110 0.004 0.51 3.68 0.66 0.41 0.20 16.46 14.99 17.27 2.29 3.81 0.71 0.46 0.25 16.59 15.49 17.53 2.54 1.27 4.70 3.94 0.81 0.56 0.36 16.71 16.00 17.78 2.79 0.10 BSC
© 1998 STANDARD MICROSYSTEMS CORPORATION (SMSC) Circuit diagrams utilizing SMSC products are included as a means of illustrating typical applications; consequently complete information sufficient for construction purposes is not necessarily given. The information has been carefully checked and is believed to be entirely reliable. However, no responsibility is assumed for inaccuracies. Furthermore, such information does not convey to the purchaser of the semiconduc tor devices described any licenses under the patent rights of SMSC or others. SMSC reserves the right to make changes at any time in order to improve design and supply the best product possible. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. KBD42W11 Rev. 10/20/98