K80E07NE

TK80E07NE TOSHIBA | Alldatasheet

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TOSHIBA Field Effect Transistor Silicon N Channel MOS Type (U −MOSᶞ-H) TK80E07NE „ E-Bike/UPS/Inverter Note : This product is designed for E-Bike / UPS / Inverter in China / India market. z Low drain−source on-resistance : R DS(ON) = 6.9 mΩ (typ.) z Low leakage current : I DSS = 10 µA (max) (VDS = 70 V) z Enhancement mode : V th = 2.0~4.0 V (VDS = 10 V, ID = 0.3 mA) Absolute Maximum Ratings (Ta = 25°C) Characteristics Symbol Rating Unit Drain−source voltage V DSS 70 V Drain−gate voltage (RGS = 20 kΩ) V DGR 70 V Gate−source voltage V GSS ±20 V DC (Note 1) I D 80 A DC (Note 1,4) I D 58 A Drain current Pulse (Note 1) I DP 240 A Drain power dissipation (Tc = 25°C) P D 87 W Single pulse avalanche energy (Note 2) EAS 16.4 mJ Avalanche current I AR 40 A Repetitive avalanche energy (Note 3) E AR 8.7 mJ Peak diode recovery dv/dt (Note 5) dv/dt 11.5 V/ns Channel temperature (Note 4) T ch 175 °C Storage temperature range (Note 4) T stg −55~175 °C Thermal Characteristics Characteristics Symbol Max Unit Thermal resistance, channel to case R th(ch−c) 1.72 °C/W Thermal resistance, channel to ambient Rth(ch−a) 83.3 °C/W Note 1: Ensure that the channel temperature does not exceed 175°C. Note 2: VDD = 25 V, Tch = 25°C (initial), L =14.9µH, RG = 25 Ω, IAR = 40A Note 3: Repetitive rating: pulse width limited by maximum channel temperature Note 4: Tc = 100°C Note 5: I DRʽ80 A,di/dtʽ160 A/µs, TchʽTch max., VDS peak VDSS This transistor is an electrostatic-sensitive device. Please handle with caution. Note :Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decr ease in the reliability significantly even if the operating conditions (i.e . operating temperature/current/volta ge, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc).Thermal Characteristics JEDEC TO-220AB JEITA SC-46 TOSHIBA - Weight: 1.9 g (typ.) Unit: mm (BUF %SBJO 4PVSDF Weight: 1.93g (typ) JEDEC TO-220AB JEITA SC-46 TOSHIBA - Unit: mm Weight: 1.9 g (typ.) (BUF %SBJO 4PVSDF

Electrical Characteristics (Ta = 25°C) Characteristics Symbol Test Condition Min Typ. Max Unit Gate leakage current I GSS V GS = ±20 V, VDS = 0 V — — ±1 µA Drain cut−off current I DSS V DS = 70 V, VGS = 0 V — — 10 µA V (BR) DSS I D = 10 mA, VGS = 0 V 70 — — V Drain−source breakdown voltage V (BR) DSX I D = 10 mA, VGS = -20 V (Note 5) 45 — — V Gate threshold voltage V th V DS = 10 V, ID = 0.3 mA 2.0 — 4.0 V Drain−source ON resistance R DS (ON) V GS = 10 V, ID = 40 A — 6.9 8.5 m Ω Input capacitance C iss — 2270 — Reverse transfer capacitance C rss — 230 — Output capacitance C oss VDS = 10 V, VGS = 0 V, f = 1 MHz — 1390 — pF Rise time t r — 12 — Turn−on time t on — 31 — Fall time t f — 17 — Switching time Turn−off time t off — 47 — ns Total gate charge (Gate−source plus gate−drain) Qg — 42 — Gate−source charge Q gs — 28 — Gate−drain (“miller”) charge Q gd VDD ≈ 56 V, VGS = 10 V, ID = 80 A — 14 — nC Source−Drain Ratings and Characteristics (Ta = 25°C) Characteristics Symbol Test Condition Min Typ. Max Unit Continuous drain reverse current (Note 1) IDR — — — 80 A Pulse drain reverse current (Note 1) IDRP — — — 240 A Forward voltage (diode) V DSF I DR = 80 A, VGS = 0 V — — −1.5 V Reverse recovery time (Note 6) t rr — 60 — ns Reverse recovery charge(Note 6) Q rr IDR = 80 A, VGS = 0 V dIDR/dt = 50 A/µs — 45 — nC Marking Lot No. K80E07NE Part No. (or abbreviation code) Note 5: If a reverse bias is applied between gate and source, this device enters V(BR)DSX mode. Note that the drain-source breakdown voltage is lowered in this mode. Note 6: Ensure that V DS peak does not exceed VDSS. 0 V 10 V VGS VDD ≈ 35 V ID = 40 A VOUT 4.7 Ω Duty ≤ 1%, tw = 10 µs 0.875 Ω

VGS = 10 V 1 10 1000 100 100 ID = 80 A VGS = 4 V 5.5 VGS = 4 V 5.5 4 10 120 0 2 8 Ta = −55°C 100 100 46 8 1 0 100 200 250 0.4 0.6 0.8 10 0.2 150 140 8 12 16 20 0.4 0.6 0.8 1.4 0.2 Drain-source voltage V DS (V) Gate-source voltage V GS (V) VDS – VGS Common source Ta = 25°C Pulse test Drain current I D (A) RDS(ON) – ID Drain-source on-resistance RDS(ON) (m Ω) Common source Ta = 25°C Pulse test Drain-source voltage V DS (V) ID – VDS Drain current I D (A) Common source Ta = 25°C Pulse test Drain-source voltage V DS (V) ID – VDS Drain current I D (A) Common source Ta = 25°C Pulse test Gate-source voltage V GS (V) ID – VGS Drain current I D (A) Common source VDS = 10 V Pulse test 1.2

ID = 80 A VDS 100 0 50 200 150 100 10000 1000 1 0.1 100 10 Ciss Coss Crss 100 VDD ≈ 56 V VGS 0 0 0 30 50 40 10 20 0 −0.8 1000 100 VGS = 0 V −100 0 50 100 150 −50 200 −1.6 −100 0 50 100 150 −50 200 Power dissipation P D (W) Case temperature T c ( ° C ) PD − Tc Drain-source voltage V DS (V) IDR – VDS Reverse drain current I DR (A) Common source Ta = 25°C Pulse test Drain-source voltage V DS (V) Capacitance – VDS Capacitance C (pF) Common source VGS = 0 V f = 1 MHz Ta = 25°C Gate threshold voltage V th (V) Ambient temperature T a ( ° C ) Vth – Ta Common source VDS = 10 V ID = 1 mA Pulse test Gate-source voltage V GS ( V ) Dynamic input/output characteristics Total gate charge Q g ( n C ) Drain-source voltage V DS (V) Common source ID = 80 A Ta = 25°C Pulse test RDS(ON) – Ta Drain-source on-resistance RDS(ON) (m Ω) Ambient temperature T a ( ° C ) Common source VGS = 10 V Pulse test 40, 20 A −0.4 −1.2

0.02 0.2 0.1 0.05 0.01 10 µ 100 m 100 µ 10 m 0.1 1 m 1 10 Duty = 0.5 0.01 T PDM t Duty = t/T Rth(ch-c) = 1.72°C/W VDSS max 1 ms* 10 ms* 10 µs* 100 µs* Safe operating area 1000 100 0.01 Drain-source voltage V DS (V) Drain current I D (A) * Single pulse T c = 25°C Curves must be derated linearly with increase in temperature. 0.1 This area is limited by RDS(ON) ID max (pulse)* ID max (continuous) DC operation Tc = 25°C 25 100 0.1 10 100 1 rth − tw Pulse width t w (s) Normalized transient thermal impedance rth/Rth(ch-c) Single Pulse EAS – Tch Channel temperature (initial) T ch ( ° C ) Avalanche energy E AS (mJ) Test circuit Waveform IAR BVDSS VDD V DS 0 V 15 V RG = 25 Ω VDD = 25 V, L = 14.9 µH BVDSS BVDSS − VDD EAS = ɾ LɾI2 ARɾ 1

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