LM139JAN NSC | Alldatasheet
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Technical content
Features
n Wide supply voltage range 5V to 36 VDC or ±2.5V to ±18 VDC n Very low supply current drain (0.8 mA) — independent of supply voltage n Low input biasing current: 25 nA n Low input offset current: ±5 nA n Offset voltage: ±3 mV n Input common-mode voltage range includes GND n Differential input voltage range equal to the power supply voltage n Low output saturation voltage: 250 mV at 4 mA n Output voltage compatible with TTL, DTL, ECL, MOS and CMOS logic systems Advantages n High precision comparators n Reduced VOS drift over temperature n Eliminates need for dual supplies n Allows sensing near GND n Compatible with all forms of logic n Power drain suitable for battery operation
Ordering Information
LM139JAN Low Power Low Offset Voltage Quad Comparators © 2005 National Semiconductor Corporation DS201295 www.national.com
See NS Package Number W14B, WG14A LM139JAN www.national.com
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Absolute Maximum Ratings (Note 1) Supply Voltage, V+
36 VDC or ±18 VDC
Differential Input Voltage (Note 7)
36 VDC
−0.3 VDC to +36 VDC Input Current (VIN < −0.3 VDC) (Note 3) 50 mA Power Dissipation (Notes 4, 12) CERDIP 400 mW @ TA = 125˚C CERPACK 350 mW @ TA = 125˚C SOIC 350 mW @ TA = 125˚C Output Short-Circuit to GND, (Note 2) Continuous Storage Temperature Range Maximum Junction Temperature (TJ) +175˚C Lead Temperature (Soldering, 10 seconds) 260˚C Operating Temperature Range Thermal Resistance θJA CERDIP (Still Air) 103˚C/W CERDIP (500LF / Min Air flow) 65˚C/W CERPACK (Still Air) 183˚C/W CERPACK (500LF / Min Air flow) 120˚C/W SOIC (Still Air) 183˚C/W SOIC (500LF / Min Air flow) 120˚C/W θJC CERDIP 23˚C/W CERPACK 23˚C/W SOIC 23˚C/W Package Weight (typical) CERDIP 2,190mg CERPACK 460mg SOIC 410mg ESD rating (Note 11) 600V Quality Conformance Inspection Mil-Std-883, Method 5005 — Group A Subgroup
Description
Temp (˚C) Static tests at Static tests at 125 Static tests at -55 Dynamic tests at Dynamic tests at 125 Dynamic tests at -55 Functional tests at Functional tests at 125 Functional tests at -55 Switching tests at Switching tests at 125 Switching tests at -55 LM139JAN www.national.com
The following conditions apply, unless otherwise specified. −VCC = 0V Symbol Parameters Conditions Notes Min Max Unit Sub- groups VIO Input Offset Voltage +VCC = 30V, VO = 15V -5.0 5.0 mV -7.0 7.0 mV 2, 3 +VCC = 2V, -VCC = -28V, VO = -13V -5.0 5.0 mV -7.0 7.0 mV 2, 3 +VCC = 5V, VO = 1.4V -5.0 5.0 mV -7.0 7.0 mV 2, 3 +VCC = 2V, -VCC = -3V, VO = -1.6V -5.0 5.0 mV -7.0 7.0 mV 2, 3 IIO Input Offset Current +VCC = 30V, RS = 20KΩ, VO = 15V (Note 8) -25 nA 1, 2 (Note 8) -75 nA +VCC = 2V, -VCC = -28V, RS = 20KΩ, VO = -13V (Note 8) -25 nA 1, 2 (Note 8) -75 nA +VCC = 5V, RS = 20KΩ, VO = 1.4V (Note 8) -25 nA 1, 2 (Note 8) -75 nA +VCC = 2V, -VCC = -3V, RS = 20KΩ, VO = -1.6V (Note 8) -25 nA 1, 2 (Note 8) -75 nA +/-IIB Input Bias Current +VCC = 30V, RS = 20KΩ, VO = 15V (Note 8) -100 +0.1 nA 1, 2 (Note 8) -200 +0.1 nA +VCC = 2V, -VCC = -28V, RS = 20KΩ, VO = -13V (Note 8) -100 +0.1 nA 1, 2 (Note 8) -200 +0.1 nA +VCC = 5V, RS = 20KΩ, VO = 1.4V (Note 8) -100 +0.1 nA 1, 2 (Note 8) -200 +0.1 nA +VCC = 2V, -VCC = -3V, RS = 20KΩ, VO = -1.6V (Note 8) -100 +0.1 nA 1, 2 (Note 8) -200 +0.1 nA CMRR Input Voltage Common Mode Rejection +VCC = 30V dB 1, 2, 3 +VCC = 5V dB 1, 2, 3 ICEX Output Leakage +VCC = 30V, VO = +30V 1.0 µA 1, 2, 3 +IIL Input Leakage Current +VCC = 36V, V + i = 34V, V −i = 0V -500 500 nA 1, 2, 3 -IIL Input Leakage Current +VCC = 36V, V + i = 0V, V −i = 34V -500 500 nA 1, 2, 3 VOL Logical "0" Output Voltage +VCC = 4.5V, IO = 4mA 0.4 V 0.7 V 2, 3 +VCC = 4.5V, IO = 8mA 1.5 V 2.0 V 2, 3 ICC Power Supply Current +VCC = 5V, VID = 15mV 2.0 mA 1, 2 3.0 mA +VCC = 30V, VID = 15mV 3.0 mA 1, 2 4.0 mA Delta VIO / Delta T Temperature Coefficient of Input Offset Voltage 25˚C ≤TA ≤125˚C (Note 9) -25 µV/˚C -55˚C ≤TA ≤25˚C (Note 9) -25 µV/˚C Delta IIO / Delta T Temperature Coefficient of Input Offset Current 25˚C ≤TA ≤125˚C (Note 9) -300 300 pA/˚C -55˚C ≤TA ≤25˚C (Note 9) -400 400 pA/˚C AVS Open Loop Voltage Gain +VCC=15V, RL=15KΩ, 1V ≤VO ≤11V (Note 10) V/mV (Note 10) V/mV 5, 6 VIO Tempco Screen 4.0 mV LM139JAN www.national.com
(Continued) DC Parameters (Continued) The following conditions apply, unless otherwise specified. −VCC = 0V Symbol Parameters Conditions Notes Min Max Unit Sub- groups CMRR Tempco Screen dB IIO Tempco Screen nA IIB Tempco Screen nA AC Parameters Symbol Parameters Conditions Notes Min Max Unit Sub- groups tRLH Response Time: Low-to-High +VCC = 5V, VI = 100mV, RL = 5.1KΩ, VOD = 5mV 5.0 µS 7, 8B 7.0 µS +VCC = 5V, VI = 100mV, RL = 5.1KΩ, VOD = 50mV 0.8 µS 7, 8B 1.2 µS tRHL Response Time: High-to-Low +VCC = 5V, VI = 100mV, RL = 5.1KΩ, VOD = 5mV 2.5 µS 7, 8B 3.0 µS +VCC = 5V, VI = 100mV, RL = 5.1KΩ, VOD = 50mV 0.8 µS 7, 8B 1.0 µS CS Channel Separation +VCC = 20V, -VCC = -10V, A to B dB +VCC = 20V, -VCC = -10V, A to C dB +VCC = 20V, -VCC = -10V, A to D dB +VCC = 20V, -VCC = -10V, B to A dB +VCC = 20V, -VCC = -10V, B to C dB +VCC = 20V, -VCC = -10V, B to D dB +VCC = 20V, -VCC = -10V, C to A dB +VCC = 20V, -VCC = -10V, C to B dB +VCC = 20V, -VCC = -10V, C to D dB +VCC = 20V, -VCC = -10V, D to A dB +VCC = 20V, -VCC = -10V, D to B dB +VCC = 20V, -VCC = -10V, D to C dB VLAT Voltage Latch (Logical "1" Input) +VCC = 5V, VI = 10V, IO = 4mA 0.4 V LM139JAN www.national.com
(Continued) DC Parameters Drift Values The following conditions apply, unless otherwise specified. −VCC = 0V Delta calculations performed on JAN S product at Group B, Subgroup 5. Symbol Parameters Conditions Notes Min Max Unit Sub- groups VIO Input Offset Voltage VCC = 30V,VO = 15V -1.0 1.0 mV +/- IBias Input Bias Current VCC = 30V,RS = 20KΩ, VO = 15V -15 nA Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guaranteed specific performance limits. For guaranteed specifications and test conditions, see, the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Note 2: Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to ground, the maximum output current is approximately 20 mA independent of the magnitude of V+. Note 3: This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than −0.3 VDC (at 25˚)C. Note 4: The low bias dissipation and the ON-OFF characteristics of the outputs keeps the chip dissipation very small (PD ≤100mW), provided the output transistors are allowed to saturate. Note 5: The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output so no loading change exists on the reference or input lines. Note 6: Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to ground, the maximum output current is approximately 20mA independent of the magnitude of V+ Note 7: Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode range, the comparator will provide a proper output state. The low input voltage state must not be less than −0.3 VDC (or 0.3 VDCbelow the magnitude of the negative power supply, if used) (at 25˚C). Note 8: S/S RS = 20KΩ, tested at RS = 10KΩas equivalent test. Note 9: Calculated parameter; for Delta VIO / Delta T use VIO test at +VCC = 30V, −VCC = 0V, VO = 15V; and for Delta IIO / Delta T use IIB test at +VCC = 30V, −VCC = 0V, VO = 15V Note 10: Datalog of K = V/mV. Note 11: Human Body model, 1.5 KΩin series with 100 pF Note 12: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (Package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax — TA) / θJA or the number given in the Absolute Maximum Ratings, whichever is lower. LM139JAN www.national.com
Typical Performance Characteristics Supply Current Input Current 20129534 20129535 Output Saturation Voltage Response Time for Various Input Overdrives —Negative Transition 20129536 20129537 Response Time for Various Input Overdrives —Positive Transition 20129538 LM139JAN www.national.com
The LM139 is a high gain, wide bandwidth device which, like most comparators, can easily oscillate if the output lead is inadvertently allowed to capacitively couple to the inputs via stray capacitance. This shows up only during the output voltage transition intervals as the comparator changes states. Power supply bypassing is not required to solve this problem. Standard PC board layout is helpful as it reduces stray input-output coupling. Reducing the input resistors to < 10 kΩreduces the feedback signal levels and finally, adding even a small amount (1 to 10 mV) of positive feedback (hysteresis) causes such a rapid transition that oscillations due to stray feedback are not possible. Simply socketing the IC and attaching resistors to the pins will cause input-output oscillations during the small transition intervals unless hys- teresis is used. If the input signal is a pulse waveform, with relatively fast rise and fall times, hysteresis is not required. All pins of any unused comparators should be tied to the negative supply. The bias network of the LM139 establishes a drain current which is independent of the magnitude of the power supply voltage over the range of from 5 VDC to 30 VDC. It is usually unnecessary to use a bypass capacitor across the power supply line. The differential input voltage may be larger than V+ without damaging the device. Protection should be provided to pre- vent the input voltages from going negative more than −0.3 VDC (at 25˚C). An input clamp diode can be used as shown in the applications section. The output of the LM139 is the uncommitted collector of a grounded-emitter NPN output transistor. Many collectors can be tied together to provide an output OR’ing function. An output pull-up resistor can be connected to any available power supply voltage within the permitted supply voltage range and there is no restriction on this voltage due to the magnitude of the voltage which is applied to the V+ terminal of the LM139 package. The output can also be used as a simple SPST switch to ground (when a pull-up resistor is not used). The amount of current which the output device can sink is limited by the drive available (which is independent of V+) and the β of this device. When the maximum current limit is reached (approximately 16 mA), the output transistor will come out of saturation and the output voltage will rise very rapidly. The output saturation voltage is limited by the ap- proximately 60ΩRSAT of the output transistor. The low offset voltage of the output transistor (1 mV) allows the output to clamp essentially to ground level for small load currents. Typical Applications (V+ = 5.0 VDC) Basic Comparator 20129503 Driving CMOS 20129504 Driving TTL 20129505 AND Gate 20129508 OR Gate 20129509 LM139JAN www.national.com
(V+= 15 VDC) One-Shot Multivibrator 20129510 Bi-Stable Multivibrator 20129511 LM139JAN www.national.com
Typical Applications (V+= 15 VDC) (Continued) One-Shot Multivibrator with Input Lock Out 20129512 Pulse Generator 20129517 LM139JAN www.national.com
Typical Applications (V+= 15 VDC) (Continued) Large Fan-In AND Gate ORing the Outputs 20129513 20129515 LM139JAN www.national.com
Typical Applications (V+= 15 VDC) (Continued) Time Delay Generator 20129514 Non-Inverting Comparator with Hysteresis Inverting Comparator with Hysteresis 20129518 20129519 LM139JAN www.national.com
Typical Applications (V+= 15 VDC) (Continued) Squarewave Oscillator Basic Comparator 20129516 20129521 Limit Comparator 20129524 Comparing Input Voltages of Opposite Polarity 20129520 LM139JAN www.national.com
Typical Applications (V+= 15 VDC) (Continued) Output Strobing Crystal Controlled Oscillator 20129522 * Or open-collector logic gate without pull-up resistor 20129525 Transducer Amplifier Zero Crossing Detector (Single Power Supply) 20129528 20129530 LM139JAN www.national.com
Typical Applications (V+= 15 VDC) (Continued) Two-Decade High-Frequency VCO 20129523 V+ = +30 VDC 250 mVDC ≤VC ≤+50 VDC
700 Hz ≤fO ≤100 kHz
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(V+ = +15 VDC and V−= −15 VDC) MOS Clock Driver 20129531 Zero Crossing Detector Comparator With a Negative Reference 20129532 20129533 LM139JAN www.national.com
A New Release to corporate format L. Lytle 1 MDS datasheet converted into Corp. datasheet format. MJLM139-X rev 0D0. MDS datasheet will be archived. LM139JAN www.national.com
inches (millimeters) unless otherwise noted Ceramic Dual-In-Line Package (J) Ceramic Flat Package (W) LM139JAN www.national.com
inches (millimeters) unless otherwise noted (Continued) Ceramic SOIC (WG) National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. BANNED SUBSTANCE COMPLIANCE National Semiconductor manufactures products and uses packing materials that meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ‘‘Banned Substances’’ as defined in CSP-9-111S2. National Semiconductor Americas Customer Support Center Email: new.feedback@nsc.com Tel: 1-800-272-9959 National Semiconductor Europe Customer Support Center Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 National Semiconductor Asia Pacific Customer Support Center Email: ap.support@nsc.com National Semiconductor Japan Customer Support Center Fax: 81-3-5639-7507 Email: jpn.feedback@nsc.com Tel: 81-3-5639-7560 www.national.com LM139JAN Low Power Low Offset Voltage Quad Comparators