J598

2SJ598 NEC | Alldatasheet

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The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. MOS FIELD EFFECT TRANSISTOR 2SJ598 SWITCHING P-CHANNEL POWER MOS FET DATA SHEET Document No. D14656EJ4V0DS00 (4th edition) Date Published August 2004 NS CP(K) Printed in Japan 2000, 2001 The mark shows major revised points.

DESCRIPTION

The 2SJ598 is P-channel MOS Field Effect Transistor designed for solenoid, motor and lamp driver.

FEATURES

• Low on-state resistance: R DS(on)1 = 130 mΩ MAX. (VGS = –10 V, ID = –6 A) R DS(on)2 = 190 mΩ MAX. (VGS = –4.0 V, ID = –6 A)
• Low C iss: Ciss = 720 pF TYP.
• Built-in gate protection diode
• TO-251/TO-252 package ABSOLUTE MAXIMUM RATINGS (TA = 25°C) Drain to Source Voltage (VGS = 0 V) V DSS –60 V Gate to Source Voltage (VDS = 0 V) V GSS m20 V Drain Current (DC) (TC = 25°C) I D(DC) m12 A Drain Current (pulse) Note1 ID(pulse) m30 A Total Power Dissipation (TC = 25°C) PT 23 W Total Power Dissipation (TA = 25°C) PT 1.0 W Channel Temperature T ch 150 °C Storage Temperature T stg –55 to +150 °C Single Avalanche Current Note2 IAS –12 A Single Avalanche Energy Note2 EAS 14.4 mJ Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1% 2. Starting T ch = 25°C, VDD = –30 V, RG = 25 Ω, VGS = –20 → 0 V

ORDERING INFORMATION

2SJ598 TO-251 (MP-3) 2SJ598-Z TO-252 (MP-3Z) (TO-251) (TO-252)

Data Sheet D14656EJ4V0DS 2 2SJ598 ELECTRICAL CHARACTERISTICS (TA = 25°C) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current I DSS V DS = –60 V, VGS = 0 V –10 µA Gate Leakage Current I GSS VGS = m16 V, VDS = 0 V m10 µA Gate Cut-off Voltage V GS(off) V DS = –10 V, ID = –1 mA –1.5 –2.0 –2.5 V Forward Transfer Admittance | y fs | V DS = –10 V, ID = –6 A 5 11 S Drain to Source On-state Resistance R DS(on)1 V GS = –10 V, ID = –6 A 102 130 m Ω R DS(on)2 V GS = –4.0 V, ID = –6 A 131 190 m Ω Input Capacitance C iss V DS = –10 V 720 pF Output Capacitance C oss V GS = 0 V 150 pF Reverse Transfer Capacitance C rss f = 1 MHz 50 pF Turn-on Delay Time t d(on) I D = –6 A 7 ns Rise Time t r V GS = –10 V 4 ns Turn-off Delay Time t d(off) V DD = –30 V 35 ns Fall Time t f R G = 0 Ω 10 ns Total Gate Charge Q G I D = –12 A 15 nC Gate to Source Charge Q GS V DD= –48 V 3 nC Gate to Drain Charge Q GD V GS = –10 V 4 nC Body Diode Forward Voltage V F(S-D) I F = 12 A, VGS = 0 V 0.98 V Reverse Recovery Time t rr I F = 12 A, VGS = 0 V 50 ns Reverse Recovery Charge Q rr di/dt = 100 A /µs 100 nC TEST CIRCUIT 1 AVALANCHE CAPABILITY RG = 25 Ω 50 Ω L VDD VGS = −20 → 0 V BVDSSIAS ID VDS Starting Tch VDD D.U.T. TEST CIRCUIT 3 GATE CHARGE TEST CIRCUIT 2 SWITCHING TIME PG. RG VGS(−) D.U.T. RL VDD τ = 1 sµ Duty Cycle ≤ 1% VGS Wave Form VDS Wave Form VGS(−) 10% 90%VGS 10%0 VDS(−) 90%90% td(on) tr td(off) t f 10% τ VDS ton toff PG. PG. 50 Ω D.U.T. RL VDD IG = −2 mA

Data Sheet D14656EJ4V0DS 3 2SJ598 TYPICAL CHARACTERISTICS (TA = 25°C) TC - Case Temperature - ˚C PT - Total Power Dissipation - W 0 8020 40 60 100 140 120 160 TOTAL POWER DISSIPATION vs. CASE TEMPERATURE FORWARD BIAS SAFE OPERATING AREA ID - Drain Current - A VDS - Drain to Source Voltage - V –10 –100 –0.1 –1 –10 TC = 25˚C Single Pulse–0.1 –100 Power Dissipation Limited RDS(on) Limited ID(DC) ID(pulse) PW = 10 µs100 µs1 ms 10 ms DC DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA TC - Case Temperature - ˚C dT - Percentage of Rated Power - % 04 0 20 60 100 140 80 120 160 100 PW - Pulse Width - s TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH rth(t) - Transient Thermal Resistance - ˚C/W 0.01 0.1 100 1000 1 m 10 m 100 m 1 10 100 1000 Single Pulse 10 100 Rth(ch-C) = 5.43˚C/W µ µ Rth(ch-A) = 125˚C/W

Data Sheet D14656EJ4V0DS 4 2SJ598 DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE VGS - Gate to Source Voltage - V RDS(on) - Drain to Source On-state Resistance - mΩ 0 –5 –10 –15 –20 Pulsed 200 150 100 ID = –6 A FORWARD TRANSFER CHARACTERISTICS VGS - Gate to Source Voltage - V ID - Drain Current - A Pulsed VDS = –10 V –10 –0.1 –100 TA = −55˚C 25˚C 75˚C 150˚C –0.01 DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT ID - Drain Current - A RDS(on) - Drain to Source On-state Resistance - mΩ –1–0.1 300 200 100 –10 –100 Pulsed VGS = –4.0 V –4.5 V –10 V DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE VDS - Drain to Source Voltage - V ID - Drain Current - A 0 –4 –6 –8 –50 –40 –30 –20 –10 0 –2 Pulsed VGS = –10 V –10 –4.0 V FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT ID - Drain Current - A | yfs | - Forward Transfer Admittance - S –0.01 –0.1 –1 100 –10 –100 0.1 Pulsed VDS = –10 V TA = 150˚C 75˚C 25˚C −50˚C 0.01 GATE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE Tch - Channel Temperature - ˚C VGS(off) - Gate Cut-off Voltage - V VDS = –10 V ID = –1 mA –1.0 –2.0 –3.0 –50 0 50 100 150 –4.0

Data Sheet D14656EJ4V0DS 5 2SJ598 DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE Tch - Channel Temperature - ˚C RDS(on) - Drain to Source On-state Resistance - mΩ −50 0 50 100 150 ID = –6 A 300 250 200 150 100 –10 V VGS = –4.0 V Pulsed SOURCE TO DRAIN DIODE FORWARD VOLTAGE –1.0 ISD - Diode Forward Current - A 0 –1.5 VSD - Source to Drain Voltage - V –0.5 Pulsed –0.01 –0.1 –10 –100 0 V VGS = –10 V DYNAMIC INPUT/OUTPUT CHARACTERISTICS VGS - Gate to Source Voltage - V QG - Gate Charge - nC VDS - Drain to Source Voltage - V 0 462 8 10 12 14 16 –60 –50 –40 –30 –20 –10 V DS VGS VDD = –48 V –30 V –12 V ID = –12 A –12 –10 REVERSE RECOVERY TIME vs. DRAIN CURRENT IF - Drain Current - A trr - Reverse Recovery Time - ns di/dt = 100 A/ s VGS = 0 V 0.1 1 10 100 1000 100 µ CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE VDS - Drain to Source Voltage - V Ciss, Coss, Crss - Capacitance - pF 100 1000 10000 –0.1 –1 –10 VGS = 0 V f = 1 MHz Coss Crss Ciss –100 SWITCHING CHARACTERISTICS ID - Drain Current - A td(on), tr, td(off), tf - Switching Time - ns –1–0.1 100 1000 –10 –100 tf tr td(on) td(off) VDD = –30 V RG = 0 Ω VGS = –10 V

Data Sheet D14656EJ4V0DS 6 2SJ598 SINGLE AVALANCHE ENERGY DERATING FACTOR Starting Tch - Starting Channel Temperature - ˚C Energy Derating Factor - % 25 50 75 100 160 140 120 100 125 150 VDD = –30 V RG = 25 Ω VGS = –20 → 0 V IAS ≤ –12 A SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD L - Inductive Load - H IAS - Single Avalanche Current - A –10 –100 1 m1 0 m VDD = –30 V RG = 25 Ω VGS = –20 → 0 V IAS = –12 A 10µ 100µ –0.1 EAS = 14.4 mJ

Data Sheet D14656EJ4V0DS 7 2SJ598 PACKAGE DRAWINGS (Unit: mm) 1) TO-251 (MP-3) 2) TO-252 (MP-3Z) 1. Gate 2. Drain 3. Source 4. Fin (Drain) 213 6.5 ±0.2 5.0 ±0.2 1.5 −0.1 +0.2 5.5 ±0.27.0 MIN. 13.7 MIN. 2.32.3 0.75 0.5 ±0.1 2.3 ±0.2 1.6 ±0.2 1.1 ±0.2 0.5 −0.1 +0.2 0.5 −0.1 +0.2 1. Gate 2. Drain 3. Source 4. Fin (Drain) 123 6.5 ±0.2 5.0 ±0.2 4.3 MAX.0.8 2.3 2.3 0.9 MAX. 5.5 ±0.2 10.0 MAX. 2.0 MIN. 1.5 −0.1 +0.2 2.3 ±0.2 0.5 ±0.1 0.8 MAX. 0.8 1.0 MIN. 1.8TYP.0.7 1.1 ±0.2 EQUIVALENT CIRCUIT Source Body Diode Gate Protection Diode Gate Drain Remark The diode connected between the gate and source of t he transistor serves as a protector against ESD. When this device actually used, an addi tional protection circuit is exter nally required if a voltage exceeding the rated voltage may be applied to this device.

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